mbed library sources. Supersedes mbed-src.
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targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0P/drivers/system/interrupt/system_interrupt.c@15:a81a8d6c1dfe, 2015-11-04 (annotated)
- Committer:
- mbed_official
- Date:
- Wed Nov 04 16:30:11 2015 +0000
- Revision:
- 15:a81a8d6c1dfe
Synchronized with git revision 46af745ef4405614c3fa49abbd9a706a362ea514
Full URL: https://github.com/mbedmicro/mbed/commit/46af745ef4405614c3fa49abbd9a706a362ea514/
Renamed TARGET_SAM_CortexM0+ to TARGET_SAM_CortexM0P for compatiblity with online compiler
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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mbed_official | 15:a81a8d6c1dfe | 1 | /** |
mbed_official | 15:a81a8d6c1dfe | 2 | * \file |
mbed_official | 15:a81a8d6c1dfe | 3 | * |
mbed_official | 15:a81a8d6c1dfe | 4 | * \brief SAM System Interrupt Driver |
mbed_official | 15:a81a8d6c1dfe | 5 | * |
mbed_official | 15:a81a8d6c1dfe | 6 | * Copyright (C) 2012-2015 Atmel Corporation. All rights reserved. |
mbed_official | 15:a81a8d6c1dfe | 7 | * |
mbed_official | 15:a81a8d6c1dfe | 8 | * \asf_license_start |
mbed_official | 15:a81a8d6c1dfe | 9 | * |
mbed_official | 15:a81a8d6c1dfe | 10 | * \page License |
mbed_official | 15:a81a8d6c1dfe | 11 | * |
mbed_official | 15:a81a8d6c1dfe | 12 | * Redistribution and use in source and binary forms, with or without |
mbed_official | 15:a81a8d6c1dfe | 13 | * modification, are permitted provided that the following conditions are met: |
mbed_official | 15:a81a8d6c1dfe | 14 | * |
mbed_official | 15:a81a8d6c1dfe | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 15:a81a8d6c1dfe | 16 | * this list of conditions and the following disclaimer. |
mbed_official | 15:a81a8d6c1dfe | 17 | * |
mbed_official | 15:a81a8d6c1dfe | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 15:a81a8d6c1dfe | 19 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 15:a81a8d6c1dfe | 20 | * and/or other materials provided with the distribution. |
mbed_official | 15:a81a8d6c1dfe | 21 | * |
mbed_official | 15:a81a8d6c1dfe | 22 | * 3. The name of Atmel may not be used to endorse or promote products derived |
mbed_official | 15:a81a8d6c1dfe | 23 | * from this software without specific prior written permission. |
mbed_official | 15:a81a8d6c1dfe | 24 | * |
mbed_official | 15:a81a8d6c1dfe | 25 | * 4. This software may only be redistributed and used in connection with an |
mbed_official | 15:a81a8d6c1dfe | 26 | * Atmel microcontroller product. |
mbed_official | 15:a81a8d6c1dfe | 27 | * |
mbed_official | 15:a81a8d6c1dfe | 28 | * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED |
mbed_official | 15:a81a8d6c1dfe | 29 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
mbed_official | 15:a81a8d6c1dfe | 30 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE |
mbed_official | 15:a81a8d6c1dfe | 31 | * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR |
mbed_official | 15:a81a8d6c1dfe | 32 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 15:a81a8d6c1dfe | 33 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
mbed_official | 15:a81a8d6c1dfe | 34 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
mbed_official | 15:a81a8d6c1dfe | 35 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
mbed_official | 15:a81a8d6c1dfe | 36 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
mbed_official | 15:a81a8d6c1dfe | 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
mbed_official | 15:a81a8d6c1dfe | 38 | * POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 15:a81a8d6c1dfe | 39 | * |
mbed_official | 15:a81a8d6c1dfe | 40 | * \asf_license_stop |
mbed_official | 15:a81a8d6c1dfe | 41 | * |
mbed_official | 15:a81a8d6c1dfe | 42 | */ |
mbed_official | 15:a81a8d6c1dfe | 43 | /* |
mbed_official | 15:a81a8d6c1dfe | 44 | * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a> |
mbed_official | 15:a81a8d6c1dfe | 45 | */ |
mbed_official | 15:a81a8d6c1dfe | 46 | #include "system_interrupt.h" |
mbed_official | 15:a81a8d6c1dfe | 47 | |
mbed_official | 15:a81a8d6c1dfe | 48 | /** |
mbed_official | 15:a81a8d6c1dfe | 49 | * \brief Check if a interrupt line is pending. |
mbed_official | 15:a81a8d6c1dfe | 50 | * |
mbed_official | 15:a81a8d6c1dfe | 51 | * Checks if the requested interrupt vector is pending. |
mbed_official | 15:a81a8d6c1dfe | 52 | * |
mbed_official | 15:a81a8d6c1dfe | 53 | * \param[in] vector Interrupt vector number to check |
mbed_official | 15:a81a8d6c1dfe | 54 | * |
mbed_official | 15:a81a8d6c1dfe | 55 | * \returns A boolean identifying if the requested interrupt vector is pending. |
mbed_official | 15:a81a8d6c1dfe | 56 | * |
mbed_official | 15:a81a8d6c1dfe | 57 | * \retval true Specified interrupt vector is pending |
mbed_official | 15:a81a8d6c1dfe | 58 | * \retval false Specified interrupt vector is not pending |
mbed_official | 15:a81a8d6c1dfe | 59 | * |
mbed_official | 15:a81a8d6c1dfe | 60 | */ |
mbed_official | 15:a81a8d6c1dfe | 61 | bool system_interrupt_is_pending( |
mbed_official | 15:a81a8d6c1dfe | 62 | const enum system_interrupt_vector vector) |
mbed_official | 15:a81a8d6c1dfe | 63 | { |
mbed_official | 15:a81a8d6c1dfe | 64 | bool result; |
mbed_official | 15:a81a8d6c1dfe | 65 | |
mbed_official | 15:a81a8d6c1dfe | 66 | if (vector >= _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START) { |
mbed_official | 15:a81a8d6c1dfe | 67 | result = ((NVIC->ISPR[0] & (1 << vector)) != 0); |
mbed_official | 15:a81a8d6c1dfe | 68 | } else if (vector == SYSTEM_INTERRUPT_SYSTICK) { |
mbed_official | 15:a81a8d6c1dfe | 69 | result = ((SCB->ICSR & SCB_ICSR_PENDSTSET_Msk) != 0); |
mbed_official | 15:a81a8d6c1dfe | 70 | } else { |
mbed_official | 15:a81a8d6c1dfe | 71 | Assert(false); |
mbed_official | 15:a81a8d6c1dfe | 72 | result = false; |
mbed_official | 15:a81a8d6c1dfe | 73 | } |
mbed_official | 15:a81a8d6c1dfe | 74 | |
mbed_official | 15:a81a8d6c1dfe | 75 | return result; |
mbed_official | 15:a81a8d6c1dfe | 76 | } |
mbed_official | 15:a81a8d6c1dfe | 77 | |
mbed_official | 15:a81a8d6c1dfe | 78 | /** |
mbed_official | 15:a81a8d6c1dfe | 79 | * \brief Set a interrupt vector as pending. |
mbed_official | 15:a81a8d6c1dfe | 80 | * |
mbed_official | 15:a81a8d6c1dfe | 81 | * Set the requested interrupt vector as pending (i.e. issues a software |
mbed_official | 15:a81a8d6c1dfe | 82 | * interrupt request for the specified vector). The software handler will be |
mbed_official | 15:a81a8d6c1dfe | 83 | * handled (if enabled) in a priority order based on vector number and |
mbed_official | 15:a81a8d6c1dfe | 84 | * configured priority settings. |
mbed_official | 15:a81a8d6c1dfe | 85 | * |
mbed_official | 15:a81a8d6c1dfe | 86 | * \param[in] vector Interrupt vector number which is set as pending |
mbed_official | 15:a81a8d6c1dfe | 87 | * |
mbed_official | 15:a81a8d6c1dfe | 88 | * \returns Status code identifying if the vector was successfully set as |
mbed_official | 15:a81a8d6c1dfe | 89 | * pending. |
mbed_official | 15:a81a8d6c1dfe | 90 | * |
mbed_official | 15:a81a8d6c1dfe | 91 | * \retval STATUS_OK If no error was detected |
mbed_official | 15:a81a8d6c1dfe | 92 | * \retval STATUS_INVALID_ARG If an unsupported interrupt vector number was given |
mbed_official | 15:a81a8d6c1dfe | 93 | */ |
mbed_official | 15:a81a8d6c1dfe | 94 | enum status_code system_interrupt_set_pending( |
mbed_official | 15:a81a8d6c1dfe | 95 | const enum system_interrupt_vector vector) |
mbed_official | 15:a81a8d6c1dfe | 96 | { |
mbed_official | 15:a81a8d6c1dfe | 97 | enum status_code status = STATUS_OK; |
mbed_official | 15:a81a8d6c1dfe | 98 | |
mbed_official | 15:a81a8d6c1dfe | 99 | if (vector >= _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START) { |
mbed_official | 15:a81a8d6c1dfe | 100 | NVIC->ISPR[0] = (1 << vector); |
mbed_official | 15:a81a8d6c1dfe | 101 | } else if (vector == SYSTEM_INTERRUPT_NON_MASKABLE) { |
mbed_official | 15:a81a8d6c1dfe | 102 | /* Note: Because NMI has highest priority it will be executed |
mbed_official | 15:a81a8d6c1dfe | 103 | * immediately after it has been set pending */ |
mbed_official | 15:a81a8d6c1dfe | 104 | SCB->ICSR = SCB_ICSR_NMIPENDSET_Msk; |
mbed_official | 15:a81a8d6c1dfe | 105 | } else if (vector == SYSTEM_INTERRUPT_SYSTICK) { |
mbed_official | 15:a81a8d6c1dfe | 106 | SCB->ICSR = SCB_ICSR_PENDSTSET_Msk; |
mbed_official | 15:a81a8d6c1dfe | 107 | } else { |
mbed_official | 15:a81a8d6c1dfe | 108 | /* The user want to set something unsupported as pending */ |
mbed_official | 15:a81a8d6c1dfe | 109 | Assert(false); |
mbed_official | 15:a81a8d6c1dfe | 110 | status = STATUS_ERR_INVALID_ARG; |
mbed_official | 15:a81a8d6c1dfe | 111 | } |
mbed_official | 15:a81a8d6c1dfe | 112 | |
mbed_official | 15:a81a8d6c1dfe | 113 | return status; |
mbed_official | 15:a81a8d6c1dfe | 114 | } |
mbed_official | 15:a81a8d6c1dfe | 115 | |
mbed_official | 15:a81a8d6c1dfe | 116 | /** |
mbed_official | 15:a81a8d6c1dfe | 117 | * \brief Clear pending interrupt vector. |
mbed_official | 15:a81a8d6c1dfe | 118 | * |
mbed_official | 15:a81a8d6c1dfe | 119 | * Clear a pending interrupt vector, so the software handler is not executed. |
mbed_official | 15:a81a8d6c1dfe | 120 | * |
mbed_official | 15:a81a8d6c1dfe | 121 | * \param[in] vector Interrupt vector number to clear |
mbed_official | 15:a81a8d6c1dfe | 122 | * |
mbed_official | 15:a81a8d6c1dfe | 123 | * \returns A status code identifying if the interrupt pending state was |
mbed_official | 15:a81a8d6c1dfe | 124 | * successfully cleared. |
mbed_official | 15:a81a8d6c1dfe | 125 | * |
mbed_official | 15:a81a8d6c1dfe | 126 | * \retval STATUS_OK If no error was detected |
mbed_official | 15:a81a8d6c1dfe | 127 | * \retval STATUS_INVALID_ARG If an unsupported interrupt vector number was given |
mbed_official | 15:a81a8d6c1dfe | 128 | */ |
mbed_official | 15:a81a8d6c1dfe | 129 | enum status_code system_interrupt_clear_pending( |
mbed_official | 15:a81a8d6c1dfe | 130 | const enum system_interrupt_vector vector) |
mbed_official | 15:a81a8d6c1dfe | 131 | { |
mbed_official | 15:a81a8d6c1dfe | 132 | enum status_code status = STATUS_OK; |
mbed_official | 15:a81a8d6c1dfe | 133 | |
mbed_official | 15:a81a8d6c1dfe | 134 | if (vector >= _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START) { |
mbed_official | 15:a81a8d6c1dfe | 135 | NVIC->ICPR[0] = (1 << vector); |
mbed_official | 15:a81a8d6c1dfe | 136 | } else if (vector == SYSTEM_INTERRUPT_NON_MASKABLE) { |
mbed_official | 15:a81a8d6c1dfe | 137 | /* Note: Clearing of NMI pending interrupts does not make sense and is |
mbed_official | 15:a81a8d6c1dfe | 138 | * not supported by the device, as it has the highest priority and will |
mbed_official | 15:a81a8d6c1dfe | 139 | * always be executed at the moment it is set */ |
mbed_official | 15:a81a8d6c1dfe | 140 | return STATUS_ERR_INVALID_ARG; |
mbed_official | 15:a81a8d6c1dfe | 141 | } else if (vector == SYSTEM_INTERRUPT_SYSTICK) { |
mbed_official | 15:a81a8d6c1dfe | 142 | SCB->ICSR = SCB_ICSR_PENDSTCLR_Msk; |
mbed_official | 15:a81a8d6c1dfe | 143 | } else { |
mbed_official | 15:a81a8d6c1dfe | 144 | Assert(false); |
mbed_official | 15:a81a8d6c1dfe | 145 | status = STATUS_ERR_INVALID_ARG; |
mbed_official | 15:a81a8d6c1dfe | 146 | } |
mbed_official | 15:a81a8d6c1dfe | 147 | |
mbed_official | 15:a81a8d6c1dfe | 148 | return status; |
mbed_official | 15:a81a8d6c1dfe | 149 | } |
mbed_official | 15:a81a8d6c1dfe | 150 | |
mbed_official | 15:a81a8d6c1dfe | 151 | /** |
mbed_official | 15:a81a8d6c1dfe | 152 | * \brief Set interrupt vector priority level. |
mbed_official | 15:a81a8d6c1dfe | 153 | * |
mbed_official | 15:a81a8d6c1dfe | 154 | * Set the priority level of an external interrupt or exception. |
mbed_official | 15:a81a8d6c1dfe | 155 | * |
mbed_official | 15:a81a8d6c1dfe | 156 | * \param[in] vector Interrupt vector to change |
mbed_official | 15:a81a8d6c1dfe | 157 | * \param[in] priority_level New vector priority level to set |
mbed_official | 15:a81a8d6c1dfe | 158 | * |
mbed_official | 15:a81a8d6c1dfe | 159 | * \returns Status code indicating if the priority level of the interrupt was |
mbed_official | 15:a81a8d6c1dfe | 160 | * successfully set. |
mbed_official | 15:a81a8d6c1dfe | 161 | * |
mbed_official | 15:a81a8d6c1dfe | 162 | * \retval STATUS_OK If no error was detected |
mbed_official | 15:a81a8d6c1dfe | 163 | * \retval STATUS_INVALID_ARG If an unsupported interrupt vector number was given |
mbed_official | 15:a81a8d6c1dfe | 164 | */ |
mbed_official | 15:a81a8d6c1dfe | 165 | enum status_code system_interrupt_set_priority( |
mbed_official | 15:a81a8d6c1dfe | 166 | const enum system_interrupt_vector vector, |
mbed_official | 15:a81a8d6c1dfe | 167 | const enum system_interrupt_priority_level priority_level) |
mbed_official | 15:a81a8d6c1dfe | 168 | { |
mbed_official | 15:a81a8d6c1dfe | 169 | enum status_code status = STATUS_OK; |
mbed_official | 15:a81a8d6c1dfe | 170 | |
mbed_official | 15:a81a8d6c1dfe | 171 | if (vector >= _SYSTEM_INTERRUPT_EXTERNAL_VECTOR_START) { |
mbed_official | 15:a81a8d6c1dfe | 172 | uint8_t register_num = vector / 4; |
mbed_official | 15:a81a8d6c1dfe | 173 | uint8_t priority_pos = ((vector % 4) * 8) + (8 - __NVIC_PRIO_BITS); |
mbed_official | 15:a81a8d6c1dfe | 174 | |
mbed_official | 15:a81a8d6c1dfe | 175 | NVIC->IP[register_num] = |
mbed_official | 15:a81a8d6c1dfe | 176 | (NVIC->IP[register_num] & ~(_SYSTEM_INTERRUPT_PRIORITY_MASK << priority_pos)) | |
mbed_official | 15:a81a8d6c1dfe | 177 | (priority_level << priority_pos); |
mbed_official | 15:a81a8d6c1dfe | 178 | |
mbed_official | 15:a81a8d6c1dfe | 179 | } else if (vector == SYSTEM_INTERRUPT_SYSTICK) { |
mbed_official | 15:a81a8d6c1dfe | 180 | SCB->SHP[1] = (priority_level << _SYSTEM_INTERRUPT_SYSTICK_PRI_POS); |
mbed_official | 15:a81a8d6c1dfe | 181 | } else { |
mbed_official | 15:a81a8d6c1dfe | 182 | Assert(false); |
mbed_official | 15:a81a8d6c1dfe | 183 | status = STATUS_ERR_INVALID_ARG; |
mbed_official | 15:a81a8d6c1dfe | 184 | } |
mbed_official | 15:a81a8d6c1dfe | 185 | |
mbed_official | 15:a81a8d6c1dfe | 186 | return status; |
mbed_official | 15:a81a8d6c1dfe | 187 | } |
mbed_official | 15:a81a8d6c1dfe | 188 | |
mbed_official | 15:a81a8d6c1dfe | 189 | /** |
mbed_official | 15:a81a8d6c1dfe | 190 | * \brief Get interrupt vector priority level. |
mbed_official | 15:a81a8d6c1dfe | 191 | * |
mbed_official | 15:a81a8d6c1dfe | 192 | * Retrieves the priority level of the requested external interrupt or exception. |
mbed_official | 15:a81a8d6c1dfe | 193 | * |
mbed_official | 15:a81a8d6c1dfe | 194 | * \param[in] vector Interrupt vector of which the priority level will be read |
mbed_official | 15:a81a8d6c1dfe | 195 | * |
mbed_official | 15:a81a8d6c1dfe | 196 | * \return Currently configured interrupt priority level of the given interrupt |
mbed_official | 15:a81a8d6c1dfe | 197 | * vector. |
mbed_official | 15:a81a8d6c1dfe | 198 | */ |
mbed_official | 15:a81a8d6c1dfe | 199 | enum system_interrupt_priority_level system_interrupt_get_priority( |
mbed_official | 15:a81a8d6c1dfe | 200 | const enum system_interrupt_vector vector) |
mbed_official | 15:a81a8d6c1dfe | 201 | { |
mbed_official | 15:a81a8d6c1dfe | 202 | uint8_t register_num = vector / 4; |
mbed_official | 15:a81a8d6c1dfe | 203 | uint8_t priority_pos = ((vector % 4) * 8) + (8 - __NVIC_PRIO_BITS); |
mbed_official | 15:a81a8d6c1dfe | 204 | |
mbed_official | 15:a81a8d6c1dfe | 205 | enum system_interrupt_priority_level priority = SYSTEM_INTERRUPT_PRIORITY_LEVEL_0; |
mbed_official | 15:a81a8d6c1dfe | 206 | |
mbed_official | 15:a81a8d6c1dfe | 207 | if (vector >= 0) { |
mbed_official | 15:a81a8d6c1dfe | 208 | priority = (enum system_interrupt_priority_level) |
mbed_official | 15:a81a8d6c1dfe | 209 | ((NVIC->IP[register_num] >> priority_pos) & _SYSTEM_INTERRUPT_PRIORITY_MASK); |
mbed_official | 15:a81a8d6c1dfe | 210 | } else if (vector == SYSTEM_INTERRUPT_SYSTICK) { |
mbed_official | 15:a81a8d6c1dfe | 211 | priority = (enum system_interrupt_priority_level) |
mbed_official | 15:a81a8d6c1dfe | 212 | ((SCB->SHP[1] >> _SYSTEM_INTERRUPT_SYSTICK_PRI_POS) & _SYSTEM_INTERRUPT_PRIORITY_MASK); |
mbed_official | 15:a81a8d6c1dfe | 213 | } |
mbed_official | 15:a81a8d6c1dfe | 214 | |
mbed_official | 15:a81a8d6c1dfe | 215 | return priority; |
mbed_official | 15:a81a8d6c1dfe | 216 | } |
mbed_official | 15:a81a8d6c1dfe | 217 |