Sergey Solodunov
mbed library sources. Supersedes mbed-src.
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targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0P/drivers/sercom/i2c/i2c_common.h@15:a81a8d6c1dfe, 2015-11-04 (annotated)
- Committer:
- mbed_official
- Date:
- Wed Nov 04 16:30:11 2015 +0000
- Revision:
- 15:a81a8d6c1dfe
Synchronized with git revision 46af745ef4405614c3fa49abbd9a706a362ea514
Full URL: https://github.com/mbedmicro/mbed/commit/46af745ef4405614c3fa49abbd9a706a362ea514/
Renamed TARGET_SAM_CortexM0+ to TARGET_SAM_CortexM0P for compatiblity with online compiler
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 15:a81a8d6c1dfe | 1 | /** |
| mbed_official | 15:a81a8d6c1dfe | 2 | * \file |
| mbed_official | 15:a81a8d6c1dfe | 3 | * |
| mbed_official | 15:a81a8d6c1dfe | 4 | * \brief SAM SERCOM I2C Common Driver |
| mbed_official | 15:a81a8d6c1dfe | 5 | * |
| mbed_official | 15:a81a8d6c1dfe | 6 | * Copyright (c) 2012-2015 Atmel Corporation. All rights reserved. |
| mbed_official | 15:a81a8d6c1dfe | 7 | * |
| mbed_official | 15:a81a8d6c1dfe | 8 | * \asf_license_start |
| mbed_official | 15:a81a8d6c1dfe | 9 | * |
| mbed_official | 15:a81a8d6c1dfe | 10 | * \page License |
| mbed_official | 15:a81a8d6c1dfe | 11 | * |
| mbed_official | 15:a81a8d6c1dfe | 12 | * Redistribution and use in source and binary forms, with or without |
| mbed_official | 15:a81a8d6c1dfe | 13 | * modification, are permitted provided that the following conditions are met: |
| mbed_official | 15:a81a8d6c1dfe | 14 | * |
| mbed_official | 15:a81a8d6c1dfe | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 15:a81a8d6c1dfe | 16 | * this list of conditions and the following disclaimer. |
| mbed_official | 15:a81a8d6c1dfe | 17 | * |
| mbed_official | 15:a81a8d6c1dfe | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 15:a81a8d6c1dfe | 19 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 15:a81a8d6c1dfe | 20 | * and/or other materials provided with the distribution. |
| mbed_official | 15:a81a8d6c1dfe | 21 | * |
| mbed_official | 15:a81a8d6c1dfe | 22 | * 3. The name of Atmel may not be used to endorse or promote products derived |
| mbed_official | 15:a81a8d6c1dfe | 23 | * from this software without specific prior written permission. |
| mbed_official | 15:a81a8d6c1dfe | 24 | * |
| mbed_official | 15:a81a8d6c1dfe | 25 | * 4. This software may only be redistributed and used in connection with an |
| mbed_official | 15:a81a8d6c1dfe | 26 | * Atmel microcontroller product. |
| mbed_official | 15:a81a8d6c1dfe | 27 | * |
| mbed_official | 15:a81a8d6c1dfe | 28 | * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED |
| mbed_official | 15:a81a8d6c1dfe | 29 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| mbed_official | 15:a81a8d6c1dfe | 30 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE |
| mbed_official | 15:a81a8d6c1dfe | 31 | * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR |
| mbed_official | 15:a81a8d6c1dfe | 32 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 15:a81a8d6c1dfe | 33 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| mbed_official | 15:a81a8d6c1dfe | 34 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| mbed_official | 15:a81a8d6c1dfe | 35 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
| mbed_official | 15:a81a8d6c1dfe | 36 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
| mbed_official | 15:a81a8d6c1dfe | 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| mbed_official | 15:a81a8d6c1dfe | 38 | * POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 15:a81a8d6c1dfe | 39 | * |
| mbed_official | 15:a81a8d6c1dfe | 40 | * \asf_license_stop |
| mbed_official | 15:a81a8d6c1dfe | 41 | * |
| mbed_official | 15:a81a8d6c1dfe | 42 | */ |
| mbed_official | 15:a81a8d6c1dfe | 43 | /* |
| mbed_official | 15:a81a8d6c1dfe | 44 | * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a> |
| mbed_official | 15:a81a8d6c1dfe | 45 | */ |
| mbed_official | 15:a81a8d6c1dfe | 46 | #ifndef I2C_COMMON_H_INCLUDED |
| mbed_official | 15:a81a8d6c1dfe | 47 | #define I2C_COMMON_H_INCLUDED |
| mbed_official | 15:a81a8d6c1dfe | 48 | |
| mbed_official | 15:a81a8d6c1dfe | 49 | #include <compiler.h> |
| mbed_official | 15:a81a8d6c1dfe | 50 | #include <sercom.h> |
| mbed_official | 15:a81a8d6c1dfe | 51 | |
| mbed_official | 15:a81a8d6c1dfe | 52 | #ifdef __cplusplus |
| mbed_official | 15:a81a8d6c1dfe | 53 | extern "C" { |
| mbed_official | 15:a81a8d6c1dfe | 54 | #endif |
| mbed_official | 15:a81a8d6c1dfe | 55 | |
| mbed_official | 15:a81a8d6c1dfe | 56 | /** |
| mbed_official | 15:a81a8d6c1dfe | 57 | * \if (I2C_MASTER_MODE && I2C_SLAVE_MODE) |
| mbed_official | 15:a81a8d6c1dfe | 58 | * \defgroup asfdoc_sam0_sercom_i2c_group SAM I2C Driver (SERCOM I2C) |
| mbed_official | 15:a81a8d6c1dfe | 59 | * \elseif I2C_MASTER_MODE |
| mbed_official | 15:a81a8d6c1dfe | 60 | * \defgroup asfdoc_sam0_sercom_i2c_group SAM I2C Master Mode Driver (SERCOM I2C) |
| mbed_official | 15:a81a8d6c1dfe | 61 | * \elseif I2C_SLAVE_MODE |
| mbed_official | 15:a81a8d6c1dfe | 62 | * \defgroup asfdoc_sam0_sercom_i2c_group SAM I2C Slave Mode Driver (SERCOM I2C) |
| mbed_official | 15:a81a8d6c1dfe | 63 | * \endif |
| mbed_official | 15:a81a8d6c1dfe | 64 | * |
| mbed_official | 15:a81a8d6c1dfe | 65 | * This driver for Atmel® | SMART SAM devices provides an interface for the configuration |
| mbed_official | 15:a81a8d6c1dfe | 66 | * and management of the device's SERCOM I<SUP>2</SUP>C module, for the transfer |
| mbed_official | 15:a81a8d6c1dfe | 67 | * of data via an I<SUP>2</SUP>C bus. The following driver API modes are covered |
| mbed_official | 15:a81a8d6c1dfe | 68 | * by this manual: |
| mbed_official | 15:a81a8d6c1dfe | 69 | * |
| mbed_official | 15:a81a8d6c1dfe | 70 | * \if I2C_MASTER_MODE |
| mbed_official | 15:a81a8d6c1dfe | 71 | * - Master Mode Polled APIs |
| mbed_official | 15:a81a8d6c1dfe | 72 | * \endif |
| mbed_official | 15:a81a8d6c1dfe | 73 | * \if I2C_MASTER_CALLBACK_MODE |
| mbed_official | 15:a81a8d6c1dfe | 74 | * - Master Mode Callback APIs |
| mbed_official | 15:a81a8d6c1dfe | 75 | * \endif |
| mbed_official | 15:a81a8d6c1dfe | 76 | * \if I2C_SLAVE_MODE |
| mbed_official | 15:a81a8d6c1dfe | 77 | * - Slave Mode Polled APIs |
| mbed_official | 15:a81a8d6c1dfe | 78 | * \endif |
| mbed_official | 15:a81a8d6c1dfe | 79 | * \if I2C_SLAVE_CALLBACK_MODE |
| mbed_official | 15:a81a8d6c1dfe | 80 | * - Slave Mode Callback APIs |
| mbed_official | 15:a81a8d6c1dfe | 81 | * \endif |
| mbed_official | 15:a81a8d6c1dfe | 82 | * |
| mbed_official | 15:a81a8d6c1dfe | 83 | * The following peripheral is used by this module: |
| mbed_official | 15:a81a8d6c1dfe | 84 | * - SERCOM (Serial Communication Interface) |
| mbed_official | 15:a81a8d6c1dfe | 85 | * |
| mbed_official | 15:a81a8d6c1dfe | 86 | * The following devices can use this module: |
| mbed_official | 15:a81a8d6c1dfe | 87 | * - Atmel | SMART SAM D20/D21 |
| mbed_official | 15:a81a8d6c1dfe | 88 | * - Atmel | SMART SAM R21 |
| mbed_official | 15:a81a8d6c1dfe | 89 | * - Atmel | SMART SAM D10/D11 |
| mbed_official | 15:a81a8d6c1dfe | 90 | * - Atmel | SMART SAM L21 |
| mbed_official | 15:a81a8d6c1dfe | 91 | * - Atmel | SMART SAM DAx |
| mbed_official | 15:a81a8d6c1dfe | 92 | * - Atmel | SMART SAM C20/C21 |
| mbed_official | 15:a81a8d6c1dfe | 93 | * |
| mbed_official | 15:a81a8d6c1dfe | 94 | * The outline of this documentation is as follows: |
| mbed_official | 15:a81a8d6c1dfe | 95 | * - \ref asfdoc_sam0_sercom_i2c_prerequisites |
| mbed_official | 15:a81a8d6c1dfe | 96 | * - \ref asfdoc_sam0_sercom_i2c_overview |
| mbed_official | 15:a81a8d6c1dfe | 97 | * - \ref asfdoc_sam0_sercom_i2c_special_considerations |
| mbed_official | 15:a81a8d6c1dfe | 98 | * - \ref asfdoc_sam0_sercom_i2c_extra |
| mbed_official | 15:a81a8d6c1dfe | 99 | * - \ref asfdoc_sam0_sercom_i2c_examples |
| mbed_official | 15:a81a8d6c1dfe | 100 | * - \ref asfdoc_sam0_sercom_i2c_api_overview |
| mbed_official | 15:a81a8d6c1dfe | 101 | * |
| mbed_official | 15:a81a8d6c1dfe | 102 | * \section asfdoc_sam0_sercom_i2c_prerequisites Prerequisites |
| mbed_official | 15:a81a8d6c1dfe | 103 | * There are no prerequisites. |
| mbed_official | 15:a81a8d6c1dfe | 104 | * |
| mbed_official | 15:a81a8d6c1dfe | 105 | * \section asfdoc_sam0_sercom_i2c_overview Module Overview |
| mbed_official | 15:a81a8d6c1dfe | 106 | * The outline of this section is as follows: |
| mbed_official | 15:a81a8d6c1dfe | 107 | * - \ref asfdoc_sam0_sercom_i2c_module_features |
| mbed_official | 15:a81a8d6c1dfe | 108 | * - \ref asfdoc_sam0_sercom_i2c_functional_desc |
| mbed_official | 15:a81a8d6c1dfe | 109 | * - \ref asfdoc_sam0_sercom_i2c_bus_topology |
| mbed_official | 15:a81a8d6c1dfe | 110 | * - \ref asfdoc_sam0_sercom_i2c_transactions |
| mbed_official | 15:a81a8d6c1dfe | 111 | * - \ref asfdoc_sam0_sercom_i2c_multi_master |
| mbed_official | 15:a81a8d6c1dfe | 112 | * - \ref asfdoc_sam0_sercom_i2c_bus_states |
| mbed_official | 15:a81a8d6c1dfe | 113 | * - \ref asfdoc_sam0_sercom_i2c_timeout |
| mbed_official | 15:a81a8d6c1dfe | 114 | * - \ref asfdoc_sam0_sercom_i2c_sleep_modes |
| mbed_official | 15:a81a8d6c1dfe | 115 | * |
| mbed_official | 15:a81a8d6c1dfe | 116 | * \subsection asfdoc_sam0_sercom_i2c_module_features Driver Feature Macro Definition |
| mbed_official | 15:a81a8d6c1dfe | 117 | * <table> |
| mbed_official | 15:a81a8d6c1dfe | 118 | * <tr> |
| mbed_official | 15:a81a8d6c1dfe | 119 | * <th>Driver Feature Macro</th> |
| mbed_official | 15:a81a8d6c1dfe | 120 | * <th>Supported devices</th> |
| mbed_official | 15:a81a8d6c1dfe | 121 | * </tr> |
| mbed_official | 15:a81a8d6c1dfe | 122 | * <tr> |
| mbed_official | 15:a81a8d6c1dfe | 123 | * <td>FEATURE_I2C_FAST_MODE_PLUS_AND_HIGH_SPEED</td> |
| mbed_official | 15:a81a8d6c1dfe | 124 | * <td>SAM D21/R21/D10/D11/L21/DAx/C20/C21</td> |
| mbed_official | 15:a81a8d6c1dfe | 125 | * </tr> |
| mbed_official | 15:a81a8d6c1dfe | 126 | * <tr> |
| mbed_official | 15:a81a8d6c1dfe | 127 | * <td>FEATURE_I2C_10_BIT_ADDRESS</td> |
| mbed_official | 15:a81a8d6c1dfe | 128 | * <td>SAM D21/R21/D10/D11/L21/DAx/C20/C21</td> |
| mbed_official | 15:a81a8d6c1dfe | 129 | * </tr> |
| mbed_official | 15:a81a8d6c1dfe | 130 | * <tr> |
| mbed_official | 15:a81a8d6c1dfe | 131 | * <td>FEATURE_I2C_SCL_STRETCH_MODE</td> |
| mbed_official | 15:a81a8d6c1dfe | 132 | * <td>SAM D21/R21/D10/D11/L21/DAx/C20/C21</td> |
| mbed_official | 15:a81a8d6c1dfe | 133 | * </tr> |
| mbed_official | 15:a81a8d6c1dfe | 134 | * <tr> |
| mbed_official | 15:a81a8d6c1dfe | 135 | * <td>FEATURE_I2C_SCL_EXTEND_TIMEOUT</td> |
| mbed_official | 15:a81a8d6c1dfe | 136 | * <td>SAM D21/R21/D10/D11/L21/DAx/C20/C21</td> |
| mbed_official | 15:a81a8d6c1dfe | 137 | * </tr> |
| mbed_official | 15:a81a8d6c1dfe | 138 | * </table> |
| mbed_official | 15:a81a8d6c1dfe | 139 | * \note The specific features are only available in the driver when the |
| mbed_official | 15:a81a8d6c1dfe | 140 | * selected device supports those features. |
| mbed_official | 15:a81a8d6c1dfe | 141 | * |
| mbed_official | 15:a81a8d6c1dfe | 142 | * \subsection asfdoc_sam0_sercom_i2c_functional_desc Functional Description |
| mbed_official | 15:a81a8d6c1dfe | 143 | * The I<SUP>2</SUP>C provides a simple two-wire bidirectional bus consisting of a |
| mbed_official | 15:a81a8d6c1dfe | 144 | * wired-AND type serial clock line (SCL) and a wired-AND type serial data line |
| mbed_official | 15:a81a8d6c1dfe | 145 | * (SDA). |
| mbed_official | 15:a81a8d6c1dfe | 146 | * |
| mbed_official | 15:a81a8d6c1dfe | 147 | * The I<SUP>2</SUP>C bus provides a simple, but efficient method of interconnecting |
| mbed_official | 15:a81a8d6c1dfe | 148 | * multiple master and slave devices. An arbitration mechanism is provided for |
| mbed_official | 15:a81a8d6c1dfe | 149 | * resolving bus ownership between masters, as only one master device may own |
| mbed_official | 15:a81a8d6c1dfe | 150 | * the bus at any given time. The arbitration mechanism relies on the wired-AND |
| mbed_official | 15:a81a8d6c1dfe | 151 | * connections to avoid bus drivers short-circuiting. |
| mbed_official | 15:a81a8d6c1dfe | 152 | * |
| mbed_official | 15:a81a8d6c1dfe | 153 | * A unique address is assigned to all slave devices connected to the bus. A |
| mbed_official | 15:a81a8d6c1dfe | 154 | * device can contain both master and slave logic, and can emulate multiple |
| mbed_official | 15:a81a8d6c1dfe | 155 | * slave devices by responding to more than one address. |
| mbed_official | 15:a81a8d6c1dfe | 156 | * |
| mbed_official | 15:a81a8d6c1dfe | 157 | * \subsection asfdoc_sam0_sercom_i2c_bus_topology Bus Topology |
| mbed_official | 15:a81a8d6c1dfe | 158 | * The I<SUP>2</SUP>C bus topology is illustrated in |
| mbed_official | 15:a81a8d6c1dfe | 159 | * \ref asfdoc_sam0_sercom_i2c_bus_topology_figure "the figure below". The pull-up |
| mbed_official | 15:a81a8d6c1dfe | 160 | * resistors (Rs) will provide a high level on the bus lines when none of the |
| mbed_official | 15:a81a8d6c1dfe | 161 | * I<SUP>2</SUP>C devices are driving the bus. These are optional, and can be |
| mbed_official | 15:a81a8d6c1dfe | 162 | * replaced with a constant current source. |
| mbed_official | 15:a81a8d6c1dfe | 163 | * |
| mbed_official | 15:a81a8d6c1dfe | 164 | * \anchor asfdoc_sam0_sercom_i2c_bus_topology_figure |
| mbed_official | 15:a81a8d6c1dfe | 165 | * \image html bus_topology.svg "I2C Bus Topology" Width=100% |
| mbed_official | 15:a81a8d6c1dfe | 166 | * |
| mbed_official | 15:a81a8d6c1dfe | 167 | * \subsection asfdoc_sam0_sercom_i2c_transactions Transactions |
| mbed_official | 15:a81a8d6c1dfe | 168 | * The I<SUP>2</SUP>C standard defines three fundamental transaction formats: |
| mbed_official | 15:a81a8d6c1dfe | 169 | * - Master Write |
| mbed_official | 15:a81a8d6c1dfe | 170 | * - The master transmits data packets to the slave after addressing it |
| mbed_official | 15:a81a8d6c1dfe | 171 | * - Master Read |
| mbed_official | 15:a81a8d6c1dfe | 172 | * - The slave transmits data packets to the master after being addressed |
| mbed_official | 15:a81a8d6c1dfe | 173 | * - Combined Read/Write |
| mbed_official | 15:a81a8d6c1dfe | 174 | * - A combined transaction consists of several write and read transactions |
| mbed_official | 15:a81a8d6c1dfe | 175 | * |
| mbed_official | 15:a81a8d6c1dfe | 176 | * A data transfer starts with the master issuing a \b Start condition on the |
| mbed_official | 15:a81a8d6c1dfe | 177 | * bus, followed by the address of the slave together with a bit to indicate |
| mbed_official | 15:a81a8d6c1dfe | 178 | * whether the master wants to read from or write to the slave. |
| mbed_official | 15:a81a8d6c1dfe | 179 | * The addressed slave must respond to this by sending an \b ACK back to the |
| mbed_official | 15:a81a8d6c1dfe | 180 | * master. |
| mbed_official | 15:a81a8d6c1dfe | 181 | * |
| mbed_official | 15:a81a8d6c1dfe | 182 | * After this, data packets are sent from the master or slave, according to the |
| mbed_official | 15:a81a8d6c1dfe | 183 | * read/write bit. Each packet must be acknowledged (ACK) or not |
| mbed_official | 15:a81a8d6c1dfe | 184 | * acknowledged (NACK) by the receiver. |
| mbed_official | 15:a81a8d6c1dfe | 185 | * |
| mbed_official | 15:a81a8d6c1dfe | 186 | * If a slave responds with a NACK, the master must assume that the slave |
| mbed_official | 15:a81a8d6c1dfe | 187 | * cannot receive any more data and cancel the write operation. |
| mbed_official | 15:a81a8d6c1dfe | 188 | * |
| mbed_official | 15:a81a8d6c1dfe | 189 | * The master completes a transaction by issuing a \b Stop condition. |
| mbed_official | 15:a81a8d6c1dfe | 190 | * |
| mbed_official | 15:a81a8d6c1dfe | 191 | * A master can issue multiple \b Start conditions during a transaction; this |
| mbed_official | 15:a81a8d6c1dfe | 192 | * is then called a \b Repeated \b Start condition. |
| mbed_official | 15:a81a8d6c1dfe | 193 | * |
| mbed_official | 15:a81a8d6c1dfe | 194 | * \subsubsection asfdoc_sam0_sercom_i2c_address_packets Address Packets |
| mbed_official | 15:a81a8d6c1dfe | 195 | * The slave address consists of seven bits. The 8<SUP>th</SUP> bit in the transfer |
| mbed_official | 15:a81a8d6c1dfe | 196 | * determines the data direction (read or write). An address packet always |
| mbed_official | 15:a81a8d6c1dfe | 197 | * succeeds a \b Start or \b Repeated \b Start condition. The 8<SUP>th</SUP> bit is handled |
| mbed_official | 15:a81a8d6c1dfe | 198 | * in the driver, and the user will only have to provide the 7-bit address. |
| mbed_official | 15:a81a8d6c1dfe | 199 | * |
| mbed_official | 15:a81a8d6c1dfe | 200 | * \subsubsection asfdoc_sam0_sercom_i2c_data_packets Data Packets |
| mbed_official | 15:a81a8d6c1dfe | 201 | * Data packets are nine bits long, consisting of one 8-bit data byte, and an |
| mbed_official | 15:a81a8d6c1dfe | 202 | * acknowledgement bit. Data packets follow either an address packet or another |
| mbed_official | 15:a81a8d6c1dfe | 203 | * data packet on the bus. |
| mbed_official | 15:a81a8d6c1dfe | 204 | * |
| mbed_official | 15:a81a8d6c1dfe | 205 | * \subsubsection asfdoc_sam0_sercom_i2c_trans_examples Transaction Examples |
| mbed_official | 15:a81a8d6c1dfe | 206 | * The gray bits in the following examples are sent from master to slave, and |
| mbed_official | 15:a81a8d6c1dfe | 207 | * the white bits are sent from slave to master. |
| mbed_official | 15:a81a8d6c1dfe | 208 | * Example of a read transaction is shown in |
| mbed_official | 15:a81a8d6c1dfe | 209 | * \ref asfdoc_sam0_sercom_i2c_trans_examples_i2c_read "the figure below". Here, the |
| mbed_official | 15:a81a8d6c1dfe | 210 | * master first issues a \b Start condition and gets ownership of the bus. An |
| mbed_official | 15:a81a8d6c1dfe | 211 | * address packet with the direction flag set to read is then sent and |
| mbed_official | 15:a81a8d6c1dfe | 212 | * acknowledged by the slave. Then the slave sends one data packet which is |
| mbed_official | 15:a81a8d6c1dfe | 213 | * acknowledged by the master. The slave sends another packet, which is not |
| mbed_official | 15:a81a8d6c1dfe | 214 | * acknowledged by the master and indicates that the master will terminate the |
| mbed_official | 15:a81a8d6c1dfe | 215 | * transaction. In the end, the transaction is terminated by the master issuing |
| mbed_official | 15:a81a8d6c1dfe | 216 | * a \b Stop condition. |
| mbed_official | 15:a81a8d6c1dfe | 217 | * |
| mbed_official | 15:a81a8d6c1dfe | 218 | * \anchor asfdoc_sam0_sercom_i2c_trans_examples_i2c_read |
| mbed_official | 15:a81a8d6c1dfe | 219 | * \image html i2c_read.svg "I2C Packet Read" Width=100% |
| mbed_official | 15:a81a8d6c1dfe | 220 | * |
| mbed_official | 15:a81a8d6c1dfe | 221 | * Example of a write transaction is shown in |
| mbed_official | 15:a81a8d6c1dfe | 222 | * \ref asfdoc_sam0_sercom_i2c_trans_examples_i2c_write "the figure below". Here, the |
| mbed_official | 15:a81a8d6c1dfe | 223 | * master first issues a \b Start condition and gets ownership of the bus. An |
| mbed_official | 15:a81a8d6c1dfe | 224 | * address packet with the dir flag set to write is then sent and acknowledged |
| mbed_official | 15:a81a8d6c1dfe | 225 | * by the slave. Then the master sends two data packets, each acknowledged by |
| mbed_official | 15:a81a8d6c1dfe | 226 | * the slave. In the end, the transaction is terminated by the master issuing |
| mbed_official | 15:a81a8d6c1dfe | 227 | * a \b Stop condition. |
| mbed_official | 15:a81a8d6c1dfe | 228 | * |
| mbed_official | 15:a81a8d6c1dfe | 229 | * \anchor asfdoc_sam0_sercom_i2c_trans_examples_i2c_write |
| mbed_official | 15:a81a8d6c1dfe | 230 | * \image html i2c_write.svg "I2C Packet Write" Width=100% |
| mbed_official | 15:a81a8d6c1dfe | 231 | * |
| mbed_official | 15:a81a8d6c1dfe | 232 | * \subsubsection asfdoc_sam0_sercom_i2c_packet_timeout Packet Timeout |
| mbed_official | 15:a81a8d6c1dfe | 233 | * When a master sends an I<SUP>2</SUP>C packet, there is no way of |
| mbed_official | 15:a81a8d6c1dfe | 234 | * being sure that a slave will acknowledge the packet. To avoid stalling the |
| mbed_official | 15:a81a8d6c1dfe | 235 | * device forever while waiting for an acknowledge, a user selectable timeout |
| mbed_official | 15:a81a8d6c1dfe | 236 | * is provided in the \ref i2c_master_config struct which |
| mbed_official | 15:a81a8d6c1dfe | 237 | * lets the driver exit a read or write operation after the specified time. |
| mbed_official | 15:a81a8d6c1dfe | 238 | * The function will then return the STATUS_ERR_TIMEOUT flag. |
| mbed_official | 15:a81a8d6c1dfe | 239 | * |
| mbed_official | 15:a81a8d6c1dfe | 240 | * This is also the case for the slave when using the functions postfixed |
| mbed_official | 15:a81a8d6c1dfe | 241 | * \c _wait. |
| mbed_official | 15:a81a8d6c1dfe | 242 | * |
| mbed_official | 15:a81a8d6c1dfe | 243 | * The time before the timeout occurs, will be the same as |
| mbed_official | 15:a81a8d6c1dfe | 244 | * for \ref asfdoc_sam0_sercom_i2c_unknown_bus_timeout "unknown bus state" timeout. |
| mbed_official | 15:a81a8d6c1dfe | 245 | * |
| mbed_official | 15:a81a8d6c1dfe | 246 | * \subsubsection asfdoc_sam0_sercom_i2c_repeated_start Repeated Start |
| mbed_official | 15:a81a8d6c1dfe | 247 | * To issue a \b Repeated \b Start, the functions postfixed \c _no_stop must be |
| mbed_official | 15:a81a8d6c1dfe | 248 | * used. |
| mbed_official | 15:a81a8d6c1dfe | 249 | * These functions will not send a \b Stop condition when the transfer is done, |
| mbed_official | 15:a81a8d6c1dfe | 250 | * thus the next transfer will start with a \b Repeated \b Start. To end the |
| mbed_official | 15:a81a8d6c1dfe | 251 | * transaction, the functions without the \c _no_stop postfix must be used |
| mbed_official | 15:a81a8d6c1dfe | 252 | * for the last read/write. |
| mbed_official | 15:a81a8d6c1dfe | 253 | * |
| mbed_official | 15:a81a8d6c1dfe | 254 | * \subsection asfdoc_sam0_sercom_i2c_multi_master Multi Master |
| mbed_official | 15:a81a8d6c1dfe | 255 | * In a multi master environment, arbitration of the bus is important, as only |
| mbed_official | 15:a81a8d6c1dfe | 256 | * one master can own the bus at any point. |
| mbed_official | 15:a81a8d6c1dfe | 257 | * |
| mbed_official | 15:a81a8d6c1dfe | 258 | * \subsubsection asfdoc_sam0_sercom_i2c_arbitration Arbitration |
| mbed_official | 15:a81a8d6c1dfe | 259 | * |
| mbed_official | 15:a81a8d6c1dfe | 260 | * \par Clock stretching |
| mbed_official | 15:a81a8d6c1dfe | 261 | * The serial clock line is always driven by a master device. However, all |
| mbed_official | 15:a81a8d6c1dfe | 262 | * devices connected to the bus are allowed stretch the low period of the clock |
| mbed_official | 15:a81a8d6c1dfe | 263 | * to slow down the overall clock frequency or to insert wait states while |
| mbed_official | 15:a81a8d6c1dfe | 264 | * processing data. |
| mbed_official | 15:a81a8d6c1dfe | 265 | * Both master and slave can randomly stretch the clock, which will force the |
| mbed_official | 15:a81a8d6c1dfe | 266 | * other device into a wait-state until the clock line goes high again. |
| mbed_official | 15:a81a8d6c1dfe | 267 | * |
| mbed_official | 15:a81a8d6c1dfe | 268 | * \par Arbitration on the data line |
| mbed_official | 15:a81a8d6c1dfe | 269 | * If two masters start transmitting at the same time, they will both transmit |
| mbed_official | 15:a81a8d6c1dfe | 270 | * until one master detects that the other master is pulling the data line low. |
| mbed_official | 15:a81a8d6c1dfe | 271 | * When this is detected, the master not pulling the line low, will stop the |
| mbed_official | 15:a81a8d6c1dfe | 272 | * transmission and wait until the bus is idle. |
| mbed_official | 15:a81a8d6c1dfe | 273 | * As it is the master trying to contact the slave with the lowest address that |
| mbed_official | 15:a81a8d6c1dfe | 274 | * will get the bus ownership, this will create an arbitration scheme always |
| mbed_official | 15:a81a8d6c1dfe | 275 | * prioritizing the slaves with the lowest address in case of a bus collision. |
| mbed_official | 15:a81a8d6c1dfe | 276 | * |
| mbed_official | 15:a81a8d6c1dfe | 277 | * \subsubsection asfdoc_sam0_sercom_i2c_clock_sync Clock Synchronization |
| mbed_official | 15:a81a8d6c1dfe | 278 | * In situations where more than one master is trying to control the bus clock |
| mbed_official | 15:a81a8d6c1dfe | 279 | * line at the same time, a clock synchronization algorithm based on the same |
| mbed_official | 15:a81a8d6c1dfe | 280 | * principles used for clock stretching is necessary. |
| mbed_official | 15:a81a8d6c1dfe | 281 | * |
| mbed_official | 15:a81a8d6c1dfe | 282 | * |
| mbed_official | 15:a81a8d6c1dfe | 283 | * \subsection asfdoc_sam0_sercom_i2c_bus_states Bus States |
| mbed_official | 15:a81a8d6c1dfe | 284 | * As the I<SUP>2</SUP>C bus is limited to one transaction at the time, |
| mbed_official | 15:a81a8d6c1dfe | 285 | * a master that wants to perform a bus transaction must wait until the bus is |
| mbed_official | 15:a81a8d6c1dfe | 286 | * free. |
| mbed_official | 15:a81a8d6c1dfe | 287 | * Because of this, it is necessary for all masters in a multi-master system to |
| mbed_official | 15:a81a8d6c1dfe | 288 | * know the current status of the bus to be able to avoid conflicts and to |
| mbed_official | 15:a81a8d6c1dfe | 289 | * ensure data integrity. |
| mbed_official | 15:a81a8d6c1dfe | 290 | * \li \b IDLE No activity on the bus (between a \b Stop and a new \b Start |
| mbed_official | 15:a81a8d6c1dfe | 291 | * condition) |
| mbed_official | 15:a81a8d6c1dfe | 292 | * \li \b OWNER If the master initiates a transaction successfully |
| mbed_official | 15:a81a8d6c1dfe | 293 | * \li \b BUSY If another master is driving the bus |
| mbed_official | 15:a81a8d6c1dfe | 294 | * \li \b UNKNOWN If the master has recently been enabled or connected to |
| mbed_official | 15:a81a8d6c1dfe | 295 | * the bus. Is forced to \b IDLE after given |
| mbed_official | 15:a81a8d6c1dfe | 296 | * \ref asfdoc_sam0_sercom_i2c_unknown_bus_timeout "timeout" when |
| mbed_official | 15:a81a8d6c1dfe | 297 | * the master module is enabled |
| mbed_official | 15:a81a8d6c1dfe | 298 | * |
| mbed_official | 15:a81a8d6c1dfe | 299 | * The bus state diagram can be seen in |
| mbed_official | 15:a81a8d6c1dfe | 300 | * \ref asfdoc_sam0_sercom_i2c_bus_states_figure "the figure below". |
| mbed_official | 15:a81a8d6c1dfe | 301 | * \li S: Start condition |
| mbed_official | 15:a81a8d6c1dfe | 302 | * \li P: Stop condition |
| mbed_official | 15:a81a8d6c1dfe | 303 | * \li Sr: Repeated start condition |
| mbed_official | 15:a81a8d6c1dfe | 304 | * \anchor asfdoc_sam0_sercom_i2c_bus_states_figure |
| mbed_official | 15:a81a8d6c1dfe | 305 | * \image html bus_state_diagram.svg "I2C Bus State Diagram" Width=100% |
| mbed_official | 15:a81a8d6c1dfe | 306 | * |
| mbed_official | 15:a81a8d6c1dfe | 307 | * \subsection asfdoc_sam0_sercom_i2c_timeout Bus Timing |
| mbed_official | 15:a81a8d6c1dfe | 308 | * Inactive bus timeout for the master and SDA hold time is configurable in the |
| mbed_official | 15:a81a8d6c1dfe | 309 | * drivers. |
| mbed_official | 15:a81a8d6c1dfe | 310 | * |
| mbed_official | 15:a81a8d6c1dfe | 311 | * \subsubsection asfdoc_sam0_sercom_i2c_unknown_bus_timeout Unknown Bus State Timeout |
| mbed_official | 15:a81a8d6c1dfe | 312 | * When a master is enabled or connected to the bus, the bus state will be |
| mbed_official | 15:a81a8d6c1dfe | 313 | * unknown until either a given timeout or a stop command has occurred. The |
| mbed_official | 15:a81a8d6c1dfe | 314 | * timeout is configurable in the \ref i2c_master_config struct. |
| mbed_official | 15:a81a8d6c1dfe | 315 | * The timeout time will depend on toolchain and optimization level used, as |
| mbed_official | 15:a81a8d6c1dfe | 316 | * the timeout is a loop incrementing a value until it reaches the specified |
| mbed_official | 15:a81a8d6c1dfe | 317 | * timeout value. |
| mbed_official | 15:a81a8d6c1dfe | 318 | * |
| mbed_official | 15:a81a8d6c1dfe | 319 | * \subsubsection sda_hold SDA Hold Timeout |
| mbed_official | 15:a81a8d6c1dfe | 320 | * When using the I<SUP>2</SUP>C in slave mode, it will be important to |
| mbed_official | 15:a81a8d6c1dfe | 321 | * set a SDA hold time which assures that the master will be able to pick up |
| mbed_official | 15:a81a8d6c1dfe | 322 | * the bit sent from the slave. The SDA hold time makes sure that this is the |
| mbed_official | 15:a81a8d6c1dfe | 323 | * case by holding the data line low for a given period after the negative edge |
| mbed_official | 15:a81a8d6c1dfe | 324 | * on the clock. |
| mbed_official | 15:a81a8d6c1dfe | 325 | * |
| mbed_official | 15:a81a8d6c1dfe | 326 | * The SDA hold time is also available for the master driver, but is not a |
| mbed_official | 15:a81a8d6c1dfe | 327 | * necessity. |
| mbed_official | 15:a81a8d6c1dfe | 328 | * |
| mbed_official | 15:a81a8d6c1dfe | 329 | * \subsection asfdoc_sam0_sercom_i2c_sleep_modes Operation in Sleep Modes |
| mbed_official | 15:a81a8d6c1dfe | 330 | * The I<SUP>2</SUP>C module can operate in all sleep modes by setting |
| mbed_official | 15:a81a8d6c1dfe | 331 | * the run_in_standby Boolean in the \ref i2c_master_config or |
| mbed_official | 15:a81a8d6c1dfe | 332 | * \ref i2c_slave_config struct. |
| mbed_official | 15:a81a8d6c1dfe | 333 | * The operation in slave and master mode is shown in |
| mbed_official | 15:a81a8d6c1dfe | 334 | * \ref asfdoc_sam0_sercom_i2c_sleep_modes_table "the table below". |
| mbed_official | 15:a81a8d6c1dfe | 335 | * |
| mbed_official | 15:a81a8d6c1dfe | 336 | * \anchor asfdoc_sam0_sercom_i2c_sleep_modes_table |
| mbed_official | 15:a81a8d6c1dfe | 337 | * <table> |
| mbed_official | 15:a81a8d6c1dfe | 338 | * <caption>I<SUP>2</SUP>C Standby Operations</caption> |
| mbed_official | 15:a81a8d6c1dfe | 339 | * <tr> |
| mbed_official | 15:a81a8d6c1dfe | 340 | * <th>Run in standby</th> |
| mbed_official | 15:a81a8d6c1dfe | 341 | * <th>Slave</th> |
| mbed_official | 15:a81a8d6c1dfe | 342 | * <th>Master</th> |
| mbed_official | 15:a81a8d6c1dfe | 343 | * </tr> |
| mbed_official | 15:a81a8d6c1dfe | 344 | * <tr> |
| mbed_official | 15:a81a8d6c1dfe | 345 | * <td>false</td> |
| mbed_official | 15:a81a8d6c1dfe | 346 | * <td>Disabled, all reception is dropped</td> |
| mbed_official | 15:a81a8d6c1dfe | 347 | * <td>GCLK disabled when master is idle</td> |
| mbed_official | 15:a81a8d6c1dfe | 348 | * </tr> |
| mbed_official | 15:a81a8d6c1dfe | 349 | * <tr> |
| mbed_official | 15:a81a8d6c1dfe | 350 | * <td>true</td> |
| mbed_official | 15:a81a8d6c1dfe | 351 | * <td>Wake on address match when enabled</td> |
| mbed_official | 15:a81a8d6c1dfe | 352 | * <td>GCLK enabled while in sleep modes</td> |
| mbed_official | 15:a81a8d6c1dfe | 353 | * </tr> |
| mbed_official | 15:a81a8d6c1dfe | 354 | * </table> |
| mbed_official | 15:a81a8d6c1dfe | 355 | * |
| mbed_official | 15:a81a8d6c1dfe | 356 | * |
| mbed_official | 15:a81a8d6c1dfe | 357 | * \section asfdoc_sam0_sercom_i2c_special_considerations Special Considerations |
| mbed_official | 15:a81a8d6c1dfe | 358 | * |
| mbed_official | 15:a81a8d6c1dfe | 359 | * \if (I2C_MASTER_CALLBACK_MODE || I2C_SLAVE_CALLBACK_MODE) |
| mbed_official | 15:a81a8d6c1dfe | 360 | * \subsection asfdoc_sam0_sercom_i2c_common_interrupt Interrupt-driven Operation |
| mbed_official | 15:a81a8d6c1dfe | 361 | * While an interrupt-driven operation is in progress, subsequent calls to a |
| mbed_official | 15:a81a8d6c1dfe | 362 | * write or read operation will return the STATUS_BUSY flag, indicating that |
| mbed_official | 15:a81a8d6c1dfe | 363 | * only one operation is allowed at any given time. |
| mbed_official | 15:a81a8d6c1dfe | 364 | * |
| mbed_official | 15:a81a8d6c1dfe | 365 | * To check if another transmission can be initiated, the user can either call |
| mbed_official | 15:a81a8d6c1dfe | 366 | * another transfer operation, or use the |
| mbed_official | 15:a81a8d6c1dfe | 367 | * \ref i2c_master_get_job_status/\ref i2c_slave_get_job_status functions |
| mbed_official | 15:a81a8d6c1dfe | 368 | * depending on mode. |
| mbed_official | 15:a81a8d6c1dfe | 369 | * |
| mbed_official | 15:a81a8d6c1dfe | 370 | * If the user would like to get callback from operations while using the |
| mbed_official | 15:a81a8d6c1dfe | 371 | * interrupt-driven driver, the callback must be registered and then enabled |
| mbed_official | 15:a81a8d6c1dfe | 372 | * using the "register_callback" and "enable_callback" functions. |
| mbed_official | 15:a81a8d6c1dfe | 373 | * \else |
| mbed_official | 15:a81a8d6c1dfe | 374 | * There are no special considerations for this driver for the APIs listed in |
| mbed_official | 15:a81a8d6c1dfe | 375 | * this document. |
| mbed_official | 15:a81a8d6c1dfe | 376 | * \endif |
| mbed_official | 15:a81a8d6c1dfe | 377 | * |
| mbed_official | 15:a81a8d6c1dfe | 378 | * \section asfdoc_sam0_sercom_i2c_extra Extra Information |
| mbed_official | 15:a81a8d6c1dfe | 379 | * For extra information, see \ref asfdoc_sam0_sercom_i2c_extra_info_page. |
| mbed_official | 15:a81a8d6c1dfe | 380 | * This includes: |
| mbed_official | 15:a81a8d6c1dfe | 381 | * - \ref asfdoc_sam0_sercom_i2c_acronyms |
| mbed_official | 15:a81a8d6c1dfe | 382 | * - \ref asfdoc_sam0_sercom_i2c_extra_dependencies |
| mbed_official | 15:a81a8d6c1dfe | 383 | * - \ref asfdoc_sam0_sercom_i2c_extra_errata |
| mbed_official | 15:a81a8d6c1dfe | 384 | * - \ref asfdoc_sam0_sercom_i2c_extra_history |
| mbed_official | 15:a81a8d6c1dfe | 385 | * |
| mbed_official | 15:a81a8d6c1dfe | 386 | * \section asfdoc_sam0_sercom_i2c_examples Examples |
| mbed_official | 15:a81a8d6c1dfe | 387 | * |
| mbed_official | 15:a81a8d6c1dfe | 388 | * For a list of examples related to this driver, see |
| mbed_official | 15:a81a8d6c1dfe | 389 | * \ref asfdoc_sam0_sercom_i2c_exqsg. |
| mbed_official | 15:a81a8d6c1dfe | 390 | * |
| mbed_official | 15:a81a8d6c1dfe | 391 | * \section asfdoc_sam0_sercom_i2c_api_overview API Overview |
| mbed_official | 15:a81a8d6c1dfe | 392 | * @{ |
| mbed_official | 15:a81a8d6c1dfe | 393 | */ |
| mbed_official | 15:a81a8d6c1dfe | 394 | |
| mbed_official | 15:a81a8d6c1dfe | 395 | /** |
| mbed_official | 15:a81a8d6c1dfe | 396 | * \name Driver Feature Definition |
| mbed_official | 15:a81a8d6c1dfe | 397 | * Define SERCOM I<SUP>2</SUP>C driver features set according to different device family. |
| mbed_official | 15:a81a8d6c1dfe | 398 | * |
| mbed_official | 15:a81a8d6c1dfe | 399 | * \note The high speed mode and 10-bit address feature are not |
| mbed_official | 15:a81a8d6c1dfe | 400 | * supported by the driver now. |
| mbed_official | 15:a81a8d6c1dfe | 401 | * @{ |
| mbed_official | 15:a81a8d6c1dfe | 402 | */ |
| mbed_official | 15:a81a8d6c1dfe | 403 | #if (SAMD21) || (SAMR21) || (SAMD10) || (SAMD11) || (SAML21) || (SAMDA1) || \ |
| mbed_official | 15:a81a8d6c1dfe | 404 | (SAMC20) || (SAMC21) || defined(__DOXYGEN__) |
| mbed_official | 15:a81a8d6c1dfe | 405 | /** Fast mode plus and high speed support. */ |
| mbed_official | 15:a81a8d6c1dfe | 406 | # define FEATURE_I2C_FAST_MODE_PLUS_AND_HIGH_SPEED |
| mbed_official | 15:a81a8d6c1dfe | 407 | /** 10-bit address support. */ |
| mbed_official | 15:a81a8d6c1dfe | 408 | # define FEATURE_I2C_10_BIT_ADDRESS |
| mbed_official | 15:a81a8d6c1dfe | 409 | /** SCL stretch mode support. */ |
| mbed_official | 15:a81a8d6c1dfe | 410 | # define FEATURE_I2C_SCL_STRETCH_MODE |
| mbed_official | 15:a81a8d6c1dfe | 411 | /** SCL extend timeout support. */ |
| mbed_official | 15:a81a8d6c1dfe | 412 | # define FEATURE_I2C_SCL_EXTEND_TIMEOUT |
| mbed_official | 15:a81a8d6c1dfe | 413 | # define FEATURE_I2C_DMA_SUPPORT |
| mbed_official | 15:a81a8d6c1dfe | 414 | #endif |
| mbed_official | 15:a81a8d6c1dfe | 415 | /*@}*/ |
| mbed_official | 15:a81a8d6c1dfe | 416 | |
| mbed_official | 15:a81a8d6c1dfe | 417 | /** \brief Transfer direction |
| mbed_official | 15:a81a8d6c1dfe | 418 | * |
| mbed_official | 15:a81a8d6c1dfe | 419 | * For master: transfer direction or setting direction bit in address. |
| mbed_official | 15:a81a8d6c1dfe | 420 | * For slave: direction of request from master. |
| mbed_official | 15:a81a8d6c1dfe | 421 | */ |
| mbed_official | 15:a81a8d6c1dfe | 422 | enum i2c_transfer_direction { |
| mbed_official | 15:a81a8d6c1dfe | 423 | /** Master write operation is in progress. */ |
| mbed_official | 15:a81a8d6c1dfe | 424 | I2C_TRANSFER_WRITE = 0, |
| mbed_official | 15:a81a8d6c1dfe | 425 | /** Master read operation is in progress. */ |
| mbed_official | 15:a81a8d6c1dfe | 426 | I2C_TRANSFER_READ = 1, |
| mbed_official | 15:a81a8d6c1dfe | 427 | }; |
| mbed_official | 15:a81a8d6c1dfe | 428 | |
| mbed_official | 15:a81a8d6c1dfe | 429 | /** @} */ |
| mbed_official | 15:a81a8d6c1dfe | 430 | |
| mbed_official | 15:a81a8d6c1dfe | 431 | #ifdef __cplusplus |
| mbed_official | 15:a81a8d6c1dfe | 432 | } |
| mbed_official | 15:a81a8d6c1dfe | 433 | #endif |
| mbed_official | 15:a81a8d6c1dfe | 434 | |
| mbed_official | 15:a81a8d6c1dfe | 435 | /** |
| mbed_official | 15:a81a8d6c1dfe | 436 | * \page asfdoc_sam0_sercom_i2c_extra_info_page Extra Information for SERCOM I2C Driver |
| mbed_official | 15:a81a8d6c1dfe | 437 | * |
| mbed_official | 15:a81a8d6c1dfe | 438 | * \section asfdoc_sam0_sercom_i2c_acronyms Acronyms |
| mbed_official | 15:a81a8d6c1dfe | 439 | * \ref asfdoc_sam0_sercom_i2c_acronyms_table "Below" is a table listing the acronyms |
| mbed_official | 15:a81a8d6c1dfe | 440 | * used in this module, along with their intended meanings. |
| mbed_official | 15:a81a8d6c1dfe | 441 | * |
| mbed_official | 15:a81a8d6c1dfe | 442 | * \anchor asfdoc_sam0_sercom_i2c_acronyms_table |
| mbed_official | 15:a81a8d6c1dfe | 443 | * <table> |
| mbed_official | 15:a81a8d6c1dfe | 444 | * <caption>Acronyms</caption> |
| mbed_official | 15:a81a8d6c1dfe | 445 | * <tr> |
| mbed_official | 15:a81a8d6c1dfe | 446 | * <th>Acronym</th> |
| mbed_official | 15:a81a8d6c1dfe | 447 | * <th>Description</th> |
| mbed_official | 15:a81a8d6c1dfe | 448 | * </tr> |
| mbed_official | 15:a81a8d6c1dfe | 449 | * <tr> |
| mbed_official | 15:a81a8d6c1dfe | 450 | * <td>SDA</td> |
| mbed_official | 15:a81a8d6c1dfe | 451 | * <td>Serial Data Line</td> |
| mbed_official | 15:a81a8d6c1dfe | 452 | * </tr> |
| mbed_official | 15:a81a8d6c1dfe | 453 | * <tr> |
| mbed_official | 15:a81a8d6c1dfe | 454 | * <td>SCL</td> |
| mbed_official | 15:a81a8d6c1dfe | 455 | * <td>Serial Clock Line</td> |
| mbed_official | 15:a81a8d6c1dfe | 456 | * </tr> |
| mbed_official | 15:a81a8d6c1dfe | 457 | * <tr> |
| mbed_official | 15:a81a8d6c1dfe | 458 | * <td>SERCOM</td> |
| mbed_official | 15:a81a8d6c1dfe | 459 | * <td>Serial Communication Interface</td> |
| mbed_official | 15:a81a8d6c1dfe | 460 | * </tr> |
| mbed_official | 15:a81a8d6c1dfe | 461 | * <tr> |
| mbed_official | 15:a81a8d6c1dfe | 462 | * <td>DMA</td> |
| mbed_official | 15:a81a8d6c1dfe | 463 | * <td>Direct Memory Access</td> |
| mbed_official | 15:a81a8d6c1dfe | 464 | * </tr> |
| mbed_official | 15:a81a8d6c1dfe | 465 | * </table> |
| mbed_official | 15:a81a8d6c1dfe | 466 | * |
| mbed_official | 15:a81a8d6c1dfe | 467 | * \section asfdoc_sam0_sercom_i2c_extra_dependencies Dependencies |
| mbed_official | 15:a81a8d6c1dfe | 468 | * The I<SUP>2</SUP>C driver has the following dependencies: |
| mbed_official | 15:a81a8d6c1dfe | 469 | * \li \ref asfdoc_sam0_system_pinmux_group "System Pin Multiplexer Driver" |
| mbed_official | 15:a81a8d6c1dfe | 470 | * |
| mbed_official | 15:a81a8d6c1dfe | 471 | * |
| mbed_official | 15:a81a8d6c1dfe | 472 | * \section asfdoc_sam0_sercom_i2c_extra_errata Errata |
| mbed_official | 15:a81a8d6c1dfe | 473 | * There are no errata related to this driver. |
| mbed_official | 15:a81a8d6c1dfe | 474 | * |
| mbed_official | 15:a81a8d6c1dfe | 475 | * \section asfdoc_sam0_sercom_i2c_extra_history Module History |
| mbed_official | 15:a81a8d6c1dfe | 476 | * \ref asfdoc_sam0_sercom_i2c_extra_history_table "Below" is an overview of the |
| mbed_official | 15:a81a8d6c1dfe | 477 | * module history, detailing enhancements and fixes made to the module since |
| mbed_official | 15:a81a8d6c1dfe | 478 | * its first release. The current version of this corresponds to the newest |
| mbed_official | 15:a81a8d6c1dfe | 479 | * version listed in |
| mbed_official | 15:a81a8d6c1dfe | 480 | * \ref asfdoc_sam0_sercom_i2c_extra_history_table "the table below". |
| mbed_official | 15:a81a8d6c1dfe | 481 | * |
| mbed_official | 15:a81a8d6c1dfe | 482 | * \anchor asfdoc_sam0_sercom_i2c_extra_history_table |
| mbed_official | 15:a81a8d6c1dfe | 483 | * <table> |
| mbed_official | 15:a81a8d6c1dfe | 484 | * <caption>Module History</caption> |
| mbed_official | 15:a81a8d6c1dfe | 485 | * <tr> |
| mbed_official | 15:a81a8d6c1dfe | 486 | * <th>Changelog</th> |
| mbed_official | 15:a81a8d6c1dfe | 487 | * </tr> |
| mbed_official | 15:a81a8d6c1dfe | 488 | * <tr> |
| mbed_official | 15:a81a8d6c1dfe | 489 | * <td> |
| mbed_official | 15:a81a8d6c1dfe | 490 | * \li Added 10-bit addressing and high speed support in SAM D21 |
| mbed_official | 15:a81a8d6c1dfe | 491 | * \li Separate structure i2c_packet into i2c_master_packet and i2c_slave packet |
| mbed_official | 15:a81a8d6c1dfe | 492 | * </td> |
| mbed_official | 15:a81a8d6c1dfe | 493 | * </tr> |
| mbed_official | 15:a81a8d6c1dfe | 494 | * <tr> |
| mbed_official | 15:a81a8d6c1dfe | 495 | * <td> |
| mbed_official | 15:a81a8d6c1dfe | 496 | * \li Added support for SCL stretch and extended timeout hardware features in SAM D21 |
| mbed_official | 15:a81a8d6c1dfe | 497 | * \li Added fast mode plus support in SAM D21 |
| mbed_official | 15:a81a8d6c1dfe | 498 | * </td> |
| mbed_official | 15:a81a8d6c1dfe | 499 | * </tr> |
| mbed_official | 15:a81a8d6c1dfe | 500 | * <tr> |
| mbed_official | 15:a81a8d6c1dfe | 501 | * <td>Fixed incorrect logical mask for determining if a bus error has |
| mbed_official | 15:a81a8d6c1dfe | 502 | * occurred in I<SUP>2</SUP>C Slave mode |
| mbed_official | 15:a81a8d6c1dfe | 503 | * </td> |
| mbed_official | 15:a81a8d6c1dfe | 504 | * </tr> |
| mbed_official | 15:a81a8d6c1dfe | 505 | * <tr> |
| mbed_official | 15:a81a8d6c1dfe | 506 | * <td>Initial Release</td> |
| mbed_official | 15:a81a8d6c1dfe | 507 | * </tr> |
| mbed_official | 15:a81a8d6c1dfe | 508 | * </table> |
| mbed_official | 15:a81a8d6c1dfe | 509 | */ |
| mbed_official | 15:a81a8d6c1dfe | 510 | |
| mbed_official | 15:a81a8d6c1dfe | 511 | /** |
| mbed_official | 15:a81a8d6c1dfe | 512 | * \page asfdoc_sam0_sercom_i2c_exqsg Examples for SERCOM I2C Driver |
| mbed_official | 15:a81a8d6c1dfe | 513 | * |
| mbed_official | 15:a81a8d6c1dfe | 514 | * This is a list of the available Quick Start guides (QSGs) and example |
| mbed_official | 15:a81a8d6c1dfe | 515 | * applications for \ref asfdoc_sam0_sercom_i2c_group. QSGs are simple examples with |
| mbed_official | 15:a81a8d6c1dfe | 516 | * step-by-step instructions to configure and use this driver in a selection of |
| mbed_official | 15:a81a8d6c1dfe | 517 | * use cases. Note that QSGs can be compiled as a standalone application or be |
| mbed_official | 15:a81a8d6c1dfe | 518 | * added to the user application. |
| mbed_official | 15:a81a8d6c1dfe | 519 | * |
| mbed_official | 15:a81a8d6c1dfe | 520 | * \if I2C_MASTER_MODE |
| mbed_official | 15:a81a8d6c1dfe | 521 | * - \subpage asfdoc_sam0_sercom_i2c_master_basic_use_case "Quick Start Guide for the I2C Master module - Basic Use Case" |
| mbed_official | 15:a81a8d6c1dfe | 522 | * \endif |
| mbed_official | 15:a81a8d6c1dfe | 523 | * \if I2C_MASTER_CALLBACK_MODE |
| mbed_official | 15:a81a8d6c1dfe | 524 | * - \subpage asfdoc_sam0_sercom_i2c_master_callback_use_case "Quick Start Guide for the I2C Master module - Callback Use Case" |
| mbed_official | 15:a81a8d6c1dfe | 525 | * - \subpage asfdoc_sam0_sercom_i2c_master_dma_use_case "Quick Start Guide for the I2C Master module - DMA Use Case" |
| mbed_official | 15:a81a8d6c1dfe | 526 | * \endif |
| mbed_official | 15:a81a8d6c1dfe | 527 | * \if I2C_SLAVE_MODE |
| mbed_official | 15:a81a8d6c1dfe | 528 | * - \subpage asfdoc_sam0_sercom_i2c_slave_basic_use_case "Quick Start Guide for the I2C Slave module - Basic Use Case" |
| mbed_official | 15:a81a8d6c1dfe | 529 | * \endif |
| mbed_official | 15:a81a8d6c1dfe | 530 | * \if I2C_SLAVE_CALLBACK_MODE |
| mbed_official | 15:a81a8d6c1dfe | 531 | * - \subpage asfdoc_sam0_sercom_i2c_slave_callback_use_case "Quick Start Guide for the I2C Slave module - Callback Use Case" |
| mbed_official | 15:a81a8d6c1dfe | 532 | * - \subpage asfdoc_sam0_sercom_i2c_slave_dma_use_case "Quick Start Guide for the I2C Slave module - DMA Use Case" |
| mbed_official | 15:a81a8d6c1dfe | 533 | * \endif |
| mbed_official | 15:a81a8d6c1dfe | 534 | * |
| mbed_official | 15:a81a8d6c1dfe | 535 | * \page asfdoc_sam0_sercom_i2c_document_revision_history Document Revision History |
| mbed_official | 15:a81a8d6c1dfe | 536 | * |
| mbed_official | 15:a81a8d6c1dfe | 537 | * <table> |
| mbed_official | 15:a81a8d6c1dfe | 538 | * <tr> |
| mbed_official | 15:a81a8d6c1dfe | 539 | * <th>Doc. Rev.</td> |
| mbed_official | 15:a81a8d6c1dfe | 540 | * <th>Date</td> |
| mbed_official | 15:a81a8d6c1dfe | 541 | * <th>Comments</td> |
| mbed_official | 15:a81a8d6c1dfe | 542 | * </tr> |
| mbed_official | 15:a81a8d6c1dfe | 543 | * <tr> |
| mbed_official | 15:a81a8d6c1dfe | 544 | * <td>E</td> |
| mbed_official | 15:a81a8d6c1dfe | 545 | * <td>06/2015</td> |
| mbed_official | 15:a81a8d6c1dfe | 546 | * <td>Added SAM L21, SAMDAx and SAMC21 support.</td> |
| mbed_official | 15:a81a8d6c1dfe | 547 | * </tr> |
| mbed_official | 15:a81a8d6c1dfe | 548 | * <tr> |
| mbed_official | 15:a81a8d6c1dfe | 549 | * <td>D</td> |
| mbed_official | 15:a81a8d6c1dfe | 550 | * <td>12/2014</td> |
| mbed_official | 15:a81a8d6c1dfe | 551 | * <td>Added 10-bit addressing and high speed support in SAM D21 |
| mbed_official | 15:a81a8d6c1dfe | 552 | * Added SAM R21/D10/D11 support.</td> |
| mbed_official | 15:a81a8d6c1dfe | 553 | * </tr> |
| mbed_official | 15:a81a8d6c1dfe | 554 | * <tr> |
| mbed_official | 15:a81a8d6c1dfe | 555 | * <td>C</td> |
| mbed_official | 15:a81a8d6c1dfe | 556 | * <td>01/2014</td> |
| mbed_official | 15:a81a8d6c1dfe | 557 | * <td>Added the SAM D21 to the application note.</td> |
| mbed_official | 15:a81a8d6c1dfe | 558 | * </tr> |
| mbed_official | 15:a81a8d6c1dfe | 559 | * <tr> |
| mbed_official | 15:a81a8d6c1dfe | 560 | * <td>B</td> |
| mbed_official | 15:a81a8d6c1dfe | 561 | * <td>06/2013</td> |
| mbed_official | 15:a81a8d6c1dfe | 562 | * <td>Corrected documentation typos. Updated I<SUP>2</SUP>C Bus State Diagram.</td> |
| mbed_official | 15:a81a8d6c1dfe | 563 | * </tr> |
| mbed_official | 15:a81a8d6c1dfe | 564 | * <tr> |
| mbed_official | 15:a81a8d6c1dfe | 565 | * <td>A</td> |
| mbed_official | 15:a81a8d6c1dfe | 566 | * <td>06/2013</td> |
| mbed_official | 15:a81a8d6c1dfe | 567 | * <td>Initial release.</td> |
| mbed_official | 15:a81a8d6c1dfe | 568 | * </tr> |
| mbed_official | 15:a81a8d6c1dfe | 569 | * </table> |
| mbed_official | 15:a81a8d6c1dfe | 570 | */ |
| mbed_official | 15:a81a8d6c1dfe | 571 | |
| mbed_official | 15:a81a8d6c1dfe | 572 | #endif /* I2C_COMMON_H_INCLUDED */ |