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targets/hal/TARGET_Atmel/TARGET_SAM_CortexM0P/drivers/sercom/usart/usart.h@15:a81a8d6c1dfe, 2015-11-04 (annotated)

Committer:
mbed_official
Date:
Wed Nov 04 16:30:11 2015 +0000
Revision:
15:a81a8d6c1dfe
Synchronized with git revision 46af745ef4405614c3fa49abbd9a706a362ea514



Full URL: https://github.com/mbedmicro/mbed/commit/46af745ef4405614c3fa49abbd9a706a362ea514/



Renamed TARGET_SAM_CortexM0+ to TARGET_SAM_CortexM0P for compatiblity with online compiler

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 15:a81a8d6c1dfe 1 /**
mbed_official 15:a81a8d6c1dfe 2 *
mbed_official 15:a81a8d6c1dfe 3 * \file
mbed_official 15:a81a8d6c1dfe 4 *
mbed_official 15:a81a8d6c1dfe 5 * \brief SAM SERCOM USART Driver
mbed_official 15:a81a8d6c1dfe 6 *
mbed_official 15:a81a8d6c1dfe 7 * Copyright (C) 2012-2015 Atmel Corporation. All rights reserved.
mbed_official 15:a81a8d6c1dfe 8 *
mbed_official 15:a81a8d6c1dfe 9 * \asf_license_start
mbed_official 15:a81a8d6c1dfe 10 *
mbed_official 15:a81a8d6c1dfe 11 * \page License
mbed_official 15:a81a8d6c1dfe 12 *
mbed_official 15:a81a8d6c1dfe 13 * Redistribution and use in source and binary forms, with or without
mbed_official 15:a81a8d6c1dfe 14 * modification, are permitted provided that the following conditions are met:
mbed_official 15:a81a8d6c1dfe 15 *
mbed_official 15:a81a8d6c1dfe 16 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 15:a81a8d6c1dfe 17 * this list of conditions and the following disclaimer.
mbed_official 15:a81a8d6c1dfe 18 *
mbed_official 15:a81a8d6c1dfe 19 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 15:a81a8d6c1dfe 20 * this list of conditions and the following disclaimer in the documentation
mbed_official 15:a81a8d6c1dfe 21 * and/or other materials provided with the distribution.
mbed_official 15:a81a8d6c1dfe 22 *
mbed_official 15:a81a8d6c1dfe 23 * 3. The name of Atmel may not be used to endorse or promote products derived
mbed_official 15:a81a8d6c1dfe 24 * from this software without specific prior written permission.
mbed_official 15:a81a8d6c1dfe 25 *
mbed_official 15:a81a8d6c1dfe 26 * 4. This software may only be redistributed and used in connection with an
mbed_official 15:a81a8d6c1dfe 27 * Atmel microcontroller product.
mbed_official 15:a81a8d6c1dfe 28 *
mbed_official 15:a81a8d6c1dfe 29 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
mbed_official 15:a81a8d6c1dfe 30 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
mbed_official 15:a81a8d6c1dfe 31 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
mbed_official 15:a81a8d6c1dfe 32 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
mbed_official 15:a81a8d6c1dfe 33 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 15:a81a8d6c1dfe 34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
mbed_official 15:a81a8d6c1dfe 35 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
mbed_official 15:a81a8d6c1dfe 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
mbed_official 15:a81a8d6c1dfe 37 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 15:a81a8d6c1dfe 38 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 15:a81a8d6c1dfe 39 * POSSIBILITY OF SUCH DAMAGE.
mbed_official 15:a81a8d6c1dfe 40 *
mbed_official 15:a81a8d6c1dfe 41 * \asf_license_stop
mbed_official 15:a81a8d6c1dfe 42 *
mbed_official 15:a81a8d6c1dfe 43 */
mbed_official 15:a81a8d6c1dfe 44 /*
mbed_official 15:a81a8d6c1dfe 45 * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
mbed_official 15:a81a8d6c1dfe 46 */
mbed_official 15:a81a8d6c1dfe 47 #ifndef USART_H_INCLUDED
mbed_official 15:a81a8d6c1dfe 48 #define USART_H_INCLUDED
mbed_official 15:a81a8d6c1dfe 49
mbed_official 15:a81a8d6c1dfe 50 /**
mbed_official 15:a81a8d6c1dfe 51 * \defgroup asfdoc_sam0_sercom_usart_group SAM Serial USART Driver (SERCOM USART)
mbed_official 15:a81a8d6c1dfe 52 *
mbed_official 15:a81a8d6c1dfe 53 * This driver for Atmel&reg; | SMART SAM devices provides an interface for the configuration
mbed_official 15:a81a8d6c1dfe 54 * and management of the SERCOM module in its USART mode to transfer or receive
mbed_official 15:a81a8d6c1dfe 55 * USART data frames. The following driver API modes are covered by this
mbed_official 15:a81a8d6c1dfe 56 * manual:
mbed_official 15:a81a8d6c1dfe 57 *
mbed_official 15:a81a8d6c1dfe 58 * - Polled APIs
mbed_official 15:a81a8d6c1dfe 59 * \if USART_CALLBACK_MODE
mbed_official 15:a81a8d6c1dfe 60 * - Callback APIs
mbed_official 15:a81a8d6c1dfe 61 * \endif
mbed_official 15:a81a8d6c1dfe 62 *
mbed_official 15:a81a8d6c1dfe 63 * The following peripherals are used by this module:
mbed_official 15:a81a8d6c1dfe 64 * - SERCOM (Serial Communication Interface)
mbed_official 15:a81a8d6c1dfe 65 *
mbed_official 15:a81a8d6c1dfe 66 * The following devices can use this module:
mbed_official 15:a81a8d6c1dfe 67 * - Atmel | SMART SAM D20/D21
mbed_official 15:a81a8d6c1dfe 68 * - Atmel | SMART SAM R21
mbed_official 15:a81a8d6c1dfe 69 * - Atmel | SMART SAM D10/D11
mbed_official 15:a81a8d6c1dfe 70 * - Atmel | SMART SAM L21
mbed_official 15:a81a8d6c1dfe 71 * - Atmel | SMART SAM DAx
mbed_official 15:a81a8d6c1dfe 72 * - Atmel | SMART SAM C20/C21
mbed_official 15:a81a8d6c1dfe 73 *
mbed_official 15:a81a8d6c1dfe 74 * The outline of this documentation is as follows:
mbed_official 15:a81a8d6c1dfe 75 * - \ref asfdoc_sam0_sercom_usart_prerequisites
mbed_official 15:a81a8d6c1dfe 76 * - \ref asfdoc_sam0_sercom_usart_overview
mbed_official 15:a81a8d6c1dfe 77 * - \ref asfdoc_sam0_sercom_usart_special_considerations
mbed_official 15:a81a8d6c1dfe 78 * - \ref asfdoc_sam0_sercom_usart_extra_info
mbed_official 15:a81a8d6c1dfe 79 * - \ref asfdoc_sam0_sercom_usart_examples
mbed_official 15:a81a8d6c1dfe 80 * - \ref asfdoc_sam0_sercom_usart_api_overview
mbed_official 15:a81a8d6c1dfe 81 *
mbed_official 15:a81a8d6c1dfe 82 * \section asfdoc_sam0_sercom_usart_prerequisites Prerequisites
mbed_official 15:a81a8d6c1dfe 83 *
mbed_official 15:a81a8d6c1dfe 84 * To use the USART you need to have a GCLK generator enabled and running
mbed_official 15:a81a8d6c1dfe 85 * that can be used as the SERCOM clock source. This can either be configured
mbed_official 15:a81a8d6c1dfe 86 * in conf_clocks.h or by using the system clock driver.
mbed_official 15:a81a8d6c1dfe 87 *
mbed_official 15:a81a8d6c1dfe 88 * \section asfdoc_sam0_sercom_usart_overview Module Overview
mbed_official 15:a81a8d6c1dfe 89 *
mbed_official 15:a81a8d6c1dfe 90 * This driver will use one (or more) SERCOM interfaces on the system
mbed_official 15:a81a8d6c1dfe 91 * and configure it to run as a USART interface in either synchronous
mbed_official 15:a81a8d6c1dfe 92 * or asynchronous mode.
mbed_official 15:a81a8d6c1dfe 93 *
mbed_official 15:a81a8d6c1dfe 94 * \subsection asfdoc_sam0_sercom_usart_features Driver Feature Macro Definition
mbed_official 15:a81a8d6c1dfe 95 * <table>
mbed_official 15:a81a8d6c1dfe 96 * <tr>
mbed_official 15:a81a8d6c1dfe 97 * <th>Driver Feature Macro</th>
mbed_official 15:a81a8d6c1dfe 98 * <th>Supported devices</th>
mbed_official 15:a81a8d6c1dfe 99 * </tr>
mbed_official 15:a81a8d6c1dfe 100 * <tr>
mbed_official 15:a81a8d6c1dfe 101 * <td>FEATURE_USART_SYNC_SCHEME_V2</td>
mbed_official 15:a81a8d6c1dfe 102 * <td>SAM D21/R21/D10/D11/L21/DAx/C20/C21</td>
mbed_official 15:a81a8d6c1dfe 103 * </tr>
mbed_official 15:a81a8d6c1dfe 104 * <tr>
mbed_official 15:a81a8d6c1dfe 105 * <td>FEATURE_USART_OVER_SAMPLE</td>
mbed_official 15:a81a8d6c1dfe 106 * <td>SAM D21/R21/D10/D11/L21/DAx/C20/C21</td>
mbed_official 15:a81a8d6c1dfe 107 * </tr>
mbed_official 15:a81a8d6c1dfe 108 * <tr>
mbed_official 15:a81a8d6c1dfe 109 * <td>FEATURE_USART_HARDWARE_FLOW_CONTROL</td>
mbed_official 15:a81a8d6c1dfe 110 * <td>SAM D21/R21/D10/D11/L21/DAx/C20/C21</td>
mbed_official 15:a81a8d6c1dfe 111 * </tr>
mbed_official 15:a81a8d6c1dfe 112 * <tr>
mbed_official 15:a81a8d6c1dfe 113 * <td>FEATURE_USART_IRDA</td>
mbed_official 15:a81a8d6c1dfe 114 * <td>SAM D21/R21/D10/D11/L21/DAx/C20/C21</td>
mbed_official 15:a81a8d6c1dfe 115 * </tr>
mbed_official 15:a81a8d6c1dfe 116 * <tr>
mbed_official 15:a81a8d6c1dfe 117 * <td>FEATURE_USART_LIN_SLAVE</td>
mbed_official 15:a81a8d6c1dfe 118 * <td>SAM D21/R21/D10/D11/L21/DAx/C20/C21</td>
mbed_official 15:a81a8d6c1dfe 119 * </tr>
mbed_official 15:a81a8d6c1dfe 120 * <tr>
mbed_official 15:a81a8d6c1dfe 121 * <td>FEATURE_USART_COLLISION_DECTION</td>
mbed_official 15:a81a8d6c1dfe 122 * <td>SAM D21/R21/D10/D11/L21/DAx/C20/C21</td>
mbed_official 15:a81a8d6c1dfe 123 * </tr>
mbed_official 15:a81a8d6c1dfe 124 * <tr>
mbed_official 15:a81a8d6c1dfe 125 * <td>FEATURE_USART_START_FRAME_DECTION</td>
mbed_official 15:a81a8d6c1dfe 126 * <td>SAM D21/R21/D10/D11/L21/DAx/C20/C21</td>
mbed_official 15:a81a8d6c1dfe 127 * </tr>
mbed_official 15:a81a8d6c1dfe 128 * <tr>
mbed_official 15:a81a8d6c1dfe 129 * <td>FEATURE_USART_IMMEDIATE_BUFFER_OVERFLOW_NOTIFICATION</td>
mbed_official 15:a81a8d6c1dfe 130 * <td>SAM D21/R21/D10/D11/L21/DAx/C20/C21</td>
mbed_official 15:a81a8d6c1dfe 131 * </tr>
mbed_official 15:a81a8d6c1dfe 132 * <tr>
mbed_official 15:a81a8d6c1dfe 133 * <td>FEATURE_USART_RS485</td>
mbed_official 15:a81a8d6c1dfe 134 * <td>SAM C20/C21</td>
mbed_official 15:a81a8d6c1dfe 135 * </tr>
mbed_official 15:a81a8d6c1dfe 136 * <tr>
mbed_official 15:a81a8d6c1dfe 137 * <td>FEATURE_USART_LIN_MASTER</td>
mbed_official 15:a81a8d6c1dfe 138 * <td>SAM C20/C21</td>
mbed_official 15:a81a8d6c1dfe 139 * </tr>
mbed_official 15:a81a8d6c1dfe 140 * </table>
mbed_official 15:a81a8d6c1dfe 141 * \note The specific features are only available in the driver when the
mbed_official 15:a81a8d6c1dfe 142 * selected device supports those features.
mbed_official 15:a81a8d6c1dfe 143 *
mbed_official 15:a81a8d6c1dfe 144 * \subsection asfdoc_sam0_sercom_usart_overview_frame_format Frame Format
mbed_official 15:a81a8d6c1dfe 145 *
mbed_official 15:a81a8d6c1dfe 146 * Communication is based on frames, where the frame format can be customized
mbed_official 15:a81a8d6c1dfe 147 * to accommodate a wide range of standards. A frame consists of a start bit,
mbed_official 15:a81a8d6c1dfe 148 * a number of data bits, an optional parity bit for error detection as well
mbed_official 15:a81a8d6c1dfe 149 * as a configurable length stop bit(s) - see
mbed_official 15:a81a8d6c1dfe 150 * \ref asfdoc_sam0_sercom_usart_frame_diagram "the figure below".
mbed_official 15:a81a8d6c1dfe 151 * \ref asfdoc_sam0_sercom_usart_frame_params "The table below" shows the
mbed_official 15:a81a8d6c1dfe 152 * available parameters you can change in a frame.
mbed_official 15:a81a8d6c1dfe 153 *
mbed_official 15:a81a8d6c1dfe 154 * \anchor asfdoc_sam0_sercom_usart_frame_params
mbed_official 15:a81a8d6c1dfe 155 * <table>
mbed_official 15:a81a8d6c1dfe 156 * <caption>USART Frame Parameters</caption>
mbed_official 15:a81a8d6c1dfe 157 * <tr>
mbed_official 15:a81a8d6c1dfe 158 * <th>Parameter</th>
mbed_official 15:a81a8d6c1dfe 159 * <th>Options</th>
mbed_official 15:a81a8d6c1dfe 160 * </tr>
mbed_official 15:a81a8d6c1dfe 161 * <tr>
mbed_official 15:a81a8d6c1dfe 162 * <td>Start bit</td>
mbed_official 15:a81a8d6c1dfe 163 * <td>1</td>
mbed_official 15:a81a8d6c1dfe 164 * </tr>
mbed_official 15:a81a8d6c1dfe 165 * <tr>
mbed_official 15:a81a8d6c1dfe 166 * <td>Data bits</td>
mbed_official 15:a81a8d6c1dfe 167 * <td>5, 6, 7, 8, 9</td>
mbed_official 15:a81a8d6c1dfe 168 * </tr>
mbed_official 15:a81a8d6c1dfe 169 * <tr>
mbed_official 15:a81a8d6c1dfe 170 * <td>Parity bit</td>
mbed_official 15:a81a8d6c1dfe 171 * <td>None, Even, Odd</td>
mbed_official 15:a81a8d6c1dfe 172 * </tr>
mbed_official 15:a81a8d6c1dfe 173 * <tr>
mbed_official 15:a81a8d6c1dfe 174 * <td>Stop bits</td>
mbed_official 15:a81a8d6c1dfe 175 * <td>1, 2</td>
mbed_official 15:a81a8d6c1dfe 176 * </tr>
mbed_official 15:a81a8d6c1dfe 177 * </table>
mbed_official 15:a81a8d6c1dfe 178 *
mbed_official 15:a81a8d6c1dfe 179 * \anchor asfdoc_sam0_sercom_usart_frame_diagram
mbed_official 15:a81a8d6c1dfe 180 * \image html usart_frame.svg "USART Frame Overview" width=100%
mbed_official 15:a81a8d6c1dfe 181 *
mbed_official 15:a81a8d6c1dfe 182 * \subsection asfdoc_sam0_sercom_usart_overview_sync Synchronous Mode
mbed_official 15:a81a8d6c1dfe 183 *
mbed_official 15:a81a8d6c1dfe 184 * In synchronous mode a dedicated clock line is provided; either by the USART
mbed_official 15:a81a8d6c1dfe 185 * itself if in master mode, or by an external master if in slave mode.
mbed_official 15:a81a8d6c1dfe 186 * Maximum transmission speed is the same as the GCLK clocking the USART
mbed_official 15:a81a8d6c1dfe 187 * peripheral when in slave mode, and the GCLK divided by two if in
mbed_official 15:a81a8d6c1dfe 188 * master mode. In synchronous mode the interface needs three lines to
mbed_official 15:a81a8d6c1dfe 189 * communicate:
mbed_official 15:a81a8d6c1dfe 190 * - TX (Transmit pin)
mbed_official 15:a81a8d6c1dfe 191 * - RX (Receive pin)
mbed_official 15:a81a8d6c1dfe 192 * - XCK (Clock pin)
mbed_official 15:a81a8d6c1dfe 193 *
mbed_official 15:a81a8d6c1dfe 194 * \subsubsection asfdoc_sam0_sercom_usart_overview_sync_sampling Data Sampling
mbed_official 15:a81a8d6c1dfe 195 * In synchronous mode the data is sampled on either the rising or falling edge
mbed_official 15:a81a8d6c1dfe 196 * of the clock signal. This is configured by setting the clock polarity in the
mbed_official 15:a81a8d6c1dfe 197 * configuration struct.
mbed_official 15:a81a8d6c1dfe 198 *
mbed_official 15:a81a8d6c1dfe 199 * \subsection asfdoc_sam0_sercom_usart_overview_async Asynchronous Mode
mbed_official 15:a81a8d6c1dfe 200 *
mbed_official 15:a81a8d6c1dfe 201 * In asynchronous mode no dedicated clock line is used, and the communication
mbed_official 15:a81a8d6c1dfe 202 * is based on matching the clock speed on the transmitter and receiver. The
mbed_official 15:a81a8d6c1dfe 203 * clock is generated from the internal SERCOM baudrate generator, and the
mbed_official 15:a81a8d6c1dfe 204 * frames are synchronized by using the frame start bits. Maximum transmission
mbed_official 15:a81a8d6c1dfe 205 * speed is limited to the SERCOM GCLK divided by 16.
mbed_official 15:a81a8d6c1dfe 206 * In asynchronous mode the interface only needs two lines to communicate:
mbed_official 15:a81a8d6c1dfe 207 * - TX (Transmit pin)
mbed_official 15:a81a8d6c1dfe 208 * - RX (Receive pin)
mbed_official 15:a81a8d6c1dfe 209 *
mbed_official 15:a81a8d6c1dfe 210 * \subsubsection asfdoc_sam0_sercom_usart_overview_async_clock_matching Transmitter/receiver Clock Matching
mbed_official 15:a81a8d6c1dfe 211 *
mbed_official 15:a81a8d6c1dfe 212 * For successful transmit and receive using the asynchronous mode the receiver
mbed_official 15:a81a8d6c1dfe 213 * and transmitter clocks needs to be closely matched. When receiving a frame
mbed_official 15:a81a8d6c1dfe 214 * that does not match the selected baudrate closely enough the receiver will
mbed_official 15:a81a8d6c1dfe 215 * be unable to synchronize the frame(s), and garbage transmissions will
mbed_official 15:a81a8d6c1dfe 216 * result.
mbed_official 15:a81a8d6c1dfe 217 *
mbed_official 15:a81a8d6c1dfe 218 * \subsection asfdoc_sam0_sercom_usart_parity Parity
mbed_official 15:a81a8d6c1dfe 219 * Parity can be enabled to detect if a transmission was in error. This is done
mbed_official 15:a81a8d6c1dfe 220 * by counting the number of "1" bits in the frame. When using Even parity the
mbed_official 15:a81a8d6c1dfe 221 * parity bit will be set if the total number of "1"s in the frame are an even
mbed_official 15:a81a8d6c1dfe 222 * number. If using Odd parity the parity bit will be set if the total number
mbed_official 15:a81a8d6c1dfe 223 * of "1"s are Odd.
mbed_official 15:a81a8d6c1dfe 224 *
mbed_official 15:a81a8d6c1dfe 225 * When receiving a character the receiver will count the number of "1"s in the
mbed_official 15:a81a8d6c1dfe 226 * frame and give an error if the received frame and parity bit disagree.
mbed_official 15:a81a8d6c1dfe 227 *
mbed_official 15:a81a8d6c1dfe 228 * \subsection asfdoc_sam0_sercom_usart_overview_pin_configuration GPIO Configuration
mbed_official 15:a81a8d6c1dfe 229 *
mbed_official 15:a81a8d6c1dfe 230 * The SERCOM module has four internal pads; the RX pin can be placed freely on
mbed_official 15:a81a8d6c1dfe 231 * any one of the four pads, and the TX and XCK pins have two predefined
mbed_official 15:a81a8d6c1dfe 232 * positions that can be selected as a pair. The pads can then be routed to an
mbed_official 15:a81a8d6c1dfe 233 * external GPIO pin using the normal pin multiplexing scheme on the SAM.
mbed_official 15:a81a8d6c1dfe 234 *
mbed_official 15:a81a8d6c1dfe 235 * \section asfdoc_sam0_sercom_usart_special_considerations Special Considerations
mbed_official 15:a81a8d6c1dfe 236 *
mbed_official 15:a81a8d6c1dfe 237 * \if USART_CALLBACK_MODE
mbed_official 15:a81a8d6c1dfe 238 * Never execute large portions of code in the callbacks. These
mbed_official 15:a81a8d6c1dfe 239 * are run from the interrupt routine, and thus having long callbacks will
mbed_official 15:a81a8d6c1dfe 240 * keep the processor in the interrupt handler for an equally long time.
mbed_official 15:a81a8d6c1dfe 241 * A common way to handle this is to use global flags signaling the
mbed_official 15:a81a8d6c1dfe 242 * main application that an interrupt event has happened, and only do the
mbed_official 15:a81a8d6c1dfe 243 * minimal needed processing in the callback.
mbed_official 15:a81a8d6c1dfe 244 * \else
mbed_official 15:a81a8d6c1dfe 245 * No special considerations.
mbed_official 15:a81a8d6c1dfe 246 * \endif
mbed_official 15:a81a8d6c1dfe 247 *
mbed_official 15:a81a8d6c1dfe 248 * \section asfdoc_sam0_sercom_usart_extra_info Extra Information
mbed_official 15:a81a8d6c1dfe 249 *
mbed_official 15:a81a8d6c1dfe 250 * For extra information, see \ref asfdoc_sam0_sercom_usart_extra. This includes:
mbed_official 15:a81a8d6c1dfe 251 * - \ref asfdoc_sam0_sercom_usart_extra_acronyms
mbed_official 15:a81a8d6c1dfe 252 * - \ref asfdoc_sam0_sercom_usart_extra_dependencies
mbed_official 15:a81a8d6c1dfe 253 * - \ref asfdoc_sam0_sercom_usart_extra_errata
mbed_official 15:a81a8d6c1dfe 254 * - \ref asfdoc_sam0_sercom_usart_extra_history
mbed_official 15:a81a8d6c1dfe 255 *
mbed_official 15:a81a8d6c1dfe 256 * \section asfdoc_sam0_sercom_usart_examples Examples
mbed_official 15:a81a8d6c1dfe 257 *
mbed_official 15:a81a8d6c1dfe 258 * For a list of examples related to this driver, see
mbed_official 15:a81a8d6c1dfe 259 * \ref asfdoc_sam0_sercom_usart_exqsg.
mbed_official 15:a81a8d6c1dfe 260 *
mbed_official 15:a81a8d6c1dfe 261 * \section asfdoc_sam0_sercom_usart_api_overview API Overview
mbed_official 15:a81a8d6c1dfe 262 * @{
mbed_official 15:a81a8d6c1dfe 263 */
mbed_official 15:a81a8d6c1dfe 264
mbed_official 15:a81a8d6c1dfe 265 #include <compiler.h>
mbed_official 15:a81a8d6c1dfe 266 #include <sercom.h>
mbed_official 15:a81a8d6c1dfe 267 #include <pinmux.h>
mbed_official 15:a81a8d6c1dfe 268
mbed_official 15:a81a8d6c1dfe 269 #if USART_CALLBACK_MODE == true
mbed_official 15:a81a8d6c1dfe 270 # include <sercom_interrupt.h>
mbed_official 15:a81a8d6c1dfe 271 #endif
mbed_official 15:a81a8d6c1dfe 272
mbed_official 15:a81a8d6c1dfe 273 #ifdef __cplusplus
mbed_official 15:a81a8d6c1dfe 274 extern "C" {
mbed_official 15:a81a8d6c1dfe 275 #endif
mbed_official 15:a81a8d6c1dfe 276
mbed_official 15:a81a8d6c1dfe 277 /**
mbed_official 15:a81a8d6c1dfe 278 * \name Driver Feature Definition
mbed_official 15:a81a8d6c1dfe 279 * Define SERCOM USART features set according to different device family.
mbed_official 15:a81a8d6c1dfe 280 * @{
mbed_official 15:a81a8d6c1dfe 281 */
mbed_official 15:a81a8d6c1dfe 282 #if (SAMD21) || (SAMR21) || (SAMD10) || (SAMD11) || (SAML21) || \
mbed_official 15:a81a8d6c1dfe 283 (SAMDA1) || (SAMC20) || (SAMC21) || defined(__DOXYGEN__)
mbed_official 15:a81a8d6c1dfe 284 /** Usart sync scheme version 2. */
mbed_official 15:a81a8d6c1dfe 285 # define FEATURE_USART_SYNC_SCHEME_V2
mbed_official 15:a81a8d6c1dfe 286 /** Usart over sampling. */
mbed_official 15:a81a8d6c1dfe 287 # define FEATURE_USART_OVER_SAMPLE
mbed_official 15:a81a8d6c1dfe 288 /** Usart hardware control flow. */
mbed_official 15:a81a8d6c1dfe 289 # define FEATURE_USART_HARDWARE_FLOW_CONTROL
mbed_official 15:a81a8d6c1dfe 290 /** IrDA mode. */
mbed_official 15:a81a8d6c1dfe 291 # define FEATURE_USART_IRDA
mbed_official 15:a81a8d6c1dfe 292 /** LIN slave mode. */
mbed_official 15:a81a8d6c1dfe 293 # define FEATURE_USART_LIN_SLAVE
mbed_official 15:a81a8d6c1dfe 294 /** Usart collision detection. */
mbed_official 15:a81a8d6c1dfe 295 # define FEATURE_USART_COLLISION_DECTION
mbed_official 15:a81a8d6c1dfe 296 /** Usart start frame detection. */
mbed_official 15:a81a8d6c1dfe 297 # define FEATURE_USART_START_FRAME_DECTION
mbed_official 15:a81a8d6c1dfe 298 /** Usart start buffer overflow notification. */
mbed_official 15:a81a8d6c1dfe 299 # define FEATURE_USART_IMMEDIATE_BUFFER_OVERFLOW_NOTIFICATION
mbed_official 15:a81a8d6c1dfe 300 #endif
mbed_official 15:a81a8d6c1dfe 301
mbed_official 15:a81a8d6c1dfe 302 #if (SAMC20) || (SAMC21) || defined(__DOXYGEN__)
mbed_official 15:a81a8d6c1dfe 303 /** LIN master mode. */
mbed_official 15:a81a8d6c1dfe 304 #define FEATURE_USART_LIN_MASTER
mbed_official 15:a81a8d6c1dfe 305 /** RS485 mode. */
mbed_official 15:a81a8d6c1dfe 306 # define FEATURE_USART_RS485
mbed_official 15:a81a8d6c1dfe 307 #endif
mbed_official 15:a81a8d6c1dfe 308 /*@}*/
mbed_official 15:a81a8d6c1dfe 309
mbed_official 15:a81a8d6c1dfe 310 #ifdef FEATURE_USART_LIN_MASTER
mbed_official 15:a81a8d6c1dfe 311 /**
mbed_official 15:a81a8d6c1dfe 312 * \brief LIN Node Type.
mbed_official 15:a81a8d6c1dfe 313 *
mbed_official 15:a81a8d6c1dfe 314 * LIN node type.
mbed_official 15:a81a8d6c1dfe 315 */
mbed_official 15:a81a8d6c1dfe 316 enum lin_node_type {
mbed_official 15:a81a8d6c1dfe 317 /** LIN master mode */
mbed_official 15:a81a8d6c1dfe 318 LIN_MASTER_NODE = SERCOM_USART_CTRLA_FORM(0x02),
mbed_official 15:a81a8d6c1dfe 319 /** LIN slave mode */
mbed_official 15:a81a8d6c1dfe 320 LIN_SLAVE_NODE = SERCOM_USART_CTRLA_FORM(0x04),
mbed_official 15:a81a8d6c1dfe 321 /** Neither LIN master nor LIN slave mode */
mbed_official 15:a81a8d6c1dfe 322 LIN_INVALID_MODE = SERCOM_USART_CTRLA_FORM(0x00),
mbed_official 15:a81a8d6c1dfe 323 };
mbed_official 15:a81a8d6c1dfe 324
mbed_official 15:a81a8d6c1dfe 325 /**
mbed_official 15:a81a8d6c1dfe 326 * \brief LIN Master Command Enum.
mbed_official 15:a81a8d6c1dfe 327 *
mbed_official 15:a81a8d6c1dfe 328 * LIN master command enum.
mbed_official 15:a81a8d6c1dfe 329 */
mbed_official 15:a81a8d6c1dfe 330 enum lin_master_cmd {
mbed_official 15:a81a8d6c1dfe 331 /** LIN master software control transmission command */
mbed_official 15:a81a8d6c1dfe 332 LIN_MASTER_SOFTWARE_CONTROL_TRANSMIT_CMD = SERCOM_USART_CTRLB_LINCMD(0x01),
mbed_official 15:a81a8d6c1dfe 333 /** LIN master automatically transmission command */
mbed_official 15:a81a8d6c1dfe 334 LIN_MASTER_AUTO_TRANSMIT_CMD = SERCOM_USART_CTRLB_LINCMD(0x02),
mbed_official 15:a81a8d6c1dfe 335 };
mbed_official 15:a81a8d6c1dfe 336
mbed_official 15:a81a8d6c1dfe 337 /**
mbed_official 15:a81a8d6c1dfe 338 * \brief LIN Master Header Delay.
mbed_official 15:a81a8d6c1dfe 339 *
mbed_official 15:a81a8d6c1dfe 340 * LIN master header delay between break and sync transmission,
mbed_official 15:a81a8d6c1dfe 341 * and between the sync and identifier (ID) fields.
mbed_official 15:a81a8d6c1dfe 342 * This field is only valid when using automatically transmission command
mbed_official 15:a81a8d6c1dfe 343 */
mbed_official 15:a81a8d6c1dfe 344 enum lin_master_header_delay {
mbed_official 15:a81a8d6c1dfe 345 /** Delay between break and sync transmission is 1 bit time.
mbed_official 15:a81a8d6c1dfe 346 Delay between sync and ID transmission is 1 bit time. */
mbed_official 15:a81a8d6c1dfe 347 LIN_MASTER_HEADER_DELAY_0 = SERCOM_USART_CTRLC_HDRDLY(0x0),
mbed_official 15:a81a8d6c1dfe 348 /** Delay between break and sync transmission is 4 bit time.
mbed_official 15:a81a8d6c1dfe 349 Delay between sync and ID transmission is 4 bit time. */
mbed_official 15:a81a8d6c1dfe 350 LIN_MASTER_HEADER_DELAY_1 = SERCOM_USART_CTRLC_HDRDLY(0x01),
mbed_official 15:a81a8d6c1dfe 351 /** Delay between break and sync transmission is 8 bit time.
mbed_official 15:a81a8d6c1dfe 352 Delay between sync and ID transmission is 4 bit time. */
mbed_official 15:a81a8d6c1dfe 353 LIN_MASTER_HEADER_DELAY_2 = SERCOM_USART_CTRLC_HDRDLY(0x02),
mbed_official 15:a81a8d6c1dfe 354 /** Delay between break and sync transmission is 14 bit time.
mbed_official 15:a81a8d6c1dfe 355 Delay between sync and ID transmission is 4 bit time. */
mbed_official 15:a81a8d6c1dfe 356 LIN_MASTER_HEADER_DELAY_3 = SERCOM_USART_CTRLC_HDRDLY(0x03),
mbed_official 15:a81a8d6c1dfe 357 };
mbed_official 15:a81a8d6c1dfe 358
mbed_official 15:a81a8d6c1dfe 359 /**
mbed_official 15:a81a8d6c1dfe 360 * \brief LIN Master Break Length.
mbed_official 15:a81a8d6c1dfe 361 *
mbed_official 15:a81a8d6c1dfe 362 * Length of the break field transmitted when in LIN master mode
mbed_official 15:a81a8d6c1dfe 363 */
mbed_official 15:a81a8d6c1dfe 364 enum lin_master_break_length {
mbed_official 15:a81a8d6c1dfe 365 /** Break field transmission is 13 bit times. */
mbed_official 15:a81a8d6c1dfe 366 LIN_MASTER_BREAK_LENGTH_13_BIT = SERCOM_USART_CTRLC_BRKLEN(0x0),
mbed_official 15:a81a8d6c1dfe 367 /** Break field transmission is 17 bit times. */
mbed_official 15:a81a8d6c1dfe 368 LIN_MASTER_BREAK_LENGTH_17_BIT = SERCOM_USART_CTRLC_BRKLEN(0x1),
mbed_official 15:a81a8d6c1dfe 369 /** Break field transmission is 21 bit times. */
mbed_official 15:a81a8d6c1dfe 370 LIN_MASTER_BREAK_LENGTH_21_BIT = SERCOM_USART_CTRLC_BRKLEN(0x2),
mbed_official 15:a81a8d6c1dfe 371 /** Break field transmission is 26 bit times. */
mbed_official 15:a81a8d6c1dfe 372 LIN_MASTER_BREAK_LENGTH_26_BIT = SERCOM_USART_CTRLC_BRKLEN(0x3),
mbed_official 15:a81a8d6c1dfe 373 };
mbed_official 15:a81a8d6c1dfe 374 #endif
mbed_official 15:a81a8d6c1dfe 375
mbed_official 15:a81a8d6c1dfe 376 #ifndef PINMUX_DEFAULT
mbed_official 15:a81a8d6c1dfe 377 /** Default pinmux. */
mbed_official 15:a81a8d6c1dfe 378 # define PINMUX_DEFAULT 0
mbed_official 15:a81a8d6c1dfe 379 #endif
mbed_official 15:a81a8d6c1dfe 380
mbed_official 15:a81a8d6c1dfe 381 #ifndef PINMUX_UNUSED
mbed_official 15:a81a8d6c1dfe 382 /** Unused pinmux. */
mbed_official 15:a81a8d6c1dfe 383 # define PINMUX_UNUSED 0xFFFFFFFF
mbed_official 15:a81a8d6c1dfe 384 #endif
mbed_official 15:a81a8d6c1dfe 385
mbed_official 15:a81a8d6c1dfe 386 #ifndef USART_TIMEOUT
mbed_official 15:a81a8d6c1dfe 387 /** USART timeout value. */
mbed_official 15:a81a8d6c1dfe 388 # define USART_TIMEOUT 0xFFFF
mbed_official 15:a81a8d6c1dfe 389 #endif
mbed_official 15:a81a8d6c1dfe 390
mbed_official 15:a81a8d6c1dfe 391 #if USART_CALLBACK_MODE == true
mbed_official 15:a81a8d6c1dfe 392 /**
mbed_official 15:a81a8d6c1dfe 393 * \brief USART Callback enum
mbed_official 15:a81a8d6c1dfe 394 *
mbed_official 15:a81a8d6c1dfe 395 * Callbacks for the Asynchronous USART driver.
mbed_official 15:a81a8d6c1dfe 396 */
mbed_official 15:a81a8d6c1dfe 397 enum usart_callback {
mbed_official 15:a81a8d6c1dfe 398 /** Callback for buffer transmitted. */
mbed_official 15:a81a8d6c1dfe 399 USART_CALLBACK_BUFFER_TRANSMITTED,
mbed_official 15:a81a8d6c1dfe 400 /** Callback for buffer received. */
mbed_official 15:a81a8d6c1dfe 401 USART_CALLBACK_BUFFER_RECEIVED,
mbed_official 15:a81a8d6c1dfe 402 /** Callback for error. */
mbed_official 15:a81a8d6c1dfe 403 USART_CALLBACK_ERROR,
mbed_official 15:a81a8d6c1dfe 404 #ifdef FEATURE_USART_LIN_SLAVE
mbed_official 15:a81a8d6c1dfe 405 /** Callback for break character is received. */
mbed_official 15:a81a8d6c1dfe 406 USART_CALLBACK_BREAK_RECEIVED,
mbed_official 15:a81a8d6c1dfe 407 #endif
mbed_official 15:a81a8d6c1dfe 408 #ifdef FEATURE_USART_HARDWARE_FLOW_CONTROL
mbed_official 15:a81a8d6c1dfe 409 /** Callback for a change is detected on the CTS pin. */
mbed_official 15:a81a8d6c1dfe 410 USART_CALLBACK_CTS_INPUT_CHANGE,
mbed_official 15:a81a8d6c1dfe 411 #endif
mbed_official 15:a81a8d6c1dfe 412 #ifdef FEATURE_USART_START_FRAME_DECTION
mbed_official 15:a81a8d6c1dfe 413 /** Callback for a start condition is detected on the RxD line. */
mbed_official 15:a81a8d6c1dfe 414 USART_CALLBACK_START_RECEIVED,
mbed_official 15:a81a8d6c1dfe 415 #endif
mbed_official 15:a81a8d6c1dfe 416 # if !defined(__DOXYGEN__)
mbed_official 15:a81a8d6c1dfe 417 /** Number of available callbacks. */
mbed_official 15:a81a8d6c1dfe 418 USART_CALLBACK_N,
mbed_official 15:a81a8d6c1dfe 419 # endif
mbed_official 15:a81a8d6c1dfe 420 };
mbed_official 15:a81a8d6c1dfe 421 #endif
mbed_official 15:a81a8d6c1dfe 422
mbed_official 15:a81a8d6c1dfe 423 /**
mbed_official 15:a81a8d6c1dfe 424 * \brief USART Data Order enum
mbed_official 15:a81a8d6c1dfe 425 *
mbed_official 15:a81a8d6c1dfe 426 * The data order decides which of MSB or LSB is shifted out first when data is
mbed_official 15:a81a8d6c1dfe 427 * transferred.
mbed_official 15:a81a8d6c1dfe 428 */
mbed_official 15:a81a8d6c1dfe 429 enum usart_dataorder {
mbed_official 15:a81a8d6c1dfe 430 /** The MSB will be shifted out first during transmission,
mbed_official 15:a81a8d6c1dfe 431 * and shifted in first during reception. */
mbed_official 15:a81a8d6c1dfe 432 USART_DATAORDER_MSB = 0,
mbed_official 15:a81a8d6c1dfe 433 /** The LSB will be shifted out first during transmission,
mbed_official 15:a81a8d6c1dfe 434 * and shifted in first during reception. */
mbed_official 15:a81a8d6c1dfe 435 USART_DATAORDER_LSB = SERCOM_USART_CTRLA_DORD,
mbed_official 15:a81a8d6c1dfe 436 };
mbed_official 15:a81a8d6c1dfe 437
mbed_official 15:a81a8d6c1dfe 438 /**
mbed_official 15:a81a8d6c1dfe 439 * \brief USART Transfer mode enum
mbed_official 15:a81a8d6c1dfe 440 *
mbed_official 15:a81a8d6c1dfe 441 * Select USART transfer mode.
mbed_official 15:a81a8d6c1dfe 442 */
mbed_official 15:a81a8d6c1dfe 443 enum usart_transfer_mode {
mbed_official 15:a81a8d6c1dfe 444 /** Transfer of data is done synchronously. */
mbed_official 15:a81a8d6c1dfe 445 USART_TRANSFER_SYNCHRONOUSLY = (SERCOM_USART_CTRLA_CMODE),
mbed_official 15:a81a8d6c1dfe 446 /** Transfer of data is done asynchronously. */
mbed_official 15:a81a8d6c1dfe 447 USART_TRANSFER_ASYNCHRONOUSLY = 0
mbed_official 15:a81a8d6c1dfe 448 };
mbed_official 15:a81a8d6c1dfe 449
mbed_official 15:a81a8d6c1dfe 450 /**
mbed_official 15:a81a8d6c1dfe 451 * \brief USART Parity enum
mbed_official 15:a81a8d6c1dfe 452 *
mbed_official 15:a81a8d6c1dfe 453 * Select parity USART parity mode.
mbed_official 15:a81a8d6c1dfe 454 */
mbed_official 15:a81a8d6c1dfe 455 enum usart_parity {
mbed_official 15:a81a8d6c1dfe 456 /** For odd parity checking, the parity bit will be set if number of
mbed_official 15:a81a8d6c1dfe 457 * ones being transferred is even. */
mbed_official 15:a81a8d6c1dfe 458 USART_PARITY_ODD = SERCOM_USART_CTRLB_PMODE,
mbed_official 15:a81a8d6c1dfe 459
mbed_official 15:a81a8d6c1dfe 460 /** For even parity checking, the parity bit will be set if number of
mbed_official 15:a81a8d6c1dfe 461 * ones being received is odd. */
mbed_official 15:a81a8d6c1dfe 462 USART_PARITY_EVEN = 0,
mbed_official 15:a81a8d6c1dfe 463
mbed_official 15:a81a8d6c1dfe 464 /** No parity checking will be executed, and there will be no parity bit
mbed_official 15:a81a8d6c1dfe 465 * in the received frame. */
mbed_official 15:a81a8d6c1dfe 466 USART_PARITY_NONE = 0xFF,
mbed_official 15:a81a8d6c1dfe 467 };
mbed_official 15:a81a8d6c1dfe 468
mbed_official 15:a81a8d6c1dfe 469 /**
mbed_official 15:a81a8d6c1dfe 470 * \brief USART signal MUX settings
mbed_official 15:a81a8d6c1dfe 471 *
mbed_official 15:a81a8d6c1dfe 472 * Set the functionality of the SERCOM pins.
mbed_official 15:a81a8d6c1dfe 473 *
mbed_official 15:a81a8d6c1dfe 474 * See \ref asfdoc_sam0_sercom_usart_mux_settings for a description of the
mbed_official 15:a81a8d6c1dfe 475 * various MUX setting options.
mbed_official 15:a81a8d6c1dfe 476 */
mbed_official 15:a81a8d6c1dfe 477 enum usart_signal_mux_settings {
mbed_official 15:a81a8d6c1dfe 478 #ifdef FEATURE_USART_HARDWARE_FLOW_CONTROL
mbed_official 15:a81a8d6c1dfe 479 /** MUX setting RX_0_TX_0_XCK_1. */
mbed_official 15:a81a8d6c1dfe 480 USART_RX_0_TX_0_XCK_1 = (SERCOM_USART_CTRLA_RXPO(0) | SERCOM_USART_CTRLA_TXPO(0)),
mbed_official 15:a81a8d6c1dfe 481 /** MUX setting RX_0_TX_2_XCK_3. */
mbed_official 15:a81a8d6c1dfe 482 USART_RX_0_TX_2_XCK_3 = (SERCOM_USART_CTRLA_RXPO(0) | SERCOM_USART_CTRLA_TXPO(1)),
mbed_official 15:a81a8d6c1dfe 483 /** MUX setting USART_RX_0_TX_0_RTS_2_CTS_3. */
mbed_official 15:a81a8d6c1dfe 484 USART_RX_0_TX_0_RTS_2_CTS_3 = (SERCOM_USART_CTRLA_RXPO(0) | SERCOM_USART_CTRLA_TXPO(2)),
mbed_official 15:a81a8d6c1dfe 485 /** MUX setting RX_1_TX_0_XCK_1. */
mbed_official 15:a81a8d6c1dfe 486 USART_RX_1_TX_0_XCK_1 = (SERCOM_USART_CTRLA_RXPO(1) | SERCOM_USART_CTRLA_TXPO(0)),
mbed_official 15:a81a8d6c1dfe 487 /** MUX setting RX_1_TX_2_XCK_3. */
mbed_official 15:a81a8d6c1dfe 488 USART_RX_1_TX_2_XCK_3 = (SERCOM_USART_CTRLA_RXPO(1) | SERCOM_USART_CTRLA_TXPO(1)),
mbed_official 15:a81a8d6c1dfe 489 /** MUX setting USART_RX_1_TX_0_RTS_2_CTS_3. */
mbed_official 15:a81a8d6c1dfe 490 USART_RX_1_TX_0_RTS_2_CTS_3 = (SERCOM_USART_CTRLA_RXPO(1) | SERCOM_USART_CTRLA_TXPO(2)),
mbed_official 15:a81a8d6c1dfe 491 /** MUX setting RX_2_TX_0_XCK_1. */
mbed_official 15:a81a8d6c1dfe 492 USART_RX_2_TX_0_XCK_1 = (SERCOM_USART_CTRLA_RXPO(2) | SERCOM_USART_CTRLA_TXPO(0)),
mbed_official 15:a81a8d6c1dfe 493 /** MUX setting RX_2_TX_2_XCK_3. */
mbed_official 15:a81a8d6c1dfe 494 USART_RX_2_TX_2_XCK_3 = (SERCOM_USART_CTRLA_RXPO(2) | SERCOM_USART_CTRLA_TXPO(1)),
mbed_official 15:a81a8d6c1dfe 495 /** MUX setting USART_RX_2_TX_0_RTS_2_CTS_3. */
mbed_official 15:a81a8d6c1dfe 496 USART_RX_2_TX_0_RTS_2_CTS_3 = (SERCOM_USART_CTRLA_RXPO(2) | SERCOM_USART_CTRLA_TXPO(2)),
mbed_official 15:a81a8d6c1dfe 497 /** MUX setting RX_3_TX_0_XCK_1. */
mbed_official 15:a81a8d6c1dfe 498 USART_RX_3_TX_0_XCK_1 = (SERCOM_USART_CTRLA_RXPO(3) | SERCOM_USART_CTRLA_TXPO(0)),
mbed_official 15:a81a8d6c1dfe 499 /** MUX setting RX_3_TX_2_XCK_3. */
mbed_official 15:a81a8d6c1dfe 500 USART_RX_3_TX_2_XCK_3 = (SERCOM_USART_CTRLA_RXPO(3) | SERCOM_USART_CTRLA_TXPO(1)),
mbed_official 15:a81a8d6c1dfe 501 /** MUX setting USART_RX_3_TX_0_RTS_2_CTS_3. */
mbed_official 15:a81a8d6c1dfe 502 USART_RX_3_TX_0_RTS_2_CTS_3 = (SERCOM_USART_CTRLA_RXPO(3) | SERCOM_USART_CTRLA_TXPO(2)),
mbed_official 15:a81a8d6c1dfe 503 #ifdef FEATURE_USART_RS485
mbed_official 15:a81a8d6c1dfe 504 /** MUX setting USART_RX_0_TX_0_XCK_1_TE_2. */
mbed_official 15:a81a8d6c1dfe 505 USART_RX_0_TX_0_XCK_1_TE_2 = (SERCOM_USART_CTRLA_RXPO(0) | SERCOM_USART_CTRLA_TXPO(3)),
mbed_official 15:a81a8d6c1dfe 506 /** MUX setting USART_RX_1_TX_0_XCK_1_TE_2. */
mbed_official 15:a81a8d6c1dfe 507 USART_RX_1_TX_0_XCK_1_TE_2 = (SERCOM_USART_CTRLA_RXPO(1) | SERCOM_USART_CTRLA_TXPO(3)),
mbed_official 15:a81a8d6c1dfe 508 /** MUX setting USART_RX_2_TX_0_XCK_1_TE_2. */
mbed_official 15:a81a8d6c1dfe 509 USART_RX_2_TX_0_XCK_1_TE_2 = (SERCOM_USART_CTRLA_RXPO(2) | SERCOM_USART_CTRLA_TXPO(3)),
mbed_official 15:a81a8d6c1dfe 510 /** MUX setting USART_RX_3_TX_0_XCK_1_TE_2. */
mbed_official 15:a81a8d6c1dfe 511 USART_RX_3_TX_0_XCK_1_TE_2 = (SERCOM_USART_CTRLA_RXPO(3) | SERCOM_USART_CTRLA_TXPO(3)),
mbed_official 15:a81a8d6c1dfe 512 #endif
mbed_official 15:a81a8d6c1dfe 513 #else
mbed_official 15:a81a8d6c1dfe 514 /** MUX setting RX_0_TX_0_XCK_1. */
mbed_official 15:a81a8d6c1dfe 515 USART_RX_0_TX_0_XCK_1 = (SERCOM_USART_CTRLA_RXPO(0)),
mbed_official 15:a81a8d6c1dfe 516 /** MUX setting RX_0_TX_2_XCK_3. */
mbed_official 15:a81a8d6c1dfe 517 USART_RX_0_TX_2_XCK_3 = (SERCOM_USART_CTRLA_RXPO(0) | SERCOM_USART_CTRLA_TXPO),
mbed_official 15:a81a8d6c1dfe 518 /** MUX setting RX_1_TX_0_XCK_1. */
mbed_official 15:a81a8d6c1dfe 519 USART_RX_1_TX_0_XCK_1 = (SERCOM_USART_CTRLA_RXPO(1)),
mbed_official 15:a81a8d6c1dfe 520 /** MUX setting RX_1_TX_2_XCK_3. */
mbed_official 15:a81a8d6c1dfe 521 USART_RX_1_TX_2_XCK_3 = (SERCOM_USART_CTRLA_RXPO(1) | SERCOM_USART_CTRLA_TXPO),
mbed_official 15:a81a8d6c1dfe 522 /** MUX setting RX_2_TX_0_XCK_1. */
mbed_official 15:a81a8d6c1dfe 523 USART_RX_2_TX_0_XCK_1 = (SERCOM_USART_CTRLA_RXPO(2)),
mbed_official 15:a81a8d6c1dfe 524 /** MUX setting RX_2_TX_2_XCK_3. */
mbed_official 15:a81a8d6c1dfe 525 USART_RX_2_TX_2_XCK_3 = (SERCOM_USART_CTRLA_RXPO(2) | SERCOM_USART_CTRLA_TXPO),
mbed_official 15:a81a8d6c1dfe 526 /** MUX setting RX_3_TX_0_XCK_1. */
mbed_official 15:a81a8d6c1dfe 527 USART_RX_3_TX_0_XCK_1 = (SERCOM_USART_CTRLA_RXPO(3)),
mbed_official 15:a81a8d6c1dfe 528 /** MUX setting RX_3_TX_2_XCK_3. */
mbed_official 15:a81a8d6c1dfe 529 USART_RX_3_TX_2_XCK_3 = (SERCOM_USART_CTRLA_RXPO(3) | SERCOM_USART_CTRLA_TXPO),
mbed_official 15:a81a8d6c1dfe 530 #endif
mbed_official 15:a81a8d6c1dfe 531 };
mbed_official 15:a81a8d6c1dfe 532
mbed_official 15:a81a8d6c1dfe 533 /**
mbed_official 15:a81a8d6c1dfe 534 * \brief USART Stop Bits enum
mbed_official 15:a81a8d6c1dfe 535 *
mbed_official 15:a81a8d6c1dfe 536 * Number of stop bits for a frame.
mbed_official 15:a81a8d6c1dfe 537 */
mbed_official 15:a81a8d6c1dfe 538 enum usart_stopbits {
mbed_official 15:a81a8d6c1dfe 539 /** Each transferred frame contains one stop bit. */
mbed_official 15:a81a8d6c1dfe 540 USART_STOPBITS_1 = 0,
mbed_official 15:a81a8d6c1dfe 541 /** Each transferred frame contains two stop bits. */
mbed_official 15:a81a8d6c1dfe 542 USART_STOPBITS_2 = SERCOM_USART_CTRLB_SBMODE,
mbed_official 15:a81a8d6c1dfe 543 };
mbed_official 15:a81a8d6c1dfe 544
mbed_official 15:a81a8d6c1dfe 545 /**
mbed_official 15:a81a8d6c1dfe 546 * \brief USART Character Size
mbed_official 15:a81a8d6c1dfe 547 *
mbed_official 15:a81a8d6c1dfe 548 * Number of bits for the character sent in a frame.
mbed_official 15:a81a8d6c1dfe 549 */
mbed_official 15:a81a8d6c1dfe 550 enum usart_character_size {
mbed_official 15:a81a8d6c1dfe 551 /** The char being sent in a frame is five bits long. */
mbed_official 15:a81a8d6c1dfe 552 USART_CHARACTER_SIZE_5BIT = SERCOM_USART_CTRLB_CHSIZE(5),
mbed_official 15:a81a8d6c1dfe 553 /** The char being sent in a frame is six bits long. */
mbed_official 15:a81a8d6c1dfe 554 USART_CHARACTER_SIZE_6BIT = SERCOM_USART_CTRLB_CHSIZE(6),
mbed_official 15:a81a8d6c1dfe 555 /** The char being sent in a frame is seven bits long. */
mbed_official 15:a81a8d6c1dfe 556 USART_CHARACTER_SIZE_7BIT = SERCOM_USART_CTRLB_CHSIZE(7),
mbed_official 15:a81a8d6c1dfe 557 /** The char being sent in a frame is eight bits long. */
mbed_official 15:a81a8d6c1dfe 558 USART_CHARACTER_SIZE_8BIT = SERCOM_USART_CTRLB_CHSIZE(0),
mbed_official 15:a81a8d6c1dfe 559 /** The char being sent in a frame is nine bits long. */
mbed_official 15:a81a8d6c1dfe 560 USART_CHARACTER_SIZE_9BIT = SERCOM_USART_CTRLB_CHSIZE(1),
mbed_official 15:a81a8d6c1dfe 561 };
mbed_official 15:a81a8d6c1dfe 562
mbed_official 15:a81a8d6c1dfe 563 #ifdef FEATURE_USART_OVER_SAMPLE
mbed_official 15:a81a8d6c1dfe 564 /**
mbed_official 15:a81a8d6c1dfe 565 * \brief USART Sample Rate
mbed_official 15:a81a8d6c1dfe 566 *
mbed_official 15:a81a8d6c1dfe 567 * The value of sample rate and baudrate generation mode.
mbed_official 15:a81a8d6c1dfe 568 */
mbed_official 15:a81a8d6c1dfe 569 enum usart_sample_rate {
mbed_official 15:a81a8d6c1dfe 570 /** 16x over-sampling using arithmetic baudrate generation. */
mbed_official 15:a81a8d6c1dfe 571 USART_SAMPLE_RATE_16X_ARITHMETIC = SERCOM_USART_CTRLA_SAMPR(0),
mbed_official 15:a81a8d6c1dfe 572 /** 16x over-sampling using fractional baudrate generation. */
mbed_official 15:a81a8d6c1dfe 573 USART_SAMPLE_RATE_16X_FRACTIONAL = SERCOM_USART_CTRLA_SAMPR(1),
mbed_official 15:a81a8d6c1dfe 574 /** 8x over-sampling using arithmetic baudrate generation. */
mbed_official 15:a81a8d6c1dfe 575 USART_SAMPLE_RATE_8X_ARITHMETIC = SERCOM_USART_CTRLA_SAMPR(2),
mbed_official 15:a81a8d6c1dfe 576 /** 8x over-sampling using fractional baudrate generation. */
mbed_official 15:a81a8d6c1dfe 577 USART_SAMPLE_RATE_8X_FRACTIONAL = SERCOM_USART_CTRLA_SAMPR(3),
mbed_official 15:a81a8d6c1dfe 578 /** 3x over-sampling using arithmetic baudrate generation. */
mbed_official 15:a81a8d6c1dfe 579 USART_SAMPLE_RATE_3X_ARITHMETIC = SERCOM_USART_CTRLA_SAMPR(4),
mbed_official 15:a81a8d6c1dfe 580 };
mbed_official 15:a81a8d6c1dfe 581
mbed_official 15:a81a8d6c1dfe 582 /**
mbed_official 15:a81a8d6c1dfe 583 * \brief USART Sample Adjustment
mbed_official 15:a81a8d6c1dfe 584 *
mbed_official 15:a81a8d6c1dfe 585 * The value of sample number used for majority voting.
mbed_official 15:a81a8d6c1dfe 586 */
mbed_official 15:a81a8d6c1dfe 587 enum usart_sample_adjustment {
mbed_official 15:a81a8d6c1dfe 588 /** The first, middle and last sample number used for majority voting is 7-8-9. */
mbed_official 15:a81a8d6c1dfe 589 USART_SAMPLE_ADJUSTMENT_7_8_9 = SERCOM_USART_CTRLA_SAMPA(0),
mbed_official 15:a81a8d6c1dfe 590 /** The first, middle and last sample number used for majority voting is 9-10-11. */
mbed_official 15:a81a8d6c1dfe 591 USART_SAMPLE_ADJUSTMENT_9_10_11 = SERCOM_USART_CTRLA_SAMPA(1),
mbed_official 15:a81a8d6c1dfe 592 /** The first, middle and last sample number used for majority voting is 11-12-13. */
mbed_official 15:a81a8d6c1dfe 593 USART_SAMPLE_ADJUSTMENT_11_12_13 = SERCOM_USART_CTRLA_SAMPA(2),
mbed_official 15:a81a8d6c1dfe 594 /** The first, middle and last sample number used for majority voting is 13-14-15. */
mbed_official 15:a81a8d6c1dfe 595 USART_SAMPLE_ADJUSTMENT_13_14_15 = SERCOM_USART_CTRLA_SAMPA(3),
mbed_official 15:a81a8d6c1dfe 596 };
mbed_official 15:a81a8d6c1dfe 597 #endif
mbed_official 15:a81a8d6c1dfe 598
mbed_official 15:a81a8d6c1dfe 599 #ifdef FEATURE_USART_RS485
mbed_official 15:a81a8d6c1dfe 600 /**
mbed_official 15:a81a8d6c1dfe 601 * \brief RS485 Guard Time
mbed_official 15:a81a8d6c1dfe 602 *
mbed_official 15:a81a8d6c1dfe 603 * The value of RS485 guard time.
mbed_official 15:a81a8d6c1dfe 604 */
mbed_official 15:a81a8d6c1dfe 605 enum rs485_guard_time {
mbed_official 15:a81a8d6c1dfe 606 /** The guard time is 0-bit time. */
mbed_official 15:a81a8d6c1dfe 607 RS485_GUARD_TIME_0_BIT = 0,
mbed_official 15:a81a8d6c1dfe 608 /** The guard time is 1-bit time. */
mbed_official 15:a81a8d6c1dfe 609 RS485_GUARD_TIME_1_BIT,
mbed_official 15:a81a8d6c1dfe 610 /** The guard time is 2-bit times. */
mbed_official 15:a81a8d6c1dfe 611 RS485_GUARD_TIME_2_BIT,
mbed_official 15:a81a8d6c1dfe 612 /** The guard time is 3-bit times. */
mbed_official 15:a81a8d6c1dfe 613 RS485_GUARD_TIME_3_BIT,
mbed_official 15:a81a8d6c1dfe 614 /** The guard time is 4-bit times. */
mbed_official 15:a81a8d6c1dfe 615 RS485_GUARD_TIME_4_BIT,
mbed_official 15:a81a8d6c1dfe 616 /** The guard time is 5-bit times. */
mbed_official 15:a81a8d6c1dfe 617 RS485_GUARD_TIME_5_BIT,
mbed_official 15:a81a8d6c1dfe 618 /** The guard time is 6-bit times. */
mbed_official 15:a81a8d6c1dfe 619 RS485_GUARD_TIME_6_BIT,
mbed_official 15:a81a8d6c1dfe 620 /** The guard time is 7-bit times. */
mbed_official 15:a81a8d6c1dfe 621 RS485_GUARD_TIME_7_BIT,
mbed_official 15:a81a8d6c1dfe 622 };
mbed_official 15:a81a8d6c1dfe 623 #endif
mbed_official 15:a81a8d6c1dfe 624
mbed_official 15:a81a8d6c1dfe 625 /**
mbed_official 15:a81a8d6c1dfe 626 * \brief USART Transceiver
mbed_official 15:a81a8d6c1dfe 627 *
mbed_official 15:a81a8d6c1dfe 628 * Select Receiver or Transmitter.
mbed_official 15:a81a8d6c1dfe 629 */
mbed_official 15:a81a8d6c1dfe 630 enum usart_transceiver_type {
mbed_official 15:a81a8d6c1dfe 631 /** The parameter is for the Receiver. */
mbed_official 15:a81a8d6c1dfe 632 USART_TRANSCEIVER_RX,
mbed_official 15:a81a8d6c1dfe 633 /** The parameter is for the Transmitter. */
mbed_official 15:a81a8d6c1dfe 634 USART_TRANSCEIVER_TX,
mbed_official 15:a81a8d6c1dfe 635 };
mbed_official 15:a81a8d6c1dfe 636
mbed_official 15:a81a8d6c1dfe 637 /**
mbed_official 15:a81a8d6c1dfe 638 * \brief USART configuration struct
mbed_official 15:a81a8d6c1dfe 639 *
mbed_official 15:a81a8d6c1dfe 640 * Configuration options for USART.
mbed_official 15:a81a8d6c1dfe 641 */
mbed_official 15:a81a8d6c1dfe 642 struct usart_config {
mbed_official 15:a81a8d6c1dfe 643 /** USART bit order (MSB or LSB first). */
mbed_official 15:a81a8d6c1dfe 644 enum usart_dataorder data_order;
mbed_official 15:a81a8d6c1dfe 645 /** USART in asynchronous or synchronous mode. */
mbed_official 15:a81a8d6c1dfe 646 enum usart_transfer_mode transfer_mode;
mbed_official 15:a81a8d6c1dfe 647 /** USART parity. */
mbed_official 15:a81a8d6c1dfe 648 enum usart_parity parity;
mbed_official 15:a81a8d6c1dfe 649 /** Number of stop bits. */
mbed_official 15:a81a8d6c1dfe 650 enum usart_stopbits stopbits;
mbed_official 15:a81a8d6c1dfe 651 /** USART character size. */
mbed_official 15:a81a8d6c1dfe 652 enum usart_character_size character_size;
mbed_official 15:a81a8d6c1dfe 653 /** USART pin out. */
mbed_official 15:a81a8d6c1dfe 654 enum usart_signal_mux_settings mux_setting;
mbed_official 15:a81a8d6c1dfe 655 #ifdef FEATURE_USART_OVER_SAMPLE
mbed_official 15:a81a8d6c1dfe 656 /** USART sample rate. */
mbed_official 15:a81a8d6c1dfe 657 enum usart_sample_rate sample_rate;
mbed_official 15:a81a8d6c1dfe 658 /** USART sample adjustment. */
mbed_official 15:a81a8d6c1dfe 659 enum usart_sample_adjustment sample_adjustment;
mbed_official 15:a81a8d6c1dfe 660 #endif
mbed_official 15:a81a8d6c1dfe 661 #ifdef FEATURE_USART_IMMEDIATE_BUFFER_OVERFLOW_NOTIFICATION
mbed_official 15:a81a8d6c1dfe 662 /** Controls when the buffer overflow status bit is asserted when a buffer overflow occurs.*/
mbed_official 15:a81a8d6c1dfe 663 bool immediate_buffer_overflow_notification;
mbed_official 15:a81a8d6c1dfe 664 #endif
mbed_official 15:a81a8d6c1dfe 665 #ifdef FEATURE_USART_IRDA
mbed_official 15:a81a8d6c1dfe 666 /** Enable IrDA encoding format. */
mbed_official 15:a81a8d6c1dfe 667 bool encoding_format_enable;
mbed_official 15:a81a8d6c1dfe 668 /** The minimum pulse length that is required for a pulse to be accepted by the IrDA receiver. */
mbed_official 15:a81a8d6c1dfe 669 uint8_t receive_pulse_length;
mbed_official 15:a81a8d6c1dfe 670 #endif
mbed_official 15:a81a8d6c1dfe 671 #ifdef FEATURE_USART_LIN_SLAVE
mbed_official 15:a81a8d6c1dfe 672 /** Enable LIN Slave Support. */
mbed_official 15:a81a8d6c1dfe 673 bool lin_slave_enable;
mbed_official 15:a81a8d6c1dfe 674 #endif
mbed_official 15:a81a8d6c1dfe 675
mbed_official 15:a81a8d6c1dfe 676 #ifdef FEATURE_USART_LIN_MASTER
mbed_official 15:a81a8d6c1dfe 677 /** LIN node type. */
mbed_official 15:a81a8d6c1dfe 678 enum lin_node_type lin_node;
mbed_official 15:a81a8d6c1dfe 679 /** LIN master header delay. */
mbed_official 15:a81a8d6c1dfe 680 enum lin_master_header_delay lin_header_delay;
mbed_official 15:a81a8d6c1dfe 681 /** LIN Master Break Length. */
mbed_official 15:a81a8d6c1dfe 682 enum lin_master_break_length lin_break_length;
mbed_official 15:a81a8d6c1dfe 683 #endif
mbed_official 15:a81a8d6c1dfe 684
mbed_official 15:a81a8d6c1dfe 685 #ifdef FEATURE_USART_START_FRAME_DECTION
mbed_official 15:a81a8d6c1dfe 686 /** Enable start of frame dection. */
mbed_official 15:a81a8d6c1dfe 687 bool start_frame_detection_enable;
mbed_official 15:a81a8d6c1dfe 688 #endif
mbed_official 15:a81a8d6c1dfe 689 #ifdef FEATURE_USART_RS485
mbed_official 15:a81a8d6c1dfe 690 /** RS485 guard time. */
mbed_official 15:a81a8d6c1dfe 691 enum rs485_guard_time rs485_guard_time;
mbed_official 15:a81a8d6c1dfe 692 #endif
mbed_official 15:a81a8d6c1dfe 693 #ifdef FEATURE_USART_COLLISION_DECTION
mbed_official 15:a81a8d6c1dfe 694 /** Enable collision dection. */
mbed_official 15:a81a8d6c1dfe 695 bool collision_detection_enable;
mbed_official 15:a81a8d6c1dfe 696 #endif
mbed_official 15:a81a8d6c1dfe 697 /** USART baudrate. */
mbed_official 15:a81a8d6c1dfe 698 uint32_t baudrate;
mbed_official 15:a81a8d6c1dfe 699 /** Enable receiver. */
mbed_official 15:a81a8d6c1dfe 700 bool receiver_enable;
mbed_official 15:a81a8d6c1dfe 701 /** Enable transmitter. */
mbed_official 15:a81a8d6c1dfe 702 bool transmitter_enable;
mbed_official 15:a81a8d6c1dfe 703
mbed_official 15:a81a8d6c1dfe 704 /** USART Clock Polarity.
mbed_official 15:a81a8d6c1dfe 705 * If true, data changes on falling XCK edge and
mbed_official 15:a81a8d6c1dfe 706 * is sampled at rising edge.
mbed_official 15:a81a8d6c1dfe 707 * If false, data changes on rising XCK edge and
mbed_official 15:a81a8d6c1dfe 708 * is sampled at falling edge.
mbed_official 15:a81a8d6c1dfe 709 * */
mbed_official 15:a81a8d6c1dfe 710 bool clock_polarity_inverted;
mbed_official 15:a81a8d6c1dfe 711
mbed_official 15:a81a8d6c1dfe 712 /** States whether to use the external clock applied to the XCK pin.
mbed_official 15:a81a8d6c1dfe 713 * In synchronous mode the shift register will act directly on the XCK clock.
mbed_official 15:a81a8d6c1dfe 714 * In asynchronous mode the XCK will be the input to the USART hardware module.
mbed_official 15:a81a8d6c1dfe 715 */
mbed_official 15:a81a8d6c1dfe 716 bool use_external_clock;
mbed_official 15:a81a8d6c1dfe 717 /** External clock frequency in synchronous mode.
mbed_official 15:a81a8d6c1dfe 718 * This must be set if \c use_external_clock is true. */
mbed_official 15:a81a8d6c1dfe 719 uint32_t ext_clock_freq;
mbed_official 15:a81a8d6c1dfe 720 /** If true the USART will be kept running in Standby sleep mode. */
mbed_official 15:a81a8d6c1dfe 721 bool run_in_standby;
mbed_official 15:a81a8d6c1dfe 722 /** GCLK generator source. */
mbed_official 15:a81a8d6c1dfe 723 enum gclk_generator generator_source;
mbed_official 15:a81a8d6c1dfe 724 /** PAD0 pinmux.
mbed_official 15:a81a8d6c1dfe 725 *
mbed_official 15:a81a8d6c1dfe 726 * If current USARTx has several alternative multiplexing I/O pin for PAD0, then
mbed_official 15:a81a8d6c1dfe 727 * only one peripheral multiplexing I/O can be enabled for current USARTx PAD0
mbed_official 15:a81a8d6c1dfe 728 * function. Make sure other alternative multiplexing I/O associated current
mbed_official 15:a81a8d6c1dfe 729 * USARTx PAD0 is not setup usart function.
mbed_official 15:a81a8d6c1dfe 730 */
mbed_official 15:a81a8d6c1dfe 731 uint32_t pinmux_pad0;
mbed_official 15:a81a8d6c1dfe 732 /** PAD1 pinmux.
mbed_official 15:a81a8d6c1dfe 733 *
mbed_official 15:a81a8d6c1dfe 734 * If current USARTx has several alternative multiplexing I/O pin for PAD1, then
mbed_official 15:a81a8d6c1dfe 735 * only one peripheral multiplexing I/O can be enabled for current USARTx PAD1
mbed_official 15:a81a8d6c1dfe 736 * function. Make sure other alternative multiplexing I/O associated current
mbed_official 15:a81a8d6c1dfe 737 * USARTx PAD1 is not setup usart function.
mbed_official 15:a81a8d6c1dfe 738 */
mbed_official 15:a81a8d6c1dfe 739 uint32_t pinmux_pad1;
mbed_official 15:a81a8d6c1dfe 740 /** PAD2 pinmux.
mbed_official 15:a81a8d6c1dfe 741 *
mbed_official 15:a81a8d6c1dfe 742 * If current USARTx has several alternative multiplexing I/O pin for PAD2, then
mbed_official 15:a81a8d6c1dfe 743 * only one peripheral multiplexing I/O can be enabled for current USARTx PAD2
mbed_official 15:a81a8d6c1dfe 744 * function. Make sure other alternative multiplexing I/O associated current
mbed_official 15:a81a8d6c1dfe 745 * USARTx PAD2 is not setup usart function.
mbed_official 15:a81a8d6c1dfe 746 */
mbed_official 15:a81a8d6c1dfe 747 uint32_t pinmux_pad2;
mbed_official 15:a81a8d6c1dfe 748 /** PAD3 pinmux.
mbed_official 15:a81a8d6c1dfe 749 *
mbed_official 15:a81a8d6c1dfe 750 * If current USARTx has several alternative multiplexing I/O pin for PAD3, then
mbed_official 15:a81a8d6c1dfe 751 * only one peripheral multiplexing I/O can be enabled for current USARTx PAD3
mbed_official 15:a81a8d6c1dfe 752 * function. Make sure other alternative multiplexing I/O associated current
mbed_official 15:a81a8d6c1dfe 753 * USARTx PAD3 is not setup usart function.
mbed_official 15:a81a8d6c1dfe 754 */
mbed_official 15:a81a8d6c1dfe 755 uint32_t pinmux_pad3;
mbed_official 15:a81a8d6c1dfe 756 };
mbed_official 15:a81a8d6c1dfe 757
mbed_official 15:a81a8d6c1dfe 758 #if USART_CALLBACK_MODE == true
mbed_official 15:a81a8d6c1dfe 759 /**
mbed_official 15:a81a8d6c1dfe 760 * \brief USART module instance
mbed_official 15:a81a8d6c1dfe 761 *
mbed_official 15:a81a8d6c1dfe 762 * Forward Declaration for the device instance.
mbed_official 15:a81a8d6c1dfe 763 */
mbed_official 15:a81a8d6c1dfe 764 struct usart_module;
mbed_official 15:a81a8d6c1dfe 765
mbed_official 15:a81a8d6c1dfe 766 /**
mbed_official 15:a81a8d6c1dfe 767 * \brief USART callback type
mbed_official 15:a81a8d6c1dfe 768 *
mbed_official 15:a81a8d6c1dfe 769 * Type of the callback functions.
mbed_official 15:a81a8d6c1dfe 770 */
mbed_official 15:a81a8d6c1dfe 771 typedef void (*usart_callback_t)(struct usart_module *const module);
mbed_official 15:a81a8d6c1dfe 772 #endif
mbed_official 15:a81a8d6c1dfe 773
mbed_official 15:a81a8d6c1dfe 774 /**
mbed_official 15:a81a8d6c1dfe 775 * \brief SERCOM USART driver software device instance structure.
mbed_official 15:a81a8d6c1dfe 776 *
mbed_official 15:a81a8d6c1dfe 777 * SERCOM USART driver software instance structure, used to retain software
mbed_official 15:a81a8d6c1dfe 778 * state information of an associated hardware module instance.
mbed_official 15:a81a8d6c1dfe 779 *
mbed_official 15:a81a8d6c1dfe 780 * \note The fields of this structure should not be altered by the user
mbed_official 15:a81a8d6c1dfe 781 * application; they are reserved for module-internal use only.
mbed_official 15:a81a8d6c1dfe 782 */
mbed_official 15:a81a8d6c1dfe 783 struct usart_module {
mbed_official 15:a81a8d6c1dfe 784 #if !defined(__DOXYGEN__)
mbed_official 15:a81a8d6c1dfe 785 /** Pointer to the hardware instance. */
mbed_official 15:a81a8d6c1dfe 786 Sercom *hw;
mbed_official 15:a81a8d6c1dfe 787 /** Module lock. */
mbed_official 15:a81a8d6c1dfe 788 volatile bool locked;
mbed_official 15:a81a8d6c1dfe 789 /** Character size of the data being transferred. */
mbed_official 15:a81a8d6c1dfe 790 enum usart_character_size character_size;
mbed_official 15:a81a8d6c1dfe 791 /** Receiver enabled. */
mbed_official 15:a81a8d6c1dfe 792 bool receiver_enabled;
mbed_official 15:a81a8d6c1dfe 793 /** Transmitter enabled. */
mbed_official 15:a81a8d6c1dfe 794 bool transmitter_enabled;
mbed_official 15:a81a8d6c1dfe 795 #ifdef FEATURE_USART_LIN_SLAVE
mbed_official 15:a81a8d6c1dfe 796 /** LIN Slave Support enabled. */
mbed_official 15:a81a8d6c1dfe 797 bool lin_slave_enabled;
mbed_official 15:a81a8d6c1dfe 798 #endif
mbed_official 15:a81a8d6c1dfe 799 #ifdef FEATURE_USART_START_FRAME_DECTION
mbed_official 15:a81a8d6c1dfe 800 /** Start of frame dection enabled. */
mbed_official 15:a81a8d6c1dfe 801 bool start_frame_detection_enabled;
mbed_official 15:a81a8d6c1dfe 802 #endif
mbed_official 15:a81a8d6c1dfe 803 # if USART_CALLBACK_MODE == true
mbed_official 15:a81a8d6c1dfe 804 /** Array to store callback function pointers in. */
mbed_official 15:a81a8d6c1dfe 805 usart_callback_t callback[USART_CALLBACK_N];
mbed_official 15:a81a8d6c1dfe 806 /** Buffer pointer to where the next received character will be put. */
mbed_official 15:a81a8d6c1dfe 807 volatile uint8_t *rx_buffer_ptr;
mbed_official 15:a81a8d6c1dfe 808
mbed_official 15:a81a8d6c1dfe 809 /** Buffer pointer to where the next character will be transmitted from.
mbed_official 15:a81a8d6c1dfe 810 **/
mbed_official 15:a81a8d6c1dfe 811 volatile uint8_t *tx_buffer_ptr;
mbed_official 15:a81a8d6c1dfe 812 /** Remaining characters to receive. */
mbed_official 15:a81a8d6c1dfe 813 volatile uint16_t remaining_rx_buffer_length;
mbed_official 15:a81a8d6c1dfe 814 /** Remaining characters to transmit. */
mbed_official 15:a81a8d6c1dfe 815 volatile uint16_t remaining_tx_buffer_length;
mbed_official 15:a81a8d6c1dfe 816 /** Bit mask for callbacks registered. */
mbed_official 15:a81a8d6c1dfe 817 uint8_t callback_reg_mask;
mbed_official 15:a81a8d6c1dfe 818 /** Bit mask for callbacks enabled. */
mbed_official 15:a81a8d6c1dfe 819 uint8_t callback_enable_mask;
mbed_official 15:a81a8d6c1dfe 820 /** Holds the status of the ongoing or last read operation. */
mbed_official 15:a81a8d6c1dfe 821 volatile enum status_code rx_status;
mbed_official 15:a81a8d6c1dfe 822 /** Holds the status of the ongoing or last write operation. */
mbed_official 15:a81a8d6c1dfe 823 volatile enum status_code tx_status;
mbed_official 15:a81a8d6c1dfe 824 # endif
mbed_official 15:a81a8d6c1dfe 825 #endif
mbed_official 15:a81a8d6c1dfe 826 };
mbed_official 15:a81a8d6c1dfe 827
mbed_official 15:a81a8d6c1dfe 828 /**
mbed_official 15:a81a8d6c1dfe 829 * \name Lock/Unlock
mbed_official 15:a81a8d6c1dfe 830 * @{
mbed_official 15:a81a8d6c1dfe 831 */
mbed_official 15:a81a8d6c1dfe 832
mbed_official 15:a81a8d6c1dfe 833 /**
mbed_official 15:a81a8d6c1dfe 834 * \brief Attempt to get lock on driver instance
mbed_official 15:a81a8d6c1dfe 835 *
mbed_official 15:a81a8d6c1dfe 836 * This function checks the instance's lock, which indicates whether or not it
mbed_official 15:a81a8d6c1dfe 837 * is currently in use, and sets the lock if it was not already set.
mbed_official 15:a81a8d6c1dfe 838 *
mbed_official 15:a81a8d6c1dfe 839 * The purpose of this is to enable exclusive access to driver instances, so
mbed_official 15:a81a8d6c1dfe 840 * that, e.g., transactions by different services will not interfere with each
mbed_official 15:a81a8d6c1dfe 841 * other.
mbed_official 15:a81a8d6c1dfe 842 *
mbed_official 15:a81a8d6c1dfe 843 * \param[in,out] module Pointer to the driver instance to lock
mbed_official 15:a81a8d6c1dfe 844 *
mbed_official 15:a81a8d6c1dfe 845 * \retval STATUS_OK If the module was locked
mbed_official 15:a81a8d6c1dfe 846 * \retval STATUS_BUSY If the module was already locked
mbed_official 15:a81a8d6c1dfe 847 */
mbed_official 15:a81a8d6c1dfe 848 static inline enum status_code usart_lock(
mbed_official 15:a81a8d6c1dfe 849 struct usart_module *const module)
mbed_official 15:a81a8d6c1dfe 850 {
mbed_official 15:a81a8d6c1dfe 851 enum status_code status;
mbed_official 15:a81a8d6c1dfe 852
mbed_official 15:a81a8d6c1dfe 853 system_interrupt_enter_critical_section();
mbed_official 15:a81a8d6c1dfe 854
mbed_official 15:a81a8d6c1dfe 855 if (module->locked) {
mbed_official 15:a81a8d6c1dfe 856 status = STATUS_BUSY;
mbed_official 15:a81a8d6c1dfe 857 } else {
mbed_official 15:a81a8d6c1dfe 858 module->locked = true;
mbed_official 15:a81a8d6c1dfe 859 status = STATUS_OK;
mbed_official 15:a81a8d6c1dfe 860 }
mbed_official 15:a81a8d6c1dfe 861
mbed_official 15:a81a8d6c1dfe 862 system_interrupt_leave_critical_section();
mbed_official 15:a81a8d6c1dfe 863
mbed_official 15:a81a8d6c1dfe 864 return status;
mbed_official 15:a81a8d6c1dfe 865 }
mbed_official 15:a81a8d6c1dfe 866
mbed_official 15:a81a8d6c1dfe 867 /**
mbed_official 15:a81a8d6c1dfe 868 * \brief Unlock driver instance
mbed_official 15:a81a8d6c1dfe 869 *
mbed_official 15:a81a8d6c1dfe 870 * This function clears the instance lock, indicating that it is available for
mbed_official 15:a81a8d6c1dfe 871 * use.
mbed_official 15:a81a8d6c1dfe 872 *
mbed_official 15:a81a8d6c1dfe 873 * \param[in,out] module Pointer to the driver instance to lock
mbed_official 15:a81a8d6c1dfe 874 *
mbed_official 15:a81a8d6c1dfe 875 */
mbed_official 15:a81a8d6c1dfe 876 static inline void usart_unlock(struct usart_module *const module)
mbed_official 15:a81a8d6c1dfe 877 {
mbed_official 15:a81a8d6c1dfe 878 module->locked = false;
mbed_official 15:a81a8d6c1dfe 879 }
mbed_official 15:a81a8d6c1dfe 880
mbed_official 15:a81a8d6c1dfe 881 /** @} */
mbed_official 15:a81a8d6c1dfe 882
mbed_official 15:a81a8d6c1dfe 883 /**
mbed_official 15:a81a8d6c1dfe 884 * \brief Check if peripheral is busy syncing registers across clock domains
mbed_official 15:a81a8d6c1dfe 885 *
mbed_official 15:a81a8d6c1dfe 886 * Return peripheral synchronization status. If doing a non-blocking
mbed_official 15:a81a8d6c1dfe 887 * implementation this function can be used to check the sync state and hold of
mbed_official 15:a81a8d6c1dfe 888 * any new actions until sync is complete. If this functions is not run; the
mbed_official 15:a81a8d6c1dfe 889 * functions will block until the sync has completed.
mbed_official 15:a81a8d6c1dfe 890 *
mbed_official 15:a81a8d6c1dfe 891 * \param[in] module Pointer to peripheral module
mbed_official 15:a81a8d6c1dfe 892 *
mbed_official 15:a81a8d6c1dfe 893 * \return Peripheral sync status.
mbed_official 15:a81a8d6c1dfe 894 *
mbed_official 15:a81a8d6c1dfe 895 * \retval true Peripheral is busy syncing
mbed_official 15:a81a8d6c1dfe 896 * \retval false Peripheral is not busy syncing and can be read/written without
mbed_official 15:a81a8d6c1dfe 897 * stalling the bus.
mbed_official 15:a81a8d6c1dfe 898 */
mbed_official 15:a81a8d6c1dfe 899 static inline bool usart_is_syncing(
mbed_official 15:a81a8d6c1dfe 900 const struct usart_module *const module)
mbed_official 15:a81a8d6c1dfe 901 {
mbed_official 15:a81a8d6c1dfe 902 /* Sanity check arguments */
mbed_official 15:a81a8d6c1dfe 903 Assert(module);
mbed_official 15:a81a8d6c1dfe 904 Assert(module->hw);
mbed_official 15:a81a8d6c1dfe 905
mbed_official 15:a81a8d6c1dfe 906 SercomUsart *const usart_hw = &(module->hw->USART);
mbed_official 15:a81a8d6c1dfe 907
mbed_official 15:a81a8d6c1dfe 908 #ifdef FEATURE_USART_SYNC_SCHEME_V2
mbed_official 15:a81a8d6c1dfe 909 return (usart_hw->SYNCBUSY.reg);
mbed_official 15:a81a8d6c1dfe 910 #else
mbed_official 15:a81a8d6c1dfe 911 return (usart_hw->STATUS.reg & SERCOM_USART_STATUS_SYNCBUSY);
mbed_official 15:a81a8d6c1dfe 912 #endif
mbed_official 15:a81a8d6c1dfe 913 }
mbed_official 15:a81a8d6c1dfe 914
mbed_official 15:a81a8d6c1dfe 915 #if !defined (__DOXYGEN__)
mbed_official 15:a81a8d6c1dfe 916 /**
mbed_official 15:a81a8d6c1dfe 917 * \internal
mbed_official 15:a81a8d6c1dfe 918 * Waits until synchronization is complete
mbed_official 15:a81a8d6c1dfe 919 */
mbed_official 15:a81a8d6c1dfe 920 static inline void _usart_wait_for_sync(
mbed_official 15:a81a8d6c1dfe 921 const struct usart_module *const module)
mbed_official 15:a81a8d6c1dfe 922 {
mbed_official 15:a81a8d6c1dfe 923 /* Sanity check. */
mbed_official 15:a81a8d6c1dfe 924 Assert(module);
mbed_official 15:a81a8d6c1dfe 925
mbed_official 15:a81a8d6c1dfe 926 while (usart_is_syncing(module)) {
mbed_official 15:a81a8d6c1dfe 927 /* Wait until the synchronization is complete */
mbed_official 15:a81a8d6c1dfe 928 }
mbed_official 15:a81a8d6c1dfe 929 }
mbed_official 15:a81a8d6c1dfe 930 #endif
mbed_official 15:a81a8d6c1dfe 931
mbed_official 15:a81a8d6c1dfe 932 /**
mbed_official 15:a81a8d6c1dfe 933 * \brief Initializes the device to predefined defaults
mbed_official 15:a81a8d6c1dfe 934 *
mbed_official 15:a81a8d6c1dfe 935 * Initialize the USART device to predefined defaults:
mbed_official 15:a81a8d6c1dfe 936 * - 8-bit asynchronous USART
mbed_official 15:a81a8d6c1dfe 937 * - No parity
mbed_official 15:a81a8d6c1dfe 938 * - One stop bit
mbed_official 15:a81a8d6c1dfe 939 * - 9600 baud
mbed_official 15:a81a8d6c1dfe 940 * - Transmitter enabled
mbed_official 15:a81a8d6c1dfe 941 * - Receiver enabled
mbed_official 15:a81a8d6c1dfe 942 * - GCLK generator 0 as clock source
mbed_official 15:a81a8d6c1dfe 943 * - Default pin configuration
mbed_official 15:a81a8d6c1dfe 944 *
mbed_official 15:a81a8d6c1dfe 945 * The configuration struct will be updated with the default
mbed_official 15:a81a8d6c1dfe 946 * configuration.
mbed_official 15:a81a8d6c1dfe 947 *
mbed_official 15:a81a8d6c1dfe 948 * \param[in,out] config Pointer to configuration struct
mbed_official 15:a81a8d6c1dfe 949 */
mbed_official 15:a81a8d6c1dfe 950 static inline void usart_get_config_defaults(
mbed_official 15:a81a8d6c1dfe 951 struct usart_config *const config)
mbed_official 15:a81a8d6c1dfe 952 {
mbed_official 15:a81a8d6c1dfe 953 /* Sanity check arguments */
mbed_official 15:a81a8d6c1dfe 954 Assert(config);
mbed_official 15:a81a8d6c1dfe 955
mbed_official 15:a81a8d6c1dfe 956 /* Set default config in the config struct */
mbed_official 15:a81a8d6c1dfe 957 config->data_order = USART_DATAORDER_LSB;
mbed_official 15:a81a8d6c1dfe 958 config->transfer_mode = USART_TRANSFER_ASYNCHRONOUSLY;
mbed_official 15:a81a8d6c1dfe 959 config->parity = USART_PARITY_NONE;
mbed_official 15:a81a8d6c1dfe 960 config->stopbits = USART_STOPBITS_1;
mbed_official 15:a81a8d6c1dfe 961 config->character_size = USART_CHARACTER_SIZE_8BIT;
mbed_official 15:a81a8d6c1dfe 962 config->baudrate = 9600;
mbed_official 15:a81a8d6c1dfe 963 config->receiver_enable = true;
mbed_official 15:a81a8d6c1dfe 964 config->transmitter_enable = true;
mbed_official 15:a81a8d6c1dfe 965 config->clock_polarity_inverted = false;
mbed_official 15:a81a8d6c1dfe 966 config->use_external_clock = false;
mbed_official 15:a81a8d6c1dfe 967 config->ext_clock_freq = 0;
mbed_official 15:a81a8d6c1dfe 968 config->mux_setting = USART_RX_1_TX_2_XCK_3;
mbed_official 15:a81a8d6c1dfe 969 config->run_in_standby = false;
mbed_official 15:a81a8d6c1dfe 970 config->generator_source = GCLK_GENERATOR_0;
mbed_official 15:a81a8d6c1dfe 971 config->pinmux_pad0 = PINMUX_DEFAULT;
mbed_official 15:a81a8d6c1dfe 972 config->pinmux_pad1 = PINMUX_DEFAULT;
mbed_official 15:a81a8d6c1dfe 973 config->pinmux_pad2 = PINMUX_DEFAULT;
mbed_official 15:a81a8d6c1dfe 974 config->pinmux_pad3 = PINMUX_DEFAULT;
mbed_official 15:a81a8d6c1dfe 975 #ifdef FEATURE_USART_OVER_SAMPLE
mbed_official 15:a81a8d6c1dfe 976 config->sample_adjustment = USART_SAMPLE_ADJUSTMENT_7_8_9;
mbed_official 15:a81a8d6c1dfe 977 config->sample_rate = USART_SAMPLE_RATE_16X_ARITHMETIC;
mbed_official 15:a81a8d6c1dfe 978 #endif
mbed_official 15:a81a8d6c1dfe 979 #ifdef FEATURE_USART_LIN_SLAVE
mbed_official 15:a81a8d6c1dfe 980 config->lin_slave_enable = false;
mbed_official 15:a81a8d6c1dfe 981 #endif
mbed_official 15:a81a8d6c1dfe 982
mbed_official 15:a81a8d6c1dfe 983 #ifdef FEATURE_USART_LIN_MASTER
mbed_official 15:a81a8d6c1dfe 984 config->lin_node = LIN_INVALID_MODE;
mbed_official 15:a81a8d6c1dfe 985 config->lin_header_delay = LIN_MASTER_HEADER_DELAY_0;
mbed_official 15:a81a8d6c1dfe 986 config->lin_break_length = LIN_MASTER_BREAK_LENGTH_13_BIT;
mbed_official 15:a81a8d6c1dfe 987 #endif
mbed_official 15:a81a8d6c1dfe 988
mbed_official 15:a81a8d6c1dfe 989 #ifdef FEATURE_USART_IMMEDIATE_BUFFER_OVERFLOW_NOTIFICATION
mbed_official 15:a81a8d6c1dfe 990 config->immediate_buffer_overflow_notification = false;
mbed_official 15:a81a8d6c1dfe 991 #endif
mbed_official 15:a81a8d6c1dfe 992 #ifdef FEATURE_USART_START_FRAME_DECTION
mbed_official 15:a81a8d6c1dfe 993 config->start_frame_detection_enable = false;
mbed_official 15:a81a8d6c1dfe 994 #endif
mbed_official 15:a81a8d6c1dfe 995 #ifdef FEATURE_USART_IRDA
mbed_official 15:a81a8d6c1dfe 996 config->encoding_format_enable = false;
mbed_official 15:a81a8d6c1dfe 997 config->receive_pulse_length = 19;
mbed_official 15:a81a8d6c1dfe 998 #endif
mbed_official 15:a81a8d6c1dfe 999 #ifdef FEATURE_USART_COLLISION_DECTION
mbed_official 15:a81a8d6c1dfe 1000 config->collision_detection_enable = false;
mbed_official 15:a81a8d6c1dfe 1001 #endif
mbed_official 15:a81a8d6c1dfe 1002 #ifdef FEATURE_USART_RS485
mbed_official 15:a81a8d6c1dfe 1003 config->rs485_guard_time = RS485_GUARD_TIME_0_BIT;
mbed_official 15:a81a8d6c1dfe 1004 #endif
mbed_official 15:a81a8d6c1dfe 1005 }
mbed_official 15:a81a8d6c1dfe 1006
mbed_official 15:a81a8d6c1dfe 1007 enum status_code usart_init(
mbed_official 15:a81a8d6c1dfe 1008 struct usart_module *const module,
mbed_official 15:a81a8d6c1dfe 1009 Sercom *const hw,
mbed_official 15:a81a8d6c1dfe 1010 const struct usart_config *const config);
mbed_official 15:a81a8d6c1dfe 1011
mbed_official 15:a81a8d6c1dfe 1012 /**
mbed_official 15:a81a8d6c1dfe 1013 * \brief Enable the module
mbed_official 15:a81a8d6c1dfe 1014 *
mbed_official 15:a81a8d6c1dfe 1015 * Enables the USART module.
mbed_official 15:a81a8d6c1dfe 1016 *
mbed_official 15:a81a8d6c1dfe 1017 * \param[in] module Pointer to USART software instance struct
mbed_official 15:a81a8d6c1dfe 1018 */
mbed_official 15:a81a8d6c1dfe 1019 static inline void usart_enable(
mbed_official 15:a81a8d6c1dfe 1020 const struct usart_module *const module)
mbed_official 15:a81a8d6c1dfe 1021 {
mbed_official 15:a81a8d6c1dfe 1022 /* Sanity check arguments */
mbed_official 15:a81a8d6c1dfe 1023 Assert(module);
mbed_official 15:a81a8d6c1dfe 1024 Assert(module->hw);
mbed_official 15:a81a8d6c1dfe 1025
mbed_official 15:a81a8d6c1dfe 1026 /* Get a pointer to the hardware module instance */
mbed_official 15:a81a8d6c1dfe 1027 SercomUsart *const usart_hw = &(module->hw->USART);
mbed_official 15:a81a8d6c1dfe 1028
mbed_official 15:a81a8d6c1dfe 1029 #if USART_CALLBACK_MODE == true
mbed_official 15:a81a8d6c1dfe 1030 /* Enable Global interrupt for module */
mbed_official 15:a81a8d6c1dfe 1031 system_interrupt_enable(_sercom_get_interrupt_vector(module->hw));
mbed_official 15:a81a8d6c1dfe 1032 #endif
mbed_official 15:a81a8d6c1dfe 1033
mbed_official 15:a81a8d6c1dfe 1034 /* Wait until synchronization is complete */
mbed_official 15:a81a8d6c1dfe 1035 _usart_wait_for_sync(module);
mbed_official 15:a81a8d6c1dfe 1036
mbed_official 15:a81a8d6c1dfe 1037 /* Enable USART module */
mbed_official 15:a81a8d6c1dfe 1038 usart_hw->CTRLA.reg |= SERCOM_USART_CTRLA_ENABLE;
mbed_official 15:a81a8d6c1dfe 1039 }
mbed_official 15:a81a8d6c1dfe 1040
mbed_official 15:a81a8d6c1dfe 1041 /**
mbed_official 15:a81a8d6c1dfe 1042 * \brief Disable module
mbed_official 15:a81a8d6c1dfe 1043 *
mbed_official 15:a81a8d6c1dfe 1044 * Disables the USART module.
mbed_official 15:a81a8d6c1dfe 1045 *
mbed_official 15:a81a8d6c1dfe 1046 * \param[in] module Pointer to USART software instance struct
mbed_official 15:a81a8d6c1dfe 1047 */
mbed_official 15:a81a8d6c1dfe 1048 static inline void usart_disable(
mbed_official 15:a81a8d6c1dfe 1049 const struct usart_module *const module)
mbed_official 15:a81a8d6c1dfe 1050 {
mbed_official 15:a81a8d6c1dfe 1051 /* Sanity check arguments */
mbed_official 15:a81a8d6c1dfe 1052 Assert(module);
mbed_official 15:a81a8d6c1dfe 1053 Assert(module->hw);
mbed_official 15:a81a8d6c1dfe 1054
mbed_official 15:a81a8d6c1dfe 1055 /* Get a pointer to the hardware module instance */
mbed_official 15:a81a8d6c1dfe 1056 SercomUsart *const usart_hw = &(module->hw->USART);
mbed_official 15:a81a8d6c1dfe 1057
mbed_official 15:a81a8d6c1dfe 1058 #if USART_CALLBACK_MODE == true
mbed_official 15:a81a8d6c1dfe 1059 /* Disable Global interrupt for module */
mbed_official 15:a81a8d6c1dfe 1060 system_interrupt_disable(_sercom_get_interrupt_vector(module->hw));
mbed_official 15:a81a8d6c1dfe 1061 #endif
mbed_official 15:a81a8d6c1dfe 1062 /* Wait until synchronization is complete */
mbed_official 15:a81a8d6c1dfe 1063 _usart_wait_for_sync(module);
mbed_official 15:a81a8d6c1dfe 1064
mbed_official 15:a81a8d6c1dfe 1065 /* Disable USART module */
mbed_official 15:a81a8d6c1dfe 1066 usart_hw->CTRLA.reg &= ~SERCOM_USART_CTRLA_ENABLE;
mbed_official 15:a81a8d6c1dfe 1067 }
mbed_official 15:a81a8d6c1dfe 1068
mbed_official 15:a81a8d6c1dfe 1069 /**
mbed_official 15:a81a8d6c1dfe 1070 * \brief Resets the USART module
mbed_official 15:a81a8d6c1dfe 1071 *
mbed_official 15:a81a8d6c1dfe 1072 * Disables and resets the USART module.
mbed_official 15:a81a8d6c1dfe 1073 *
mbed_official 15:a81a8d6c1dfe 1074 * \param[in] module Pointer to the USART software instance struct
mbed_official 15:a81a8d6c1dfe 1075 */
mbed_official 15:a81a8d6c1dfe 1076 static inline void usart_reset(
mbed_official 15:a81a8d6c1dfe 1077 const struct usart_module *const module)
mbed_official 15:a81a8d6c1dfe 1078 {
mbed_official 15:a81a8d6c1dfe 1079 /* Sanity check arguments */
mbed_official 15:a81a8d6c1dfe 1080 Assert(module);
mbed_official 15:a81a8d6c1dfe 1081 Assert(module->hw);
mbed_official 15:a81a8d6c1dfe 1082
mbed_official 15:a81a8d6c1dfe 1083 /* Get a pointer to the hardware module instance */
mbed_official 15:a81a8d6c1dfe 1084 SercomUsart *const usart_hw = &(module->hw->USART);
mbed_official 15:a81a8d6c1dfe 1085
mbed_official 15:a81a8d6c1dfe 1086 usart_disable(module);
mbed_official 15:a81a8d6c1dfe 1087
mbed_official 15:a81a8d6c1dfe 1088 /* Wait until synchronization is complete */
mbed_official 15:a81a8d6c1dfe 1089 _usart_wait_for_sync(module);
mbed_official 15:a81a8d6c1dfe 1090
mbed_official 15:a81a8d6c1dfe 1091 /* Reset module */
mbed_official 15:a81a8d6c1dfe 1092 usart_hw->CTRLA.reg = SERCOM_USART_CTRLA_SWRST;
mbed_official 15:a81a8d6c1dfe 1093 }
mbed_official 15:a81a8d6c1dfe 1094
mbed_official 15:a81a8d6c1dfe 1095 /**
mbed_official 15:a81a8d6c1dfe 1096 * \name Writing and Reading
mbed_official 15:a81a8d6c1dfe 1097 * @{
mbed_official 15:a81a8d6c1dfe 1098 */
mbed_official 15:a81a8d6c1dfe 1099 enum status_code usart_write_wait(
mbed_official 15:a81a8d6c1dfe 1100 struct usart_module *const module,
mbed_official 15:a81a8d6c1dfe 1101 const uint16_t tx_data);
mbed_official 15:a81a8d6c1dfe 1102
mbed_official 15:a81a8d6c1dfe 1103 enum status_code usart_read_wait(
mbed_official 15:a81a8d6c1dfe 1104 struct usart_module *const module,
mbed_official 15:a81a8d6c1dfe 1105 uint16_t *const rx_data);
mbed_official 15:a81a8d6c1dfe 1106
mbed_official 15:a81a8d6c1dfe 1107 enum status_code usart_write_buffer_wait(
mbed_official 15:a81a8d6c1dfe 1108 struct usart_module *const module,
mbed_official 15:a81a8d6c1dfe 1109 const uint8_t *tx_data,
mbed_official 15:a81a8d6c1dfe 1110 uint16_t length);
mbed_official 15:a81a8d6c1dfe 1111
mbed_official 15:a81a8d6c1dfe 1112 enum status_code usart_read_buffer_wait(
mbed_official 15:a81a8d6c1dfe 1113 struct usart_module *const module,
mbed_official 15:a81a8d6c1dfe 1114 uint8_t *rx_data,
mbed_official 15:a81a8d6c1dfe 1115 uint16_t length);
mbed_official 15:a81a8d6c1dfe 1116 /** @} */
mbed_official 15:a81a8d6c1dfe 1117
mbed_official 15:a81a8d6c1dfe 1118 /**
mbed_official 15:a81a8d6c1dfe 1119 * \name Enabling/Disabling Receiver and Transmitter
mbed_official 15:a81a8d6c1dfe 1120 * @{
mbed_official 15:a81a8d6c1dfe 1121 */
mbed_official 15:a81a8d6c1dfe 1122
mbed_official 15:a81a8d6c1dfe 1123 /**
mbed_official 15:a81a8d6c1dfe 1124 * \brief Enable Transceiver
mbed_official 15:a81a8d6c1dfe 1125 *
mbed_official 15:a81a8d6c1dfe 1126 * Enable the given transceiver. Either RX or TX.
mbed_official 15:a81a8d6c1dfe 1127 *
mbed_official 15:a81a8d6c1dfe 1128 * \param[in] module Pointer to USART software instance struct
mbed_official 15:a81a8d6c1dfe 1129 * \param[in] transceiver_type Transceiver type
mbed_official 15:a81a8d6c1dfe 1130 */
mbed_official 15:a81a8d6c1dfe 1131 static inline void usart_enable_transceiver(
mbed_official 15:a81a8d6c1dfe 1132 struct usart_module *const module,
mbed_official 15:a81a8d6c1dfe 1133 enum usart_transceiver_type transceiver_type)
mbed_official 15:a81a8d6c1dfe 1134 {
mbed_official 15:a81a8d6c1dfe 1135 /* Sanity check arguments */
mbed_official 15:a81a8d6c1dfe 1136 Assert(module);
mbed_official 15:a81a8d6c1dfe 1137 Assert(module->hw);
mbed_official 15:a81a8d6c1dfe 1138
mbed_official 15:a81a8d6c1dfe 1139 /* Get a pointer to the hardware module instance */
mbed_official 15:a81a8d6c1dfe 1140 SercomUsart *const usart_hw = &(module->hw->USART);
mbed_official 15:a81a8d6c1dfe 1141
mbed_official 15:a81a8d6c1dfe 1142 /* Wait until synchronization is complete */
mbed_official 15:a81a8d6c1dfe 1143 _usart_wait_for_sync(module);
mbed_official 15:a81a8d6c1dfe 1144
mbed_official 15:a81a8d6c1dfe 1145 switch (transceiver_type) {
mbed_official 15:a81a8d6c1dfe 1146 case USART_TRANSCEIVER_RX:
mbed_official 15:a81a8d6c1dfe 1147 /* Enable RX */
mbed_official 15:a81a8d6c1dfe 1148 usart_hw->CTRLB.reg |= SERCOM_USART_CTRLB_RXEN;
mbed_official 15:a81a8d6c1dfe 1149 module->receiver_enabled = true;
mbed_official 15:a81a8d6c1dfe 1150 break;
mbed_official 15:a81a8d6c1dfe 1151
mbed_official 15:a81a8d6c1dfe 1152 case USART_TRANSCEIVER_TX:
mbed_official 15:a81a8d6c1dfe 1153 /* Enable TX */
mbed_official 15:a81a8d6c1dfe 1154 usart_hw->CTRLB.reg |= SERCOM_USART_CTRLB_TXEN;
mbed_official 15:a81a8d6c1dfe 1155 module->transmitter_enabled = true;
mbed_official 15:a81a8d6c1dfe 1156 break;
mbed_official 15:a81a8d6c1dfe 1157 }
mbed_official 15:a81a8d6c1dfe 1158 _usart_wait_for_sync(module);
mbed_official 15:a81a8d6c1dfe 1159 }
mbed_official 15:a81a8d6c1dfe 1160
mbed_official 15:a81a8d6c1dfe 1161 /**
mbed_official 15:a81a8d6c1dfe 1162 * \brief Disable Transceiver
mbed_official 15:a81a8d6c1dfe 1163 *
mbed_official 15:a81a8d6c1dfe 1164 * Disable the given transceiver (RX or TX).
mbed_official 15:a81a8d6c1dfe 1165 *
mbed_official 15:a81a8d6c1dfe 1166 * \param[in] module Pointer to USART software instance struct
mbed_official 15:a81a8d6c1dfe 1167 * \param[in] transceiver_type Transceiver type
mbed_official 15:a81a8d6c1dfe 1168 */
mbed_official 15:a81a8d6c1dfe 1169 static inline void usart_disable_transceiver(
mbed_official 15:a81a8d6c1dfe 1170 struct usart_module *const module,
mbed_official 15:a81a8d6c1dfe 1171 enum usart_transceiver_type transceiver_type)
mbed_official 15:a81a8d6c1dfe 1172 {
mbed_official 15:a81a8d6c1dfe 1173 /* Sanity check arguments */
mbed_official 15:a81a8d6c1dfe 1174 Assert(module);
mbed_official 15:a81a8d6c1dfe 1175 Assert(module->hw);
mbed_official 15:a81a8d6c1dfe 1176
mbed_official 15:a81a8d6c1dfe 1177 /* Get a pointer to the hardware module instance */
mbed_official 15:a81a8d6c1dfe 1178 SercomUsart *const usart_hw = &(module->hw->USART);
mbed_official 15:a81a8d6c1dfe 1179
mbed_official 15:a81a8d6c1dfe 1180 /* Wait until synchronization is complete */
mbed_official 15:a81a8d6c1dfe 1181 _usart_wait_for_sync(module);
mbed_official 15:a81a8d6c1dfe 1182
mbed_official 15:a81a8d6c1dfe 1183 switch (transceiver_type) {
mbed_official 15:a81a8d6c1dfe 1184 case USART_TRANSCEIVER_RX:
mbed_official 15:a81a8d6c1dfe 1185 /* Disable RX */
mbed_official 15:a81a8d6c1dfe 1186 usart_hw->CTRLB.reg &= ~SERCOM_USART_CTRLB_RXEN;
mbed_official 15:a81a8d6c1dfe 1187 module->receiver_enabled = false;
mbed_official 15:a81a8d6c1dfe 1188 break;
mbed_official 15:a81a8d6c1dfe 1189
mbed_official 15:a81a8d6c1dfe 1190 case USART_TRANSCEIVER_TX:
mbed_official 15:a81a8d6c1dfe 1191 /* Disable TX */
mbed_official 15:a81a8d6c1dfe 1192 usart_hw->CTRLB.reg &= ~SERCOM_USART_CTRLB_TXEN;
mbed_official 15:a81a8d6c1dfe 1193 module->transmitter_enabled = false;
mbed_official 15:a81a8d6c1dfe 1194 break;
mbed_official 15:a81a8d6c1dfe 1195 }
mbed_official 15:a81a8d6c1dfe 1196 }
mbed_official 15:a81a8d6c1dfe 1197
mbed_official 15:a81a8d6c1dfe 1198 /** @} */
mbed_official 15:a81a8d6c1dfe 1199
mbed_official 15:a81a8d6c1dfe 1200 #ifdef FEATURE_USART_LIN_MASTER
mbed_official 15:a81a8d6c1dfe 1201 /**
mbed_official 15:a81a8d6c1dfe 1202 * \name LIN Master Command and Status
mbed_official 15:a81a8d6c1dfe 1203 * @{
mbed_official 15:a81a8d6c1dfe 1204 */
mbed_official 15:a81a8d6c1dfe 1205
mbed_official 15:a81a8d6c1dfe 1206 /**
mbed_official 15:a81a8d6c1dfe 1207 * \brief Sending LIN command.
mbed_official 15:a81a8d6c1dfe 1208 *
mbed_official 15:a81a8d6c1dfe 1209 * Sending LIN command.
mbed_official 15:a81a8d6c1dfe 1210 *
mbed_official 15:a81a8d6c1dfe 1211 * \param[in] module Pointer to USART software instance struct.
mbed_official 15:a81a8d6c1dfe 1212 * \param[in] cmd Cammand type.
mbed_official 15:a81a8d6c1dfe 1213 */
mbed_official 15:a81a8d6c1dfe 1214 static inline void lin_master_send_cmd(
mbed_official 15:a81a8d6c1dfe 1215 struct usart_module *const module,
mbed_official 15:a81a8d6c1dfe 1216 enum lin_master_cmd cmd)
mbed_official 15:a81a8d6c1dfe 1217 {
mbed_official 15:a81a8d6c1dfe 1218 SercomUsart *const usart_hw = &(module->hw->USART);
mbed_official 15:a81a8d6c1dfe 1219 _usart_wait_for_sync(module);
mbed_official 15:a81a8d6c1dfe 1220 usart_hw->CTRLB.reg |= cmd;
mbed_official 15:a81a8d6c1dfe 1221 }
mbed_official 15:a81a8d6c1dfe 1222
mbed_official 15:a81a8d6c1dfe 1223 /**
mbed_official 15:a81a8d6c1dfe 1224 * \brief Get LIN transmission status.
mbed_official 15:a81a8d6c1dfe 1225 *
mbed_official 15:a81a8d6c1dfe 1226 * Get LIN transmission status.
mbed_official 15:a81a8d6c1dfe 1227 *
mbed_official 15:a81a8d6c1dfe 1228 * \param[in] module Pointer to USART software instance struct.
mbed_official 15:a81a8d6c1dfe 1229 *
mbed_official 15:a81a8d6c1dfe 1230 * \return Status of LIN master transmission.
mbed_official 15:a81a8d6c1dfe 1231 * \retval true Data transmission completed
mbed_official 15:a81a8d6c1dfe 1232 * \retval false Transmission is ongoing
mbed_official 15:a81a8d6c1dfe 1233 */
mbed_official 15:a81a8d6c1dfe 1234 static inline bool lin_master_transmission_status(struct usart_module *const module)
mbed_official 15:a81a8d6c1dfe 1235 {
mbed_official 15:a81a8d6c1dfe 1236 SercomUsart *const usart_hw = &(module->hw->USART);
mbed_official 15:a81a8d6c1dfe 1237 return ((usart_hw->STATUS.reg & SERCOM_USART_STATUS_TXE)? true:false);
mbed_official 15:a81a8d6c1dfe 1238 }
mbed_official 15:a81a8d6c1dfe 1239
mbed_official 15:a81a8d6c1dfe 1240 /** @} */
mbed_official 15:a81a8d6c1dfe 1241 #endif
mbed_official 15:a81a8d6c1dfe 1242
mbed_official 15:a81a8d6c1dfe 1243 #ifdef __cplusplus
mbed_official 15:a81a8d6c1dfe 1244 }
mbed_official 15:a81a8d6c1dfe 1245 #endif
mbed_official 15:a81a8d6c1dfe 1246
mbed_official 15:a81a8d6c1dfe 1247 /** @} */
mbed_official 15:a81a8d6c1dfe 1248
mbed_official 15:a81a8d6c1dfe 1249 /**
mbed_official 15:a81a8d6c1dfe 1250 * \page asfdoc_sam0_sercom_usart_extra Extra Information for SERCOM USART Driver
mbed_official 15:a81a8d6c1dfe 1251 *
mbed_official 15:a81a8d6c1dfe 1252 * \section asfdoc_sam0_sercom_usart_extra_acronyms Acronyms
mbed_official 15:a81a8d6c1dfe 1253 *
mbed_official 15:a81a8d6c1dfe 1254 * Below is a table listing the acronyms used in this module, along with their
mbed_official 15:a81a8d6c1dfe 1255 * intended meanings.
mbed_official 15:a81a8d6c1dfe 1256 *
mbed_official 15:a81a8d6c1dfe 1257 * <table>
mbed_official 15:a81a8d6c1dfe 1258 * <tr>
mbed_official 15:a81a8d6c1dfe 1259 * <th>Acronym</th>
mbed_official 15:a81a8d6c1dfe 1260 * <th>Description</th>
mbed_official 15:a81a8d6c1dfe 1261 * </tr>
mbed_official 15:a81a8d6c1dfe 1262 * <tr>
mbed_official 15:a81a8d6c1dfe 1263 * <td>SERCOM</td>
mbed_official 15:a81a8d6c1dfe 1264 * <td>Serial Communication Interface</td>
mbed_official 15:a81a8d6c1dfe 1265 * </tr>
mbed_official 15:a81a8d6c1dfe 1266 * <tr>
mbed_official 15:a81a8d6c1dfe 1267 * <td>USART</td>
mbed_official 15:a81a8d6c1dfe 1268 * <td>Universal Synchronous and Asynchronous Serial Receiver and Transmitter</td>
mbed_official 15:a81a8d6c1dfe 1269 * </tr>
mbed_official 15:a81a8d6c1dfe 1270 * <tr>
mbed_official 15:a81a8d6c1dfe 1271 * <td>LSB</td>
mbed_official 15:a81a8d6c1dfe 1272 * <td>Least Significant Bit</td>
mbed_official 15:a81a8d6c1dfe 1273 * </tr>
mbed_official 15:a81a8d6c1dfe 1274 * <tr>
mbed_official 15:a81a8d6c1dfe 1275 * <td>MSB</td>
mbed_official 15:a81a8d6c1dfe 1276 * <td>Most Significant Bit</td>
mbed_official 15:a81a8d6c1dfe 1277 * </tr>
mbed_official 15:a81a8d6c1dfe 1278 * <tr>
mbed_official 15:a81a8d6c1dfe 1279 * <td>DMA</td>
mbed_official 15:a81a8d6c1dfe 1280 * <td>Direct Memory Access</td>
mbed_official 15:a81a8d6c1dfe 1281 * </tr>
mbed_official 15:a81a8d6c1dfe 1282 * </table>
mbed_official 15:a81a8d6c1dfe 1283 *
mbed_official 15:a81a8d6c1dfe 1284 *
mbed_official 15:a81a8d6c1dfe 1285 * \section asfdoc_sam0_sercom_usart_extra_dependencies Dependencies
mbed_official 15:a81a8d6c1dfe 1286 * This driver has the following dependencies:
mbed_official 15:a81a8d6c1dfe 1287 *
mbed_official 15:a81a8d6c1dfe 1288 * - \ref asfdoc_sam0_system_pinmux_group "System Pin Multiplexer Driver"
mbed_official 15:a81a8d6c1dfe 1289 * - \ref asfdoc_sam0_system_clock_group "System clock configuration"
mbed_official 15:a81a8d6c1dfe 1290 *
mbed_official 15:a81a8d6c1dfe 1291 *
mbed_official 15:a81a8d6c1dfe 1292 * \section asfdoc_sam0_sercom_usart_extra_errata Errata
mbed_official 15:a81a8d6c1dfe 1293 * There are no errata related to this driver.
mbed_official 15:a81a8d6c1dfe 1294 *
mbed_official 15:a81a8d6c1dfe 1295 *
mbed_official 15:a81a8d6c1dfe 1296 * \section asfdoc_sam0_sercom_usart_extra_history Module History
mbed_official 15:a81a8d6c1dfe 1297 * An overview of the module history is presented in the table below, with
mbed_official 15:a81a8d6c1dfe 1298 * details on the enhancements and fixes made to the module since its first
mbed_official 15:a81a8d6c1dfe 1299 * release. The current version of this corresponds to the newest version in
mbed_official 15:a81a8d6c1dfe 1300 * the table.
mbed_official 15:a81a8d6c1dfe 1301 *
mbed_official 15:a81a8d6c1dfe 1302 * <table>
mbed_official 15:a81a8d6c1dfe 1303 * <tr>
mbed_official 15:a81a8d6c1dfe 1304 * <th>Changelog</th>
mbed_official 15:a81a8d6c1dfe 1305 * </tr>
mbed_official 15:a81a8d6c1dfe 1306 * <tr>
mbed_official 15:a81a8d6c1dfe 1307 * <td>Added new feature as below:
mbed_official 15:a81a8d6c1dfe 1308 * \li LIN master
mbed_official 15:a81a8d6c1dfe 1309 * \li RS485
mbed_official 15:a81a8d6c1dfe 1310 * </tr>
mbed_official 15:a81a8d6c1dfe 1311 * <tr>
mbed_official 15:a81a8d6c1dfe 1312 * <td>Added new feature as below:
mbed_official 15:a81a8d6c1dfe 1313 * \li Oversample
mbed_official 15:a81a8d6c1dfe 1314 * \li Buffer overflow notification
mbed_official 15:a81a8d6c1dfe 1315 * \li Irda
mbed_official 15:a81a8d6c1dfe 1316 * \li Lin slave
mbed_official 15:a81a8d6c1dfe 1317 * \li Start frame detection
mbed_official 15:a81a8d6c1dfe 1318 * \li Hardware flow control
mbed_official 15:a81a8d6c1dfe 1319 * \li Collision detection
mbed_official 15:a81a8d6c1dfe 1320 * \li DMA support </td>
mbed_official 15:a81a8d6c1dfe 1321 * </tr>
mbed_official 15:a81a8d6c1dfe 1322 * <tr>
mbed_official 15:a81a8d6c1dfe 1323 * <td>\li Added new \c transmitter_enable and \c receiver_enable Boolean
mbed_official 15:a81a8d6c1dfe 1324 * values to \c struct usart_config
mbed_official 15:a81a8d6c1dfe 1325 * \li Altered \c usart_write_* and usart_read_* functions to abort with
mbed_official 15:a81a8d6c1dfe 1326 * an error code if the relevant transceiver is not enabled
mbed_official 15:a81a8d6c1dfe 1327 * \li Fixed \c usart_write_buffer_wait() and \c usart_read_buffer_wait()
mbed_official 15:a81a8d6c1dfe 1328 * not aborting correctly when a timeout condition occurs</td>
mbed_official 15:a81a8d6c1dfe 1329 * </tr>
mbed_official 15:a81a8d6c1dfe 1330 * <tr>
mbed_official 15:a81a8d6c1dfe 1331 * <td>Initial Release</td>
mbed_official 15:a81a8d6c1dfe 1332 * </tr>
mbed_official 15:a81a8d6c1dfe 1333 * </table>
mbed_official 15:a81a8d6c1dfe 1334 */
mbed_official 15:a81a8d6c1dfe 1335
mbed_official 15:a81a8d6c1dfe 1336 /**
mbed_official 15:a81a8d6c1dfe 1337 * \page asfdoc_sam0_sercom_usart_exqsg Examples for SERCOM USART Driver
mbed_official 15:a81a8d6c1dfe 1338 *
mbed_official 15:a81a8d6c1dfe 1339 * This is a list of the available Quick Start guides (QSGs) and example
mbed_official 15:a81a8d6c1dfe 1340 * applications for \ref asfdoc_sam0_sercom_usart_group. QSGs are simple examples with
mbed_official 15:a81a8d6c1dfe 1341 * step-by-step instructions to configure and use this driver in a selection of
mbed_official 15:a81a8d6c1dfe 1342 * use cases. Note that QSGs can be compiled as a standalone application or be
mbed_official 15:a81a8d6c1dfe 1343 * added to the user application.
mbed_official 15:a81a8d6c1dfe 1344 *
mbed_official 15:a81a8d6c1dfe 1345 * - \subpage asfdoc_sam0_sercom_usart_basic_use_case
mbed_official 15:a81a8d6c1dfe 1346 * \if USART_CALLBACK_MODE
mbed_official 15:a81a8d6c1dfe 1347 * - \subpage asfdoc_sam0_sercom_usart_callback_use_case
mbed_official 15:a81a8d6c1dfe 1348 * \endif
mbed_official 15:a81a8d6c1dfe 1349 * - \subpage asfdoc_sam0_sercom_usart_dma_use_case
mbed_official 15:a81a8d6c1dfe 1350 * - \subpage asfdoc_sam0_sercom_usart_lin_use_case
mbed_official 15:a81a8d6c1dfe 1351 */
mbed_official 15:a81a8d6c1dfe 1352
mbed_official 15:a81a8d6c1dfe 1353 /**
mbed_official 15:a81a8d6c1dfe 1354 * \page asfdoc_sam0_sercom_usart_mux_settings SERCOM USART MUX Settings
mbed_official 15:a81a8d6c1dfe 1355 *
mbed_official 15:a81a8d6c1dfe 1356 * The following lists the possible internal SERCOM module pad function
mbed_official 15:a81a8d6c1dfe 1357 * assignments, for the four SERCOM pads when in USART mode. Note that this is
mbed_official 15:a81a8d6c1dfe 1358 * in addition to the physical GPIO pin MUX of the device, and can be used in
mbed_official 15:a81a8d6c1dfe 1359 * conjunction to optimize the serial data pin-out.
mbed_official 15:a81a8d6c1dfe 1360 *
mbed_official 15:a81a8d6c1dfe 1361 * When TX and RX are connected to the same pin, the USART will operate in
mbed_official 15:a81a8d6c1dfe 1362 * half-duplex mode if both the transmitter and receivers are enabled.
mbed_official 15:a81a8d6c1dfe 1363 *
mbed_official 15:a81a8d6c1dfe 1364 * \note When RX and XCK are connected to the same pin, the receiver must not
mbed_official 15:a81a8d6c1dfe 1365 * be enabled if the USART is configured to use an external clock.
mbed_official 15:a81a8d6c1dfe 1366 *
mbed_official 15:a81a8d6c1dfe 1367 *
mbed_official 15:a81a8d6c1dfe 1368 * <table>
mbed_official 15:a81a8d6c1dfe 1369 * <tr>
mbed_official 15:a81a8d6c1dfe 1370 * <th>MUX/Pad</th>
mbed_official 15:a81a8d6c1dfe 1371 * <th>PAD 0</th>
mbed_official 15:a81a8d6c1dfe 1372 * <th>PAD 1</th>
mbed_official 15:a81a8d6c1dfe 1373 * <th>PAD 2</th>
mbed_official 15:a81a8d6c1dfe 1374 * <th>PAD 3</th>
mbed_official 15:a81a8d6c1dfe 1375 * </tr>
mbed_official 15:a81a8d6c1dfe 1376 * <tr>
mbed_official 15:a81a8d6c1dfe 1377 * <td>RX_0_TX_0_XCK_1</td>
mbed_official 15:a81a8d6c1dfe 1378 * <td>TX / RX</td>
mbed_official 15:a81a8d6c1dfe 1379 * <td>XCK</td>
mbed_official 15:a81a8d6c1dfe 1380 * <td>-</td>
mbed_official 15:a81a8d6c1dfe 1381 * <td>-</td>
mbed_official 15:a81a8d6c1dfe 1382 * </tr>
mbed_official 15:a81a8d6c1dfe 1383 * <tr>
mbed_official 15:a81a8d6c1dfe 1384 * <td>RX_0_TX_2_XCK_3</td>
mbed_official 15:a81a8d6c1dfe 1385 * <td>RX</td>
mbed_official 15:a81a8d6c1dfe 1386 * <td>-</td>
mbed_official 15:a81a8d6c1dfe 1387 * <td>TX</td>
mbed_official 15:a81a8d6c1dfe 1388 * <td>XCK</td>
mbed_official 15:a81a8d6c1dfe 1389 * </tr>
mbed_official 15:a81a8d6c1dfe 1390 * <tr>
mbed_official 15:a81a8d6c1dfe 1391 * <td>RX_1_TX_0_XCK_1</td>
mbed_official 15:a81a8d6c1dfe 1392 * <td>TX</td>
mbed_official 15:a81a8d6c1dfe 1393 * <td>RX / XCK</td>
mbed_official 15:a81a8d6c1dfe 1394 * <td>-</td>
mbed_official 15:a81a8d6c1dfe 1395 * <td>-</td>
mbed_official 15:a81a8d6c1dfe 1396 * </tr>
mbed_official 15:a81a8d6c1dfe 1397 * <tr>
mbed_official 15:a81a8d6c1dfe 1398 * <td>RX_1_TX_2_XCK_3</td>
mbed_official 15:a81a8d6c1dfe 1399 * <td>-</td>
mbed_official 15:a81a8d6c1dfe 1400 * <td>RX</td>
mbed_official 15:a81a8d6c1dfe 1401 * <td>TX</td>
mbed_official 15:a81a8d6c1dfe 1402 * <td>XCK</td>
mbed_official 15:a81a8d6c1dfe 1403 * </tr>
mbed_official 15:a81a8d6c1dfe 1404 * <tr>
mbed_official 15:a81a8d6c1dfe 1405 * <td>RX_2_TX_0_XCK_1</td>
mbed_official 15:a81a8d6c1dfe 1406 * <td>TX</td>
mbed_official 15:a81a8d6c1dfe 1407 * <td>XCK</td>
mbed_official 15:a81a8d6c1dfe 1408 * <td>RX</td>
mbed_official 15:a81a8d6c1dfe 1409 * <td>-</td>
mbed_official 15:a81a8d6c1dfe 1410 * </tr>
mbed_official 15:a81a8d6c1dfe 1411 * <tr>
mbed_official 15:a81a8d6c1dfe 1412 * <td>RX_2_TX_2_XCK_3</td>
mbed_official 15:a81a8d6c1dfe 1413 * <td>-</td>
mbed_official 15:a81a8d6c1dfe 1414 * <td>-</td>
mbed_official 15:a81a8d6c1dfe 1415 * <td>TX / RX</td>
mbed_official 15:a81a8d6c1dfe 1416 * <td>XCK</td>
mbed_official 15:a81a8d6c1dfe 1417 * </tr>
mbed_official 15:a81a8d6c1dfe 1418 * <tr>
mbed_official 15:a81a8d6c1dfe 1419 * <td>RX_3_TX_0_XCK_1</td>
mbed_official 15:a81a8d6c1dfe 1420 * <td>TX</td>
mbed_official 15:a81a8d6c1dfe 1421 * <td>XCK</td>
mbed_official 15:a81a8d6c1dfe 1422 * <td>-</td>
mbed_official 15:a81a8d6c1dfe 1423 * <td>RX</td>
mbed_official 15:a81a8d6c1dfe 1424 * </tr>
mbed_official 15:a81a8d6c1dfe 1425 * <tr>
mbed_official 15:a81a8d6c1dfe 1426 * <td>RX_3_TX_2_XCK_3</td>
mbed_official 15:a81a8d6c1dfe 1427 * <td>-</td>
mbed_official 15:a81a8d6c1dfe 1428 * <td>-</td>
mbed_official 15:a81a8d6c1dfe 1429 * <td>TX</td>
mbed_official 15:a81a8d6c1dfe 1430 * <td>RX / XCK</td>
mbed_official 15:a81a8d6c1dfe 1431 * </tr>
mbed_official 15:a81a8d6c1dfe 1432 * </table>
mbed_official 15:a81a8d6c1dfe 1433 *
mbed_official 15:a81a8d6c1dfe 1434 * \page asfdoc_sam0_sercom_usart_document_revision_history Document Revision History
mbed_official 15:a81a8d6c1dfe 1435 *
mbed_official 15:a81a8d6c1dfe 1436 * <table>
mbed_official 15:a81a8d6c1dfe 1437 * <tr>
mbed_official 15:a81a8d6c1dfe 1438 * <th>Doc. Rev.</td>
mbed_official 15:a81a8d6c1dfe 1439 * <th>Date</td>
mbed_official 15:a81a8d6c1dfe 1440 * <th>Comments</td>
mbed_official 15:a81a8d6c1dfe 1441 * </tr>
mbed_official 15:a81a8d6c1dfe 1442 * <tr>
mbed_official 15:a81a8d6c1dfe 1443 * <td>42118F</td>
mbed_official 15:a81a8d6c1dfe 1444 * <td>06/2015</td>
mbed_official 15:a81a8d6c1dfe 1445 * <td>Add support for SAML21, SAMDAx, and SAMC20/C21.</td>
mbed_official 15:a81a8d6c1dfe 1446 * </tr>
mbed_official 15:a81a8d6c1dfe 1447 * <tr>
mbed_official 15:a81a8d6c1dfe 1448 * <td>42118E</td>
mbed_official 15:a81a8d6c1dfe 1449 * <td>12/2014</td>
mbed_official 15:a81a8d6c1dfe 1450 * <td>Add support for SAMR21 and SAMD10/D11.</td>
mbed_official 15:a81a8d6c1dfe 1451 * </tr>
mbed_official 15:a81a8d6c1dfe 1452 * <tr>
mbed_official 15:a81a8d6c1dfe 1453 * <td>42118D</td>
mbed_official 15:a81a8d6c1dfe 1454 * <td>01/2014</td>
mbed_official 15:a81a8d6c1dfe 1455 * <td>Add support for SAMD21.</td>
mbed_official 15:a81a8d6c1dfe 1456 * </tr>
mbed_official 15:a81a8d6c1dfe 1457 * <tr>
mbed_official 15:a81a8d6c1dfe 1458 * <td>42118C</td>
mbed_official 15:a81a8d6c1dfe 1459 * <td>10/2013</td>
mbed_official 15:a81a8d6c1dfe 1460 * <td>Replaced the pad multiplexing documentation with a condensed table.</td>
mbed_official 15:a81a8d6c1dfe 1461 * </tr>
mbed_official 15:a81a8d6c1dfe 1462 * <tr>
mbed_official 15:a81a8d6c1dfe 1463 * <td>42118B</td>
mbed_official 15:a81a8d6c1dfe 1464 * <td>06/2013</td>
mbed_official 15:a81a8d6c1dfe 1465 * <td>Corrected documentation typos.</td>
mbed_official 15:a81a8d6c1dfe 1466 * </tr>
mbed_official 15:a81a8d6c1dfe 1467 * <tr>
mbed_official 15:a81a8d6c1dfe 1468 * <td>42118A</td>
mbed_official 15:a81a8d6c1dfe 1469 * <td>06/2013</td>
mbed_official 15:a81a8d6c1dfe 1470 * <td>Initial release</td>
mbed_official 15:a81a8d6c1dfe 1471 * </tr>
mbed_official 15:a81a8d6c1dfe 1472 * </table>
mbed_official 15:a81a8d6c1dfe 1473 */
mbed_official 15:a81a8d6c1dfe 1474 #endif /* USART_H_INCLUDED */