7-Segment Display Driver class, via an 8-bit shift register (such as the 74HC595)

Dependents:   000-FIN_youcef

Fork of 7SegSRDriver by Paul Law

Committer:
sefyou
Date:
Tue Jun 06 13:28:42 2017 +0000
Revision:
2:c3d7b44e116f
Parent:
1:e55f543bc06b
yo

Who changed what in which revision?

UserRevisionLine numberNew contents of line
paul80nd 0:1832d0ed8da8 1 #ifndef LIB_SSEGSRDRIVER_H
paul80nd 0:1832d0ed8da8 2 #define LIB_SSEGSRDRIVER_H
paul80nd 0:1832d0ed8da8 3
paul80nd 0:1832d0ed8da8 4 #include "mbed.h"
paul80nd 0:1832d0ed8da8 5
paul80nd 0:1832d0ed8da8 6 #define SSegSRDriver_COMN_ANODE 0
paul80nd 0:1832d0ed8da8 7 #define SSegSRDriver_COMN_CATHODE 1
paul80nd 0:1832d0ed8da8 8
sefyou 2:c3d7b44e116f 9 const unsigned char nbr_envoye[11] = {0x3f, 0x30 , 0x6d, 0x79, 0x72, 0x5b, 0x5f, 0x33, 0x7f, 0x7b, 0x00};
sefyou 2:c3d7b44e116f 10 const unsigned char nbr_envoye_2[11] = {0x3f, 0x30 , 0x6d, 0x79, 0x72, 0x5b, 0x5f, 0x33, 0x7f, 0x7b, 0x00};
sefyou 2:c3d7b44e116f 11 const unsigned char nbr_envoye_3[11] = {0x3f, 0x30 , 0x6d, 0x79, 0x72, 0x5b, 0x5f, 0x33, 0x7f, 0x7b, 0x00};
sefyou 2:c3d7b44e116f 12 const unsigned char nbr_envoye_4[11] = {0x3f, 0x30 , 0x6d, 0x79, 0x72, 0x5b, 0x5f, 0x33, 0x7f, 0x7b, 0x00};
paul80nd 0:1832d0ed8da8 13
sefyou 2:c3d7b44e116f 14
sefyou 2:c3d7b44e116f 15 /************************************************** CHRONOMETRE ****************************************************/
sefyou 2:c3d7b44e116f 16
sefyou 2:c3d7b44e116f 17
sefyou 2:c3d7b44e116f 18 class SSegSRDriver_chronometre {
paul80nd 0:1832d0ed8da8 19
paul80nd 0:1832d0ed8da8 20 public:
paul80nd 0:1832d0ed8da8 21
sefyou 2:c3d7b44e116f 22 SSegSRDriver_chronometre(PinName srData, PinName srClock, PinName srLatch, bool disp_type);
sefyou 2:c3d7b44e116f 23 void write_chronometre(unsigned char number, bool dp);
sefyou 2:c3d7b44e116f 24 void write_chronometre_2(unsigned char number_deux, bool dp); //
sefyou 2:c3d7b44e116f 25 void write_chronometre_3(unsigned char number_trois, bool dp);
sefyou 2:c3d7b44e116f 26 void write_chronometre_4(unsigned char number_quatre, bool dp);
sefyou 2:c3d7b44e116f 27
sefyou 2:c3d7b44e116f 28 void bus_chronometre_1(unsigned char number); // inustruction pour le bus 1 de 0 a 8 bit
sefyou 2:c3d7b44e116f 29 void bus_chronometre_2(unsigned char number_deux); // inustruction pour le bus 2 de 0 a 8 bit
sefyou 2:c3d7b44e116f 30 void bus_chronometre_3(unsigned char number_trois);
sefyou 2:c3d7b44e116f 31 void bus_chronometre_4(unsigned char number_quatre);
sefyou 2:c3d7b44e116f 32 void clear();
paul80nd 0:1832d0ed8da8 33
sefyou 2:c3d7b44e116f 34 private:
sefyou 2:c3d7b44e116f 35
sefyou 2:c3d7b44e116f 36 DigitalOut _srData;
sefyou 2:c3d7b44e116f 37 DigitalOut _srClock;
sefyou 2:c3d7b44e116f 38 DigitalOut _srLatch;
sefyou 2:c3d7b44e116f 39 bool _disp_type;
sefyou 2:c3d7b44e116f 40 };
sefyou 2:c3d7b44e116f 41
sefyou 2:c3d7b44e116f 42
sefyou 2:c3d7b44e116f 43 /************************************************** DOMICILE ****************************************************/
sefyou 2:c3d7b44e116f 44
sefyou 2:c3d7b44e116f 45
sefyou 2:c3d7b44e116f 46 class SSegSRDriver_domicile {
sefyou 2:c3d7b44e116f 47
sefyou 2:c3d7b44e116f 48 public:
sefyou 2:c3d7b44e116f 49
sefyou 2:c3d7b44e116f 50 SSegSRDriver_domicile(PinName srData, PinName srClock, PinName srLatch, bool disp_type);
sefyou 2:c3d7b44e116f 51
sefyou 2:c3d7b44e116f 52 void set_type(bool disp_type);
sefyou 2:c3d7b44e116f 53 void write_domicile(unsigned char number, bool dp);
sefyou 2:c3d7b44e116f 54 void write_domicile_2(unsigned char number_deux, bool dp);
sefyou 2:c3d7b44e116f 55 void write_domicile_3(unsigned char number_trois, bool dp);
sefyou 2:c3d7b44e116f 56
sefyou 2:c3d7b44e116f 57 void bus_domicile_1(unsigned char number); // inustruction pour le bus 1 de 0 a 8 bit
sefyou 2:c3d7b44e116f 58 void bus_domicile_2(unsigned char number_deux); // inustruction pour le bus 2 de 0 a 8 bit
sefyou 2:c3d7b44e116f 59 void bus_domicile_3(unsigned char number_trois);
sefyou 2:c3d7b44e116f 60 void clear();
paul80nd 0:1832d0ed8da8 61
sefyou 2:c3d7b44e116f 62 private:
sefyou 2:c3d7b44e116f 63
sefyou 2:c3d7b44e116f 64 DigitalOut _srData;
sefyou 2:c3d7b44e116f 65 DigitalOut _srClock;
sefyou 2:c3d7b44e116f 66 DigitalOut _srLatch;
sefyou 2:c3d7b44e116f 67 bool _disp_type;
sefyou 2:c3d7b44e116f 68 };
sefyou 2:c3d7b44e116f 69
sefyou 2:c3d7b44e116f 70
sefyou 2:c3d7b44e116f 71 /************************************************** VISITEUR ****************************************************/
sefyou 2:c3d7b44e116f 72
sefyou 2:c3d7b44e116f 73
sefyou 2:c3d7b44e116f 74 class SSegSRDriver_visiteur {
sefyou 2:c3d7b44e116f 75
sefyou 2:c3d7b44e116f 76 public:
sefyou 2:c3d7b44e116f 77
sefyou 2:c3d7b44e116f 78 SSegSRDriver_visiteur(PinName srData, PinName srClock, PinName srLatch, bool disp_type);
sefyou 2:c3d7b44e116f 79
sefyou 2:c3d7b44e116f 80 void set_type(bool disp_type);
sefyou 2:c3d7b44e116f 81 void write_visiteur(unsigned char number, bool dp);
sefyou 2:c3d7b44e116f 82 void write_visiteur_2(unsigned char number_deux, bool dp);
sefyou 2:c3d7b44e116f 83 void write_visiteur_3(unsigned char number_trois, bool dp);
paul80nd 0:1832d0ed8da8 84
sefyou 2:c3d7b44e116f 85 void bus_visiteur_1(unsigned char number); // inustruction pour le bus 1 de 0 a 8 bit
sefyou 2:c3d7b44e116f 86 void bus_visiteur_2(unsigned char number_deux); // inustruction pour le bus 2 de 0 a 8 bit
sefyou 2:c3d7b44e116f 87 void bus_visiteur_3(unsigned char number_trois);
sefyou 2:c3d7b44e116f 88 void clear();
paul80nd 0:1832d0ed8da8 89
paul80nd 0:1832d0ed8da8 90 private:
paul80nd 0:1832d0ed8da8 91
paul80nd 0:1832d0ed8da8 92 DigitalOut _srData;
paul80nd 0:1832d0ed8da8 93 DigitalOut _srClock;
paul80nd 0:1832d0ed8da8 94 DigitalOut _srLatch;
paul80nd 0:1832d0ed8da8 95 bool _disp_type;
paul80nd 0:1832d0ed8da8 96 };
paul80nd 0:1832d0ed8da8 97
paul80nd 0:1832d0ed8da8 98 #endif