PM2_Lib
Dependencies: LSM9DS1 RangeFinder FastPWM
EncoderCounter.cpp@23:1926540ebbec, 2022-03-23 (annotated)
- Committer:
- pmic
- Date:
- Wed Mar 23 09:46:07 2022 +0000
- Revision:
- 23:1926540ebbec
- Parent:
- 4:9c003c402033
Renamed ReEnalbe function to Enable in Servo class
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
pmic | 0:86129f1b4a93 | 1 | /* |
pmic | 0:86129f1b4a93 | 2 | * EncoderCounter.cpp |
pmic | 0:86129f1b4a93 | 3 | * Copyright (c) 2018, ZHAW |
pmic | 0:86129f1b4a93 | 4 | * All rights reserved. |
pmic | 0:86129f1b4a93 | 5 | */ |
pmic | 0:86129f1b4a93 | 6 | |
pmic | 0:86129f1b4a93 | 7 | #include "EncoderCounter.h" |
pmic | 0:86129f1b4a93 | 8 | |
pmic | 0:86129f1b4a93 | 9 | using namespace std; |
pmic | 0:86129f1b4a93 | 10 | |
pmic | 0:86129f1b4a93 | 11 | /** |
pmic | 0:86129f1b4a93 | 12 | * Creates and initializes the driver to read the quadrature |
pmic | 0:86129f1b4a93 | 13 | * encoder counter of the STM32 microcontroller. |
pmic | 0:86129f1b4a93 | 14 | * @param a the input pin for the channel A. |
pmic | 0:86129f1b4a93 | 15 | * @param b the input pin for the channel B. |
pmic | 0:86129f1b4a93 | 16 | */ |
pmic | 4:9c003c402033 | 17 | EncoderCounter::EncoderCounter(PinName a, PinName b) |
pmic | 4:9c003c402033 | 18 | { |
pmic | 0:86129f1b4a93 | 19 | // check pins |
pmic | 4:9c003c402033 | 20 | |
pmic | 0:86129f1b4a93 | 21 | if ((a == PA_0) && (b == PA_1)) { |
pmic | 4:9c003c402033 | 22 | |
pmic | 0:86129f1b4a93 | 23 | // pinmap OK for TIM2 CH1 and CH2 |
pmic | 4:9c003c402033 | 24 | |
pmic | 0:86129f1b4a93 | 25 | TIM = TIM2; |
pmic | 4:9c003c402033 | 26 | |
pmic | 0:86129f1b4a93 | 27 | // configure general purpose I/O registers |
pmic | 4:9c003c402033 | 28 | |
pmic | 0:86129f1b4a93 | 29 | GPIOA->MODER &= ~GPIO_MODER_MODER0; // reset port A0 |
pmic | 0:86129f1b4a93 | 30 | GPIOA->MODER |= GPIO_MODER_MODER0_1; // set alternate mode of port A0 |
pmic | 0:86129f1b4a93 | 31 | GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR0; // reset pull-up/pull-down on port A0 |
pmic | 0:86129f1b4a93 | 32 | GPIOA->PUPDR |= GPIO_PUPDR_PUPDR0_1; // set input as pull-down |
pmic | 0:86129f1b4a93 | 33 | GPIOA->AFR[0] &= ~(0xF << 4*0); // reset alternate function of port A0 |
pmic | 0:86129f1b4a93 | 34 | GPIOA->AFR[0] |= 1 << 4*0; // set alternate funtion 1 of port A0 |
pmic | 4:9c003c402033 | 35 | |
pmic | 0:86129f1b4a93 | 36 | GPIOA->MODER &= ~GPIO_MODER_MODER1; // reset port A1 |
pmic | 0:86129f1b4a93 | 37 | GPIOA->MODER |= GPIO_MODER_MODER1_1; // set alternate mode of port A1 |
pmic | 0:86129f1b4a93 | 38 | GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR1; // reset pull-up/pull-down on port A1 |
pmic | 0:86129f1b4a93 | 39 | GPIOA->PUPDR |= GPIO_PUPDR_PUPDR1_1; // set input as pull-down |
pmic | 0:86129f1b4a93 | 40 | GPIOA->AFR[0] &= ~(0xF << 4*1); // reset alternate function of port A1 |
pmic | 0:86129f1b4a93 | 41 | GPIOA->AFR[0] |= 1 << 4*1; // set alternate funtion 1 of port A1 |
pmic | 4:9c003c402033 | 42 | |
pmic | 0:86129f1b4a93 | 43 | // configure reset and clock control registers |
pmic | 4:9c003c402033 | 44 | |
pmic | 0:86129f1b4a93 | 45 | RCC->APB1RSTR |= RCC_APB1RSTR_TIM2RST; //reset TIM2 controller |
pmic | 0:86129f1b4a93 | 46 | RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM2RST; |
pmic | 4:9c003c402033 | 47 | |
pmic | 0:86129f1b4a93 | 48 | RCC->APB1ENR |= RCC_APB1ENR_TIM2EN; // TIM2 clock enable |
pmic | 4:9c003c402033 | 49 | |
pmic | 0:86129f1b4a93 | 50 | } else if ((a == PA_6) && (b == PC_7)) { |
pmic | 4:9c003c402033 | 51 | |
pmic | 0:86129f1b4a93 | 52 | // pinmap OK for TIM3 CH1 and CH2 |
pmic | 4:9c003c402033 | 53 | |
pmic | 0:86129f1b4a93 | 54 | TIM = TIM3; |
pmic | 4:9c003c402033 | 55 | |
pmic | 0:86129f1b4a93 | 56 | // configure reset and clock control registers |
pmic | 4:9c003c402033 | 57 | |
pmic | 0:86129f1b4a93 | 58 | RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; // manually enable port C (port A enabled by mbed library) |
pmic | 4:9c003c402033 | 59 | |
pmic | 0:86129f1b4a93 | 60 | // configure general purpose I/O registers |
pmic | 4:9c003c402033 | 61 | |
pmic | 0:86129f1b4a93 | 62 | GPIOA->MODER &= ~GPIO_MODER_MODER6; // reset port A6 |
pmic | 0:86129f1b4a93 | 63 | GPIOA->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port A6 |
pmic | 0:86129f1b4a93 | 64 | GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port A6 |
pmic | 0:86129f1b4a93 | 65 | GPIOA->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down |
pmic | 0:86129f1b4a93 | 66 | GPIOA->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port A6 |
pmic | 0:86129f1b4a93 | 67 | GPIOA->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port A6 |
pmic | 4:9c003c402033 | 68 | |
pmic | 0:86129f1b4a93 | 69 | GPIOC->MODER &= ~GPIO_MODER_MODER7; // reset port C7 |
pmic | 0:86129f1b4a93 | 70 | GPIOC->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port C7 |
pmic | 0:86129f1b4a93 | 71 | GPIOC->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port C7 |
pmic | 0:86129f1b4a93 | 72 | GPIOC->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down |
pmic | 0:86129f1b4a93 | 73 | GPIOC->AFR[0] &= ~0xF0000000; // reset alternate function of port C7 |
pmic | 0:86129f1b4a93 | 74 | GPIOC->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port C7 |
pmic | 4:9c003c402033 | 75 | |
pmic | 0:86129f1b4a93 | 76 | // configure reset and clock control registers |
pmic | 4:9c003c402033 | 77 | |
pmic | 0:86129f1b4a93 | 78 | RCC->APB1RSTR |= RCC_APB1RSTR_TIM3RST; //reset TIM3 controller |
pmic | 0:86129f1b4a93 | 79 | RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM3RST; |
pmic | 4:9c003c402033 | 80 | |
pmic | 0:86129f1b4a93 | 81 | RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; // TIM3 clock enable |
pmic | 4:9c003c402033 | 82 | |
pmic | 0:86129f1b4a93 | 83 | } else if ((a == PB_6) && (b == PB_7)) { |
pmic | 4:9c003c402033 | 84 | |
pmic | 0:86129f1b4a93 | 85 | // pinmap OK for TIM4 CH1 and CH2 |
pmic | 4:9c003c402033 | 86 | |
pmic | 0:86129f1b4a93 | 87 | TIM = TIM4; |
pmic | 4:9c003c402033 | 88 | |
pmic | 0:86129f1b4a93 | 89 | // configure reset and clock control registers |
pmic | 4:9c003c402033 | 90 | |
pmic | 0:86129f1b4a93 | 91 | RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; // manually enable port B (port A enabled by mbed library) |
pmic | 4:9c003c402033 | 92 | |
pmic | 0:86129f1b4a93 | 93 | // configure general purpose I/O registers |
pmic | 4:9c003c402033 | 94 | |
pmic | 0:86129f1b4a93 | 95 | GPIOB->MODER &= ~GPIO_MODER_MODER6; // reset port B6 |
pmic | 0:86129f1b4a93 | 96 | GPIOB->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port B6 |
pmic | 0:86129f1b4a93 | 97 | GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port B6 |
pmic | 0:86129f1b4a93 | 98 | GPIOB->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down |
pmic | 0:86129f1b4a93 | 99 | GPIOB->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port B6 |
pmic | 0:86129f1b4a93 | 100 | GPIOB->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port B6 |
pmic | 4:9c003c402033 | 101 | |
pmic | 0:86129f1b4a93 | 102 | GPIOB->MODER &= ~GPIO_MODER_MODER7; // reset port B7 |
pmic | 0:86129f1b4a93 | 103 | GPIOB->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port B7 |
pmic | 0:86129f1b4a93 | 104 | GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port B7 |
pmic | 0:86129f1b4a93 | 105 | GPIOB->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down |
pmic | 0:86129f1b4a93 | 106 | GPIOB->AFR[0] &= ~0xF0000000; // reset alternate function of port B7 |
pmic | 0:86129f1b4a93 | 107 | GPIOB->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port B7 |
pmic | 4:9c003c402033 | 108 | |
pmic | 0:86129f1b4a93 | 109 | // configure reset and clock control registers |
pmic | 4:9c003c402033 | 110 | |
pmic | 0:86129f1b4a93 | 111 | RCC->APB1RSTR |= RCC_APB1RSTR_TIM4RST; //reset TIM4 controller |
pmic | 0:86129f1b4a93 | 112 | RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM4RST; |
pmic | 4:9c003c402033 | 113 | |
pmic | 0:86129f1b4a93 | 114 | RCC->APB1ENR |= RCC_APB1ENR_TIM4EN; // TIM4 clock enable |
pmic | 4:9c003c402033 | 115 | |
pmic | 0:86129f1b4a93 | 116 | } else { |
pmic | 4:9c003c402033 | 117 | |
pmic | 0:86129f1b4a93 | 118 | printf("pinmap not found for peripheral\n"); |
pmic | 0:86129f1b4a93 | 119 | } |
pmic | 4:9c003c402033 | 120 | |
pmic | 0:86129f1b4a93 | 121 | // configure general purpose timer 3 or 4 |
pmic | 4:9c003c402033 | 122 | |
pmic | 0:86129f1b4a93 | 123 | TIM->CR1 = 0x0000; // counter disable |
pmic | 0:86129f1b4a93 | 124 | TIM->CR2 = 0x0000; // reset master mode selection |
pmic | 0:86129f1b4a93 | 125 | TIM->SMCR = TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0; // counting on both TI1 & TI2 edges |
pmic | 0:86129f1b4a93 | 126 | TIM->CCMR1 = TIM_CCMR1_CC2S_0 | TIM_CCMR1_CC1S_0; |
pmic | 0:86129f1b4a93 | 127 | TIM->CCMR2 = 0x0000; // reset capture mode register 2 |
pmic | 0:86129f1b4a93 | 128 | TIM->CCER = TIM_CCER_CC2E | TIM_CCER_CC1E; |
pmic | 0:86129f1b4a93 | 129 | TIM->CNT = 0x0000; // reset counter value |
pmic | 0:86129f1b4a93 | 130 | TIM->ARR = 0xFFFF; // auto reload register |
pmic | 0:86129f1b4a93 | 131 | TIM->CR1 = TIM_CR1_CEN; // counter enable |
pmic | 0:86129f1b4a93 | 132 | } |
pmic | 0:86129f1b4a93 | 133 | |
pmic | 0:86129f1b4a93 | 134 | EncoderCounter::~EncoderCounter() {} |
pmic | 0:86129f1b4a93 | 135 | |
pmic | 0:86129f1b4a93 | 136 | /** |
pmic | 0:86129f1b4a93 | 137 | * Resets the counter value to zero. |
pmic | 0:86129f1b4a93 | 138 | */ |
pmic | 4:9c003c402033 | 139 | void EncoderCounter::reset() |
pmic | 4:9c003c402033 | 140 | { |
pmic | 0:86129f1b4a93 | 141 | TIM->CNT = 0x0000; |
pmic | 0:86129f1b4a93 | 142 | } |
pmic | 0:86129f1b4a93 | 143 | |
pmic | 0:86129f1b4a93 | 144 | /** |
pmic | 0:86129f1b4a93 | 145 | * Resets the counter value to a given offset value. |
pmic | 0:86129f1b4a93 | 146 | * @param offset the offset value to reset the counter to. |
pmic | 0:86129f1b4a93 | 147 | */ |
pmic | 4:9c003c402033 | 148 | void EncoderCounter::reset(int16_t offset) |
pmic | 4:9c003c402033 | 149 | { |
pmic | 0:86129f1b4a93 | 150 | TIM->CNT = -offset; |
pmic | 0:86129f1b4a93 | 151 | } |
pmic | 0:86129f1b4a93 | 152 | |
pmic | 0:86129f1b4a93 | 153 | /** |
pmic | 0:86129f1b4a93 | 154 | * Reads the quadrature encoder counter value. |
pmic | 0:86129f1b4a93 | 155 | * @return the quadrature encoder counter as a signed 16-bit integer value. |
pmic | 0:86129f1b4a93 | 156 | */ |
pmic | 4:9c003c402033 | 157 | int16_t EncoderCounter::read() |
pmic | 4:9c003c402033 | 158 | { |
pmic | 0:86129f1b4a93 | 159 | return static_cast<int16_t>(-TIM->CNT); |
pmic | 0:86129f1b4a93 | 160 | } |
pmic | 0:86129f1b4a93 | 161 | |
pmic | 0:86129f1b4a93 | 162 | /** |
pmic | 0:86129f1b4a93 | 163 | * The empty operator is a shorthand notation of the <code>read()</code> method. |
pmic | 0:86129f1b4a93 | 164 | */ |
pmic | 4:9c003c402033 | 165 | EncoderCounter::operator int16_t() |
pmic | 4:9c003c402033 | 166 | { |
pmic | 0:86129f1b4a93 | 167 | return read(); |
pmic | 0:86129f1b4a93 | 168 | } |
pmic | 0:86129f1b4a93 | 169 | |
pmic | 0:86129f1b4a93 | 170 | |
pmic | 0:86129f1b4a93 | 171 |