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DWT_Type Struct Reference

DWT_Type Struct Reference
[Data Watchpoint and Trace (DWT)]

Structure type to access the Data Watchpoint and Trace Register (DWT). More...

#include <core_cm3.h>

Data Fields

__IO uint32_t CTRL
__IO uint32_t CYCCNT
__IO uint32_t CPICNT
__IO uint32_t EXCCNT
__IO uint32_t SLEEPCNT
__IO uint32_t LSUCNT
__IO uint32_t FOLDCNT
__I uint32_t PCSR
__IO uint32_t COMP0
__IO uint32_t MASK0
__IO uint32_t FUNCTION0
__IO uint32_t COMP1
__IO uint32_t MASK1
__IO uint32_t FUNCTION1
__IO uint32_t COMP2
__IO uint32_t MASK2
__IO uint32_t FUNCTION2
__IO uint32_t COMP3
__IO uint32_t MASK3
__IO uint32_t FUNCTION3

Detailed Description

Structure type to access the Data Watchpoint and Trace Register (DWT).

Definition at line 682 of file core_cm3.h.


Field Documentation

__IO uint32_t COMP0

Offset: 0x020 (R/W) Comparator Register 0

Definition at line 692 of file core_cm3.h.

__IO uint32_t COMP1

Offset: 0x030 (R/W) Comparator Register 1

Definition at line 696 of file core_cm3.h.

__IO uint32_t COMP2

Offset: 0x040 (R/W) Comparator Register 2

Definition at line 700 of file core_cm3.h.

__IO uint32_t COMP3

Offset: 0x050 (R/W) Comparator Register 3

Definition at line 704 of file core_cm3.h.

__IO uint32_t CPICNT

Offset: 0x008 (R/W) CPI Count Register

Definition at line 686 of file core_cm3.h.

__IO uint32_t CTRL

Offset: 0x000 (R/W) Control Register

Definition at line 684 of file core_cm3.h.

__IO uint32_t CYCCNT

Offset: 0x004 (R/W) Cycle Count Register

Definition at line 685 of file core_cm3.h.

__IO uint32_t EXCCNT

Offset: 0x00C (R/W) Exception Overhead Count Register

Definition at line 687 of file core_cm3.h.

__IO uint32_t FOLDCNT

Offset: 0x018 (R/W) Folded-instruction Count Register

Definition at line 690 of file core_cm3.h.

__IO uint32_t FUNCTION0

Offset: 0x028 (R/W) Function Register 0

Definition at line 694 of file core_cm3.h.

__IO uint32_t FUNCTION1

Offset: 0x038 (R/W) Function Register 1

Definition at line 698 of file core_cm3.h.

__IO uint32_t FUNCTION2

Offset: 0x048 (R/W) Function Register 2

Definition at line 702 of file core_cm3.h.

__IO uint32_t FUNCTION3

Offset: 0x058 (R/W) Function Register 3

Definition at line 706 of file core_cm3.h.

__IO uint32_t LSUCNT

Offset: 0x014 (R/W) LSU Count Register

Definition at line 689 of file core_cm3.h.

__IO uint32_t MASK0

Offset: 0x024 (R/W) Mask Register 0

Definition at line 693 of file core_cm3.h.

__IO uint32_t MASK1

Offset: 0x034 (R/W) Mask Register 1

Definition at line 697 of file core_cm3.h.

__IO uint32_t MASK2

Offset: 0x044 (R/W) Mask Register 2

Definition at line 701 of file core_cm3.h.

__IO uint32_t MASK3

Offset: 0x054 (R/W) Mask Register 3

Definition at line 705 of file core_cm3.h.

__I uint32_t PCSR

Offset: 0x01C (R/ ) Program Counter Sample Register

Definition at line 691 of file core_cm3.h.

__IO uint32_t SLEEPCNT

Offset: 0x010 (R/W) Sleep Count Register

Definition at line 688 of file core_cm3.h.