Modified so > maps to - sign
Dependents: ACC_LCD_341_Basic ESeif-SSD541-HW141 SBart_ACC_LCD_341_Basic ACC_LCD_341_Basic_Final_ALM
Fork of SLCD by
SLCD.cpp@0:d04758e76d5b, 2014-01-14 (annotated)
- Committer:
- Sissors
- Date:
- Tue Jan 14 07:00:15 2014 +0000
- Revision:
- 0:d04758e76d5b
- Child:
- 1:1579bcd31410
v0.01
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Sissors | 0:d04758e76d5b | 1 | #include "SLCD.h" |
Sissors | 0:d04758e76d5b | 2 | #include "LCD_config.h" |
Sissors | 0:d04758e76d5b | 3 | |
Sissors | 0:d04758e76d5b | 4 | |
Sissors | 0:d04758e76d5b | 5 | const uint8_t WF_ORDERING_TABLE[ ] = |
Sissors | 0:d04758e76d5b | 6 | { |
Sissors | 0:d04758e76d5b | 7 | CHAR1a, // LCD81 --- Pin:5 LCDnAddress=51 |
Sissors | 0:d04758e76d5b | 8 | CHAR1b, // LCD82 --- Pin:6 LCDnAddress=52 |
Sissors | 0:d04758e76d5b | 9 | CHAR2a, // LCD83 --- Pin:7 LCDnAddress=53 |
Sissors | 0:d04758e76d5b | 10 | CHAR2b, // LCD84 --- Pin:8 LCDnAddress=54 |
Sissors | 0:d04758e76d5b | 11 | CHAR3a, // LCD85 --- Pin:9 LCDnAddress=55 |
Sissors | 0:d04758e76d5b | 12 | CHAR3b, // LCD86 --- Pin:10 LCDnAddress=56 |
Sissors | 0:d04758e76d5b | 13 | CHAR4a, // LCD87 --- Pin:11 LCDnAddress=57 |
Sissors | 0:d04758e76d5b | 14 | CHAR4b, // LCD88 --- Pin:12 LCDnAddress=58 |
Sissors | 0:d04758e76d5b | 15 | CHARCOM0, // LCD77 --- Pin:1 LCDnAddress=4D |
Sissors | 0:d04758e76d5b | 16 | CHARCOM1, // LCD78 --- Pin:2 LCDnAddress=4E |
Sissors | 0:d04758e76d5b | 17 | CHARCOM2, // LCD79 --- Pin:3 LCDnAddress=4F |
Sissors | 0:d04758e76d5b | 18 | CHARCOM3, // LCD80 --- Pin:4 LCDnAddress=50 |
Sissors | 0:d04758e76d5b | 19 | }; |
Sissors | 0:d04758e76d5b | 20 | |
Sissors | 0:d04758e76d5b | 21 | const char ASCII_TO_WF_CODIFICATION_TABLE [ ] = |
Sissors | 0:d04758e76d5b | 22 | { |
Sissors | 0:d04758e76d5b | 23 | ( SEGD+ SEGE+ SEGF+!SEGG) , ( SEGC+ SEGB+ SEGA) ,//Char = 0, offset=0 |
Sissors | 0:d04758e76d5b | 24 | (!SEGD+!SEGE+!SEGF+!SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = 1, offset=4 |
Sissors | 0:d04758e76d5b | 25 | ( SEGD+ SEGE+!SEGF+ SEGG) , (!SEGC+ SEGB+ SEGA) ,//Char = 2, offset=8 |
Sissors | 0:d04758e76d5b | 26 | ( SEGD+!SEGE+!SEGF+ SEGG) , ( SEGC+ SEGB+ SEGA) ,//Char = 3, offset=12 |
Sissors | 0:d04758e76d5b | 27 | (!SEGD+!SEGE+ SEGF+ SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = 4, offset=16 |
Sissors | 0:d04758e76d5b | 28 | ( SEGD+!SEGE+ SEGF+ SEGG) , ( SEGC+!SEGB+ SEGA) ,//Char = 5, offset=20 |
Sissors | 0:d04758e76d5b | 29 | ( SEGD+ SEGE+ SEGF+ SEGG) , ( SEGC+!SEGB+ SEGA) ,//Char = 6, offset=24 |
Sissors | 0:d04758e76d5b | 30 | (!SEGD+!SEGE+!SEGF+!SEGG) , ( SEGC+ SEGB+ SEGA) ,//Char = 7, offset=28 |
Sissors | 0:d04758e76d5b | 31 | ( SEGD+ SEGE+ SEGF+ SEGG) , ( SEGC+ SEGB+ SEGA) ,//Char = 8, offset=32 |
Sissors | 0:d04758e76d5b | 32 | ( SEGD+!SEGE+ SEGF+ SEGG) , ( SEGC+ SEGB+ SEGA) ,//Char = 9, offset=36 |
Sissors | 0:d04758e76d5b | 33 | (!SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = :, offset=40 |
Sissors | 0:d04758e76d5b | 34 | (!SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = ;, offset=44 |
Sissors | 0:d04758e76d5b | 35 | (!SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = <, offset=48 |
Sissors | 0:d04758e76d5b | 36 | ( SEGD+!SEGE+!SEGF+ SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = =, offset=52 |
Sissors | 0:d04758e76d5b | 37 | (!SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = >, offset=56 |
Sissors | 0:d04758e76d5b | 38 | (!SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = ?, offset=60 |
Sissors | 0:d04758e76d5b | 39 | ( SEGD+ SEGE+ SEGF+ SEGG) , ( SEGC+ SEGB+ SEGA) ,//Char = @, offset=64 |
Sissors | 0:d04758e76d5b | 40 | (!SEGD+ SEGE+ SEGF+ SEGG) , ( SEGC+ SEGB+ SEGA) ,//Char = A, offset=68 |
Sissors | 0:d04758e76d5b | 41 | ( SEGD+ SEGE+ SEGF+ SEGG) , ( SEGC+!SEGB+!SEGA) ,//Char = B, offset=72 |
Sissors | 0:d04758e76d5b | 42 | ( SEGD+ SEGE+ SEGF+!SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = C, offset=76 |
Sissors | 0:d04758e76d5b | 43 | ( SEGD+ SEGE+!SEGF+ SEGG) , ( SEGC+ SEGB+ SEGA) ,//Char = D, offset=80 |
Sissors | 0:d04758e76d5b | 44 | ( SEGD+ SEGE+ SEGF+ SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = E, offset=84 |
Sissors | 0:d04758e76d5b | 45 | (!SEGD+ SEGE+ SEGF+ SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = F, offset=88 |
Sissors | 0:d04758e76d5b | 46 | ( SEGD+ SEGE+ SEGF+ SEGG) , ( SEGC+!SEGB+ SEGA) ,//Char = G, offset=92 |
Sissors | 0:d04758e76d5b | 47 | (!SEGD+ SEGE+ SEGF+ SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = H, offset=96 |
Sissors | 0:d04758e76d5b | 48 | (!SEGD+!SEGE+!SEGF+!SEGG) , ( SEGC+!SEGB+!SEGA) ,//Char = I, offset=100 |
Sissors | 0:d04758e76d5b | 49 | ( SEGD+ SEGE+!SEGF+!SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = J, offset=104 |
Sissors | 0:d04758e76d5b | 50 | (!SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = K, offset=108 |
Sissors | 0:d04758e76d5b | 51 | ( SEGD+ SEGE+ SEGF+!SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = L, offset=112 |
Sissors | 0:d04758e76d5b | 52 | (!SEGD+ SEGE+ SEGF+!SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = M, offset=116 |
Sissors | 0:d04758e76d5b | 53 | (!SEGD+ SEGE+!SEGF+ SEGG) , ( SEGC+!SEGB+!SEGA) ,//Char = N, offset=120 |
Sissors | 0:d04758e76d5b | 54 | ( SEGD+ SEGE+!SEGF+ SEGG) , ( SEGC+!SEGB+!SEGA) ,//Char = O, offset=124 |
Sissors | 0:d04758e76d5b | 55 | (!SEGD+ SEGE+ SEGF+ SEGG) , ( SEGC+ SEGB+ SEGA) ,//Char = P, offset=128 |
Sissors | 0:d04758e76d5b | 56 | ( SEGD+!SEGE+ SEGF+ SEGG) , ( SEGC+ SEGB+ SEGA) ,//Char = Q, offset=132 |
Sissors | 0:d04758e76d5b | 57 | (!SEGD+ SEGE+ SEGF+ SEGG) , (!SEGC+ SEGB+ SEGA) ,//Char = R, offset=136 |
Sissors | 0:d04758e76d5b | 58 | ( SEGD+!SEGE+ SEGF+ SEGG) , ( SEGC+!SEGB+ SEGA) ,//Char = S, offset=140 |
Sissors | 0:d04758e76d5b | 59 | ( SEGD+ SEGE+ SEGF+ SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = T, offset=144 |
Sissors | 0:d04758e76d5b | 60 | ( SEGD+ SEGE+ SEGF+!SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = U, offset=148 |
Sissors | 0:d04758e76d5b | 61 | (!SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = V, offset=152 |
Sissors | 0:d04758e76d5b | 62 | (!SEGD+ SEGE+ SEGF+!SEGG) , ( SEGC+ SEGB+!SEGA) ,//Char = W, offset=156 |
Sissors | 0:d04758e76d5b | 63 | (!SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = X, offset=160 |
Sissors | 0:d04758e76d5b | 64 | (!SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+!SEGA) ,//Char = Y, offset=164 |
Sissors | 0:d04758e76d5b | 65 | ( SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = Z, offset=168 |
Sissors | 0:d04758e76d5b | 66 | ( SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = [, offset=172 |
Sissors | 0:d04758e76d5b | 67 | ( SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = \, offset=176 |
Sissors | 0:d04758e76d5b | 68 | ( SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = ], offset=180 |
Sissors | 0:d04758e76d5b | 69 | ( SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = ^, offset=184 |
Sissors | 0:d04758e76d5b | 70 | ( SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = _, offset=188 |
Sissors | 0:d04758e76d5b | 71 | ( SEGD+!SEGE+!SEGF+!SEGG) , (!SEGC+!SEGB+ SEGA) ,//Char = `, offset=192 |
Sissors | 0:d04758e76d5b | 72 | }; |
Sissors | 0:d04758e76d5b | 73 | |
Sissors | 0:d04758e76d5b | 74 | SLCD::SLCD() { |
Sissors | 0:d04758e76d5b | 75 | init(); |
Sissors | 0:d04758e76d5b | 76 | bLCD_CharPosition = 0; |
Sissors | 0:d04758e76d5b | 77 | |
Sissors | 0:d04758e76d5b | 78 | } |
Sissors | 0:d04758e76d5b | 79 | |
Sissors | 0:d04758e76d5b | 80 | |
Sissors | 0:d04758e76d5b | 81 | void SLCD::init(){ |
Sissors | 0:d04758e76d5b | 82 | SIM->SCGC5 |= SIM_SCGC5_SLCD_MASK | SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK | SIM_SCGC5_PORTD_MASK | SIM_SCGC5_PORTE_MASK; |
Sissors | 0:d04758e76d5b | 83 | |
Sissors | 0:d04758e76d5b | 84 | //* configure pins for LCD operation |
Sissors | 0:d04758e76d5b | 85 | PORTC->PCR[20] = 0x00000000; //VLL2 |
Sissors | 0:d04758e76d5b | 86 | PORTC->PCR[21] = 0x00000000; //VLL1 |
Sissors | 0:d04758e76d5b | 87 | PORTC->PCR[22] = 0x00000000; //VCAP2 |
Sissors | 0:d04758e76d5b | 88 | PORTC->PCR[23] = 0x00000000; //VCAP1 |
Sissors | 0:d04758e76d5b | 89 | |
Sissors | 0:d04758e76d5b | 90 | |
Sissors | 0:d04758e76d5b | 91 | |
Sissors | 0:d04758e76d5b | 92 | // Enable IRCLK |
Sissors | 0:d04758e76d5b | 93 | MCG->C1 = MCG_C1_IRCLKEN_MASK | MCG_C1_IREFSTEN_MASK; |
Sissors | 0:d04758e76d5b | 94 | MCG->C2 &= ~MCG_C2_IRCS_MASK ; //0 32KHZ internal reference clock; 1= 4MHz irc |
Sissors | 0:d04758e76d5b | 95 | |
Sissors | 0:d04758e76d5b | 96 | LCD->GCR = 0x0; |
Sissors | 0:d04758e76d5b | 97 | LCD->AR = 0x0; |
Sissors | 0:d04758e76d5b | 98 | |
Sissors | 0:d04758e76d5b | 99 | /* LCD configurartion according to */ |
Sissors | 0:d04758e76d5b | 100 | LCD->GCR = ( LCD_GCR_RVEN_MASK*_LCDRVEN |
Sissors | 0:d04758e76d5b | 101 | | LCD_GCR_RVTRIM(_LCDRVTRIM) //0-15 |
Sissors | 0:d04758e76d5b | 102 | | LCD_GCR_CPSEL_MASK*_LCDCPSEL |
Sissors | 0:d04758e76d5b | 103 | | LCD_GCR_LADJ(_LCDLOADADJUST) //0-3*/ |
Sissors | 0:d04758e76d5b | 104 | | LCD_GCR_VSUPPLY_MASK*_LCDSUPPLY //0-1*/ |
Sissors | 0:d04758e76d5b | 105 | |!LCD_GCR_FDCIEN_MASK |
Sissors | 0:d04758e76d5b | 106 | | LCD_GCR_ALTDIV(_LCDALTDIV) //0-3 |
Sissors | 0:d04758e76d5b | 107 | |!LCD_GCR_LCDDOZE_MASK |
Sissors | 0:d04758e76d5b | 108 | |!LCD_GCR_LCDSTP_MASK |
Sissors | 0:d04758e76d5b | 109 | |!LCD_GCR_LCDEN_MASK //WILL BE ENABLE ON SUBSEQUENT STEP |
Sissors | 0:d04758e76d5b | 110 | | LCD_GCR_SOURCE_MASK*_LCDCLKSOURCE |
Sissors | 0:d04758e76d5b | 111 | | LCD_GCR_ALTSOURCE_MASK*_LCDALRCLKSOURCE |
Sissors | 0:d04758e76d5b | 112 | | LCD_GCR_LCLK(_LCDLCK) //0-7 |
Sissors | 0:d04758e76d5b | 113 | | LCD_GCR_DUTY(_LCDDUTY) //0-7 |
Sissors | 0:d04758e76d5b | 114 | ); |
Sissors | 0:d04758e76d5b | 115 | |
Sissors | 0:d04758e76d5b | 116 | vfnEnablePins(); // Enable LCD pins and Configure BackPlanes |
Sissors | 0:d04758e76d5b | 117 | LCD->GCR |= LCD_GCR_LCDEN_MASK; |
Sissors | 0:d04758e76d5b | 118 | } |
Sissors | 0:d04758e76d5b | 119 | |
Sissors | 0:d04758e76d5b | 120 | void SLCD::vfnEnablePins (void) |
Sissors | 0:d04758e76d5b | 121 | { |
Sissors | 0:d04758e76d5b | 122 | uint8_t i; |
Sissors | 0:d04758e76d5b | 123 | uint32_t *p_pen; |
Sissors | 0:d04758e76d5b | 124 | uint8_t pen_offset; // 0 or 1 |
Sissors | 0:d04758e76d5b | 125 | uint8_t pen_bit; //0 to 31 |
Sissors | 0:d04758e76d5b | 126 | |
Sissors | 0:d04758e76d5b | 127 | LCD->PEN[0] = 0x0; |
Sissors | 0:d04758e76d5b | 128 | LCD->PEN[1] = 0x0; |
Sissors | 0:d04758e76d5b | 129 | LCD->BPEN[0] = 0x0; |
Sissors | 0:d04758e76d5b | 130 | LCD->BPEN[1] = 0x0; |
Sissors | 0:d04758e76d5b | 131 | |
Sissors | 0:d04758e76d5b | 132 | p_pen = (uint32_t *)&LCD->PEN[0]; |
Sissors | 0:d04758e76d5b | 133 | |
Sissors | 0:d04758e76d5b | 134 | for (i=0;i<_LCDUSEDPINS;i++) |
Sissors | 0:d04758e76d5b | 135 | { |
Sissors | 0:d04758e76d5b | 136 | pen_offset = WF_ORDERING_TABLE[i]/32; |
Sissors | 0:d04758e76d5b | 137 | pen_bit = WF_ORDERING_TABLE[i]%32; |
Sissors | 0:d04758e76d5b | 138 | p_pen[pen_offset] |= 1 << pen_bit; |
Sissors | 0:d04758e76d5b | 139 | if (i>= _LCDFRONTPLANES) // Pin is a backplane |
Sissors | 0:d04758e76d5b | 140 | { |
Sissors | 0:d04758e76d5b | 141 | p_pen[pen_offset+2] |= 1 << pen_bit; // Enable BPEN |
Sissors | 0:d04758e76d5b | 142 | LCD->WF8B[(uint8_t)WF_ORDERING_TABLE[i]] = 1 << (i - _LCDFRONTPLANES); // fill with 0x01, 0x02, etc |
Sissors | 0:d04758e76d5b | 143 | } |
Sissors | 0:d04758e76d5b | 144 | } |
Sissors | 0:d04758e76d5b | 145 | } |
Sissors | 0:d04758e76d5b | 146 | |
Sissors | 0:d04758e76d5b | 147 | |
Sissors | 0:d04758e76d5b | 148 | void SLCD::vfnLCD_Write_Char (char lbValue) { |
Sissors | 0:d04758e76d5b | 149 | uint8_t char_val; |
Sissors | 0:d04758e76d5b | 150 | uint8_t temp; |
Sissors | 0:d04758e76d5b | 151 | uint8_t *lbpLCDWF; |
Sissors | 0:d04758e76d5b | 152 | uint8_t lbCounter; |
Sissors | 0:d04758e76d5b | 153 | uint16_t arrayOffset; |
Sissors | 0:d04758e76d5b | 154 | uint8_t position; |
Sissors | 0:d04758e76d5b | 155 | |
Sissors | 0:d04758e76d5b | 156 | if (bLCD_CharPosition >= _CHARNUM) |
Sissors | 0:d04758e76d5b | 157 | bLCD_CharPosition = 0; |
Sissors | 0:d04758e76d5b | 158 | |
Sissors | 0:d04758e76d5b | 159 | lbpLCDWF = (uint8_t *)&LCD->WF8B[0]; |
Sissors | 0:d04758e76d5b | 160 | /* only ascii character if value not writeable write as @ */ |
Sissors | 0:d04758e76d5b | 161 | if (lbValue>='a' && lbValue<='z') { |
Sissors | 0:d04758e76d5b | 162 | lbValue -= 32; // UpperCase |
Sissors | 0:d04758e76d5b | 163 | } |
Sissors | 0:d04758e76d5b | 164 | if (lbValue<ASCCI_TABLE_START || lbValue >ASCCI_TABLE_END) { |
Sissors | 0:d04758e76d5b | 165 | lbValue = BLANK_CHARACTER; // default value as space |
Sissors | 0:d04758e76d5b | 166 | } |
Sissors | 0:d04758e76d5b | 167 | lbValue -=ASCCI_TABLE_START; // Remove the offset to search in the ascci table |
Sissors | 0:d04758e76d5b | 168 | arrayOffset = (lbValue * _CHAR_SIZE); // Compensate matrix offset |
Sissors | 0:d04758e76d5b | 169 | // ensure bLCD position is in valid limit |
Sissors | 0:d04758e76d5b | 170 | lbCounter = 0; //number of writings to complete one char |
Sissors | 0:d04758e76d5b | 171 | while (lbCounter<_CHAR_SIZE) { |
Sissors | 0:d04758e76d5b | 172 | position = (bLCD_CharPosition) *_LCDTYPE + lbCounter; |
Sissors | 0:d04758e76d5b | 173 | temp=0; |
Sissors | 0:d04758e76d5b | 174 | if (lbCounter==1) { |
Sissors | 0:d04758e76d5b | 175 | temp = lbpLCDWF[WF_ORDERING_TABLE[position]] & 0x01;//bit 0 has the special symbol information |
Sissors | 0:d04758e76d5b | 176 | } |
Sissors | 0:d04758e76d5b | 177 | char_val = ASCII_TO_WF_CODIFICATION_TABLE[arrayOffset + lbCounter]; |
Sissors | 0:d04758e76d5b | 178 | lbpLCDWF[WF_ORDERING_TABLE[position]] = char_val | temp; |
Sissors | 0:d04758e76d5b | 179 | // if (char_val==0) lbCounter = _CHAR_SIZE; //end of this character |
Sissors | 0:d04758e76d5b | 180 | lbCounter++; |
Sissors | 0:d04758e76d5b | 181 | } |
Sissors | 0:d04758e76d5b | 182 | |
Sissors | 0:d04758e76d5b | 183 | bLCD_CharPosition++; |
Sissors | 0:d04758e76d5b | 184 | } |
Sissors | 0:d04758e76d5b | 185 | |
Sissors | 0:d04758e76d5b | 186 | int SLCD::_putc(int c) { |
Sissors | 0:d04758e76d5b | 187 | vfnLCD_Write_Char(c); |
Sissors | 0:d04758e76d5b | 188 | return 0; |
Sissors | 0:d04758e76d5b | 189 | } |
Sissors | 0:d04758e76d5b | 190 |