Stanley Cohen / MMA8451Q8b

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Dependents:   KL46z_single_tap_empty_DE_4_1_PROJECT1B_wInterrupts KL46z_single_tap_empty_DE_4_1_PROJECT1D KL46z_single_tap_generic RAHUL_KL46z_single_tap_generic_copy ... more

Fork of MMA8451Q8a by Stanley Cohen

MMA8451Q8.cpp@11:965d9a564f71, 2016-02-15 (annotated)

Committer:
scohennm
Date:
Mon Feb 15 19:14:41 2016 +0000
Revision:
11:965d9a564f71
Parent:
10:c875155f829d 
updated library for setmode of the acclerometer

Who changed what in which revision?

UserRevisionLine numberNew contents of line
samux 1:d2630136d51e 1 /* Copyright (c) 2010-2011 mbed.org, MIT License
samux 1:d2630136d51e 2 *
samux 1:d2630136d51e 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
samux 1:d2630136d51e 4 * and associated documentation files (the "Software"), to deal in the Software without
samux 1:d2630136d51e 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
samux 1:d2630136d51e 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
samux 1:d2630136d51e 7 * Software is furnished to do so, subject to the following conditions:
samux 1:d2630136d51e 8 *
samux 1:d2630136d51e 9 * The above copyright notice and this permission notice shall be included in all copies or
samux 1:d2630136d51e 10 * substantial portions of the Software.
samux 1:d2630136d51e 11 *
samux 1:d2630136d51e 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
samux 1:d2630136d51e 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
samux 1:d2630136d51e 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
samux 1:d2630136d51e 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
samux 1:d2630136d51e 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
samux 1:d2630136d51e 17 */
scohennm 5:5a7293378401 18 // Modify to change full scale gravity range 141207 sc
samux 1:d2630136d51e 19
scohennm 5:5a7293378401 20
scohennm 5:5a7293378401 21 #include "MMA8451Q8.h"
emilmont 0:6149091f755d 22
samux 1:d2630136d51e 23 #define REG_WHO_AM_I 0x0D
samux 1:d2630136d51e 24 #define REG_CTRL_REG_1 0x2A
emilmont 0:6149091f755d 25 #define REG_OUT_X_MSB 0x01
emilmont 0:6149091f755d 26 #define REG_OUT_Y_MSB 0x03
emilmont 0:6149091f755d 27 #define REG_OUT_Z_MSB 0x05
scohennm 5:5a7293378401 28 #define XYZ_DATA_CFG 0x0E
scohennm 8:993bb9e96a4b 29 // adding tap config register adderesses
scohennm 8:993bb9e96a4b 30 #define REG_PULSE_SRC 0x22
scohennm 8:993bb9e96a4b 31 #define REG_PULSE_CFG 0x21
emilmont 0:6149091f755d 32
samux 1:d2630136d51e 33 #define UINT14_MAX 16383
emilmont 0:6149091f755d 34
scohennm 5:5a7293378401 35 #define MAX_2G 0x00
scohennm 5:5a7293378401 36 #define MAX_4G 0x01
scohennm 5:5a7293378401 37 #define MAX_8G 0x02
scohennm 5:5a7293378401 38
scohennm 5:5a7293378401 39 #define NUM_DATA 2
scohennm 5:5a7293378401 40 #define GSCALING 1024.0
scohennm 5:5a7293378401 41 #define ADDRESS_INDEX 0
scohennm 5:5a7293378401 42 #define DATA_INDEX 1
scohennm 5:5a7293378401 43
scohennm 5:5a7293378401 44 float gScaling[3] = {4095.0,2048.0,1024.0}; //scaling for acceleration of gravity values
scohennm 5:5a7293378401 45
emilmont 0:6149091f755d 46 MMA8451Q::MMA8451Q(PinName sda, PinName scl, int addr) : m_i2c(sda, scl), m_addr(addr) {
emilmont 0:6149091f755d 47 // activate the peripheral
emilmont 0:6149091f755d 48 uint8_t data[2] = {REG_CTRL_REG_1, 0x01};
samux 1:d2630136d51e 49 writeRegs(data, 2);
emilmont 0:6149091f755d 50 }
emilmont 0:6149091f755d 51
emilmont 0:6149091f755d 52 MMA8451Q::~MMA8451Q() { }
emilmont 0:6149091f755d 53
emilmont 0:6149091f755d 54 uint8_t MMA8451Q::getWhoAmI() {
emilmont 0:6149091f755d 55 uint8_t who_am_i = 0;
samux 1:d2630136d51e 56 readRegs(REG_WHO_AM_I, &who_am_i, 1);
emilmont 0:6149091f755d 57 return who_am_i;
emilmont 0:6149091f755d 58 }
scohennm 11:965d9a564f71 59 void MMA8451Q::setStandbyMode(){
scohennm 11:965d9a564f71 60 #define ACTIVEMASK 0x01
scohennm 11:965d9a564f71 61 uint8_t registerData[1];
scohennm 11:965d9a564f71 62 uint8_t data[NUM_DATA] = {REG_CTRL_REG_1, 0x00};
scohennm 11:965d9a564f71 63
scohennm 11:965d9a564f71 64 readRegs(REG_CTRL_REG_1, registerData, 1);
scohennm 11:965d9a564f71 65 data[1] = registerData[0] & ~ACTIVEMASK;
scohennm 11:965d9a564f71 66 writeRegs(data, NUM_DATA); // put in standby
scohennm 11:965d9a564f71 67 }
scohennm 11:965d9a564f71 68 void MMA8451Q::setActiveMode(){
scohennm 11:965d9a564f71 69 #define ACTIVEMASK 0x01
scohennm 11:965d9a564f71 70 uint8_t registerData[1];
scohennm 11:965d9a564f71 71 uint8_t data[NUM_DATA] = {REG_CTRL_REG_1, 0x00};
scohennm 11:965d9a564f71 72
scohennm 11:965d9a564f71 73 readRegs(REG_CTRL_REG_1, registerData, 1);
scohennm 11:965d9a564f71 74 data[1] = registerData[0] | ACTIVEMASK;
scohennm 11:965d9a564f71 75 writeRegs(data, NUM_DATA); // put in standby
scohennm 11:965d9a564f71 76 }
scohennm 11:965d9a564f71 77
scohennm 5:5a7293378401 78 void MMA8451Q::setGLimit(int gSelect) {
scohennm 5:5a7293378401 79 uint8_t data[NUM_DATA] = {REG_CTRL_REG_1, 0x00};
scohennm 5:5a7293378401 80 gChosen = gSelect;
scohennm 11:965d9a564f71 81 setStandbyMode();
scohennm 5:5a7293378401 82 data[ADDRESS_INDEX ] = XYZ_DATA_CFG;
scohennm 5:5a7293378401 83 data[DATA_INDEX] = gChosen;
scohennm 5:5a7293378401 84 writeRegs(data, 2);// change g limit
scohennm 11:965d9a564f71 85 setActiveMode(); // make active
scohennm 5:5a7293378401 86 }
scohennm 11:965d9a564f71 87
scohennm 10:c875155f829d 88 // add Pusle configuration register access
scohennm 8:993bb9e96a4b 89 // Also add function prototype to .h file
scohennm 8:993bb9e96a4b 90 void MMA8451Q::setPulseConfiguration(uint8_t latch,uint8_t axisSet) {
scohennm 8:993bb9e96a4b 91 uint8_t configBits;
scohennm 8:993bb9e96a4b 92 uint8_t data[NUM_DATA] = {REG_CTRL_REG_1, 0x00}; // put in standby mode
scohennm 8:993bb9e96a4b 93 // set up configuration bits.
scohennm 8:993bb9e96a4b 94 configBits = latch | axisSet;
scohennm 8:993bb9e96a4b 95 writeRegs(data, NUM_DATA); // put in standby
scohennm 8:993bb9e96a4b 96 data[ADDRESS_INDEX ] = REG_PULSE_CFG;
scohennm 8:993bb9e96a4b 97 data[DATA_INDEX] = configBits;
scohennm 8:993bb9e96a4b 98 writeRegs(data, NUM_DATA);
scohennm 8:993bb9e96a4b 99 data[ADDRESS_INDEX ] = REG_CTRL_REG_1; // put back in active mode
scohennm 8:993bb9e96a4b 100 data[DATA_INDEX] = 0x01;
scohennm 8:993bb9e96a4b 101 writeRegs(data, 2); // make active
scohennm 8:993bb9e96a4b 102 }
chris 3:db7126dbd63f 103 float MMA8451Q::getAccX() {
scohennm 5:5a7293378401 104 return (float(getAccAxis(REG_OUT_X_MSB))/gScaling[gChosen]);
emilmont 0:6149091f755d 105 }
emilmont 0:6149091f755d 106
scohennm 7:ed7e11d269f8 107
chris 3:db7126dbd63f 108 float MMA8451Q::getAccY() {
scohennm 5:5a7293378401 109 return (float(getAccAxis(REG_OUT_Y_MSB))/gScaling[gChosen]);
emilmont 0:6149091f755d 110 }
emilmont 0:6149091f755d 111
chris 3:db7126dbd63f 112 float MMA8451Q::getAccZ() {
scohennm 5:5a7293378401 113 return (float(getAccAxis(REG_OUT_Z_MSB))/gScaling[gChosen]);
emilmont 0:6149091f755d 114 }
emilmont 0:6149091f755d 115
chris 3:db7126dbd63f 116 void MMA8451Q::getAccAllAxis(float * res) {
emilmont 0:6149091f755d 117 res[0] = getAccX();
emilmont 0:6149091f755d 118 res[1] = getAccY();
emilmont 0:6149091f755d 119 res[2] = getAccZ();
emilmont 0:6149091f755d 120 }
emilmont 0:6149091f755d 121
emilmont 0:6149091f755d 122 int16_t MMA8451Q::getAccAxis(uint8_t addr) {
emilmont 0:6149091f755d 123 int16_t acc;
emilmont 0:6149091f755d 124 uint8_t res[2];
samux 1:d2630136d51e 125 readRegs(addr, res, 2);
emilmont 0:6149091f755d 126
emilmont 0:6149091f755d 127 acc = (res[0] << 6) | (res[1] >> 2);
emilmont 0:6149091f755d 128 if (acc > UINT14_MAX/2)
emilmont 0:6149091f755d 129 acc -= UINT14_MAX;
emilmont 0:6149091f755d 130
emilmont 0:6149091f755d 131 return acc;
emilmont 0:6149091f755d 132 }
emilmont 0:6149091f755d 133
samux 1:d2630136d51e 134 void MMA8451Q::readRegs(int addr, uint8_t * data, int len) {
emilmont 0:6149091f755d 135 char t[1] = {addr};
emilmont 0:6149091f755d 136 m_i2c.write(m_addr, t, 1, true);
emilmont 0:6149091f755d 137 m_i2c.read(m_addr, (char *)data, len);
emilmont 0:6149091f755d 138 }
emilmont 0:6149091f755d 139
samux 1:d2630136d51e 140 void MMA8451Q::writeRegs(uint8_t * data, int len) {
emilmont 0:6149091f755d 141 m_i2c.write(m_addr, (char *)data, len);
emilmont 0:6149091f755d 142 }