helpfor studient
Dependents: STM32_F103-C8T6basecanblink_led
Fork of mbed-dev by
targets/TARGET_NUVOTON/TARGET_NUC472/analogin_api.c@186:9c2029bfadbe, 2018-04-20 (annotated)
- Committer:
- Anna Bridge
- Date:
- Fri Apr 20 11:31:35 2018 +0100
- Revision:
- 186:9c2029bfadbe
- Parent:
- 161:2cc1468da177
Update to latest version of mbed lib
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /* mbed Microcontroller Library |
<> | 144:ef7eb2e8f9f7 | 2 | * Copyright (c) 2015-2016 Nuvoton |
<> | 144:ef7eb2e8f9f7 | 3 | * |
<> | 144:ef7eb2e8f9f7 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 144:ef7eb2e8f9f7 | 5 | * you may not use this file except in compliance with the License. |
<> | 144:ef7eb2e8f9f7 | 6 | * You may obtain a copy of the License at |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 144:ef7eb2e8f9f7 | 9 | * |
<> | 144:ef7eb2e8f9f7 | 10 | * Unless required by applicable law or agreed to in writing, software |
<> | 144:ef7eb2e8f9f7 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 144:ef7eb2e8f9f7 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 144:ef7eb2e8f9f7 | 13 | * See the License for the specific language governing permissions and |
<> | 144:ef7eb2e8f9f7 | 14 | * limitations under the License. |
<> | 144:ef7eb2e8f9f7 | 15 | */ |
<> | 144:ef7eb2e8f9f7 | 16 | |
<> | 144:ef7eb2e8f9f7 | 17 | #include "analogin_api.h" |
<> | 144:ef7eb2e8f9f7 | 18 | |
<> | 144:ef7eb2e8f9f7 | 19 | #if DEVICE_ANALOGIN |
<> | 144:ef7eb2e8f9f7 | 20 | |
<> | 144:ef7eb2e8f9f7 | 21 | #include "cmsis.h" |
<> | 144:ef7eb2e8f9f7 | 22 | #include "pinmap.h" |
<> | 144:ef7eb2e8f9f7 | 23 | #include "PeripheralPins.h" |
<> | 144:ef7eb2e8f9f7 | 24 | #include "nu_modutil.h" |
<> | 144:ef7eb2e8f9f7 | 25 | |
<> | 153:fa9ff456f731 | 26 | static uint32_t eadc_modinit_mask = 0; |
<> | 144:ef7eb2e8f9f7 | 27 | |
<> | 144:ef7eb2e8f9f7 | 28 | static const struct nu_modinit_s adc_modinit_tab[] = { |
<> | 153:fa9ff456f731 | 29 | {ADC_0_0, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL}, |
<> | 153:fa9ff456f731 | 30 | {ADC_0_1, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL}, |
<> | 153:fa9ff456f731 | 31 | {ADC_0_2, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL}, |
<> | 153:fa9ff456f731 | 32 | {ADC_0_3, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL}, |
<> | 153:fa9ff456f731 | 33 | {ADC_0_4, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL}, |
<> | 153:fa9ff456f731 | 34 | {ADC_0_5, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL}, |
<> | 153:fa9ff456f731 | 35 | {ADC_0_6, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL}, |
<> | 153:fa9ff456f731 | 36 | {ADC_0_7, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL}, |
<> | 153:fa9ff456f731 | 37 | |
<> | 153:fa9ff456f731 | 38 | {ADC_1_0, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL}, |
<> | 153:fa9ff456f731 | 39 | {ADC_1_1, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL}, |
<> | 153:fa9ff456f731 | 40 | {ADC_1_2, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL}, |
<> | 153:fa9ff456f731 | 41 | {ADC_1_3, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL}, |
<> | 153:fa9ff456f731 | 42 | {ADC_1_4, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL}, |
<> | 153:fa9ff456f731 | 43 | {ADC_1_5, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL}, |
<> | 153:fa9ff456f731 | 44 | {ADC_1_6, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL}, |
<> | 153:fa9ff456f731 | 45 | {ADC_1_7, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL} |
<> | 144:ef7eb2e8f9f7 | 46 | }; |
<> | 144:ef7eb2e8f9f7 | 47 | |
<> | 144:ef7eb2e8f9f7 | 48 | void analogin_init(analogin_t *obj, PinName pin) |
<> | 144:ef7eb2e8f9f7 | 49 | { |
<> | 144:ef7eb2e8f9f7 | 50 | obj->adc = (ADCName) pinmap_peripheral(pin, PinMap_ADC); |
<> | 144:ef7eb2e8f9f7 | 51 | MBED_ASSERT(obj->adc != (ADCName) NC); |
<> | 144:ef7eb2e8f9f7 | 52 | |
<> | 144:ef7eb2e8f9f7 | 53 | const struct nu_modinit_s *modinit = get_modinit(obj->adc, adc_modinit_tab); |
<> | 144:ef7eb2e8f9f7 | 54 | MBED_ASSERT(modinit != NULL); |
<> | 144:ef7eb2e8f9f7 | 55 | MBED_ASSERT(modinit->modname == obj->adc); |
<> | 144:ef7eb2e8f9f7 | 56 | |
<> | 153:fa9ff456f731 | 57 | EADC_T *eadc_base = (EADC_T *) NU_MODBASE(obj->adc); |
<> | 153:fa9ff456f731 | 58 | |
<> | 144:ef7eb2e8f9f7 | 59 | // NOTE: All channels (identified by ADCName) share a ADC module. This reset will also affect other channels of the same ADC module. |
<> | 153:fa9ff456f731 | 60 | if (! eadc_modinit_mask) { |
<> | 144:ef7eb2e8f9f7 | 61 | // Reset this module if no channel enabled |
<> | 144:ef7eb2e8f9f7 | 62 | SYS_ResetModule(modinit->rsetidx); |
<> | 144:ef7eb2e8f9f7 | 63 | |
<> | 144:ef7eb2e8f9f7 | 64 | // Select clock source of paired channels |
<> | 144:ef7eb2e8f9f7 | 65 | CLK_SetModuleClock(modinit->clkidx, modinit->clksrc, modinit->clkdiv); |
<> | 144:ef7eb2e8f9f7 | 66 | // Enable clock of paired channels |
<> | 144:ef7eb2e8f9f7 | 67 | CLK_EnableModuleClock(modinit->clkidx); |
<> | 144:ef7eb2e8f9f7 | 68 | |
<> | 153:fa9ff456f731 | 69 | // Make EADC_module ready to convert |
<> | 153:fa9ff456f731 | 70 | EADC_Open(eadc_base, 0); |
<> | 144:ef7eb2e8f9f7 | 71 | } |
<> | 144:ef7eb2e8f9f7 | 72 | |
<> | 161:2cc1468da177 | 73 | uint32_t smp_chn = NU_MODSUBINDEX(obj->adc); |
<> | 161:2cc1468da177 | 74 | uint32_t smp_mod = NU_MODINDEX(obj->adc) * 8 + smp_chn; |
<> | 144:ef7eb2e8f9f7 | 75 | |
<> | 144:ef7eb2e8f9f7 | 76 | // Wire pinout |
<> | 144:ef7eb2e8f9f7 | 77 | pinmap_pinout(pin, PinMap_ADC); |
<> | 144:ef7eb2e8f9f7 | 78 | |
<> | 153:fa9ff456f731 | 79 | // Configure the sample module Nmod for analog input channel Nch and software trigger source |
<> | 161:2cc1468da177 | 80 | EADC_ConfigSampleModule(eadc_base, smp_mod, EADC_SOFTWARE_TRIGGER, smp_chn); |
<> | 144:ef7eb2e8f9f7 | 81 | |
<> | 161:2cc1468da177 | 82 | eadc_modinit_mask |= 1 << smp_mod; |
<> | 144:ef7eb2e8f9f7 | 83 | } |
<> | 144:ef7eb2e8f9f7 | 84 | |
<> | 144:ef7eb2e8f9f7 | 85 | uint16_t analogin_read_u16(analogin_t *obj) |
<> | 144:ef7eb2e8f9f7 | 86 | { |
<> | 153:fa9ff456f731 | 87 | EADC_T *eadc_base = (EADC_T *) NU_MODBASE(obj->adc); |
<> | 161:2cc1468da177 | 88 | uint32_t smp_chn = NU_MODSUBINDEX(obj->adc); |
<> | 161:2cc1468da177 | 89 | uint32_t smp_mod = NU_MODINDEX(obj->adc) * 8 + smp_chn; |
<> | 144:ef7eb2e8f9f7 | 90 | |
<> | 161:2cc1468da177 | 91 | EADC_START_CONV(eadc_base, 1 << smp_mod); |
<> | 161:2cc1468da177 | 92 | while (EADC_GET_DATA_VALID_FLAG(eadc_base, 1 << smp_mod) != (1 << smp_mod)); |
<> | 161:2cc1468da177 | 93 | uint16_t conv_res_12 = EADC_GET_CONV_DATA(eadc_base, smp_mod); |
<> | 144:ef7eb2e8f9f7 | 94 | // Just 12 bits are effective. Convert to 16 bits. |
<> | 144:ef7eb2e8f9f7 | 95 | // conv_res_12: 0000 b11b10b9b8 b7b6b5b4 b3b2b1b0 |
<> | 144:ef7eb2e8f9f7 | 96 | // conv_res_16: b11b10b9b8 b7b6b5b4 b3b2b1b0 b11b10b9b8 |
<> | 144:ef7eb2e8f9f7 | 97 | uint16_t conv_res_16 = (conv_res_12 << 4) | (conv_res_12 >> 8); |
<> | 144:ef7eb2e8f9f7 | 98 | |
<> | 144:ef7eb2e8f9f7 | 99 | return conv_res_16; |
<> | 144:ef7eb2e8f9f7 | 100 | } |
<> | 144:ef7eb2e8f9f7 | 101 | |
<> | 144:ef7eb2e8f9f7 | 102 | float analogin_read(analogin_t *obj) |
<> | 144:ef7eb2e8f9f7 | 103 | { |
<> | 144:ef7eb2e8f9f7 | 104 | uint16_t value = analogin_read_u16(obj); |
<> | 144:ef7eb2e8f9f7 | 105 | return (float) value * (1.0f / (float) 0xFFFF); |
<> | 144:ef7eb2e8f9f7 | 106 | } |
<> | 144:ef7eb2e8f9f7 | 107 | |
<> | 144:ef7eb2e8f9f7 | 108 | #endif |