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Dependents:   STM32_F103-C8T6basecanblink_led

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targets/TARGET_NUVOTON/TARGET_M451/us_ticker.c@186:9c2029bfadbe, 2018-04-20 (annotated)

Committer:
Anna Bridge
Date:
Fri Apr 20 11:31:35 2018 +0100
Revision:
186:9c2029bfadbe
Parent:
185:08ed48f1de7f 
Update to latest version of mbed lib

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /* mbed Microcontroller Library
<> 149:156823d33999 2 * Copyright (c) 2015-2016 Nuvoton
<> 149:156823d33999 3 *
<> 149:156823d33999 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 149:156823d33999 5 * you may not use this file except in compliance with the License.
<> 149:156823d33999 6 * You may obtain a copy of the License at
<> 149:156823d33999 7 *
<> 149:156823d33999 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 149:156823d33999 9 *
<> 149:156823d33999 10 * Unless required by applicable law or agreed to in writing, software
<> 149:156823d33999 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 149:156823d33999 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 149:156823d33999 13 * See the License for the specific language governing permissions and
<> 149:156823d33999 14 * limitations under the License.
<> 149:156823d33999 15 */
AnnaBridge 183:a56a73fd2a6f 16
<> 149:156823d33999 17 #include "us_ticker_api.h"
<> 149:156823d33999 18 #include "sleep_api.h"
<> 149:156823d33999 19 #include "mbed_assert.h"
<> 149:156823d33999 20 #include "nu_modutil.h"
<> 149:156823d33999 21 #include "nu_miscutil.h"
<> 149:156823d33999 22
AnnaBridge 183:a56a73fd2a6f 23 /* Micro seconds per second */
AnnaBridge 183:a56a73fd2a6f 24 #define NU_US_PER_SEC 1000000
AnnaBridge 183:a56a73fd2a6f 25 /* Timer clock per us_ticker tick */
AnnaBridge 183:a56a73fd2a6f 26 #define NU_TMRCLK_PER_TICK 1
AnnaBridge 183:a56a73fd2a6f 27 /* Timer clock per second */
AnnaBridge 183:a56a73fd2a6f 28 #define NU_TMRCLK_PER_SEC (1000 * 1000)
AnnaBridge 183:a56a73fd2a6f 29 /* Timer max counter bit size */
AnnaBridge 183:a56a73fd2a6f 30 #define NU_TMR_MAXCNT_BITSIZE 24
AnnaBridge 183:a56a73fd2a6f 31 /* Timer max counter */
AnnaBridge 183:a56a73fd2a6f 32 #define NU_TMR_MAXCNT ((1 << NU_TMR_MAXCNT_BITSIZE) - 1)
<> 149:156823d33999 33
<> 149:156823d33999 34 static void tmr0_vec(void);
<> 149:156823d33999 35
AnnaBridge 183:a56a73fd2a6f 36 static const struct nu_modinit_s timer0_modinit = {TIMER_0, TMR0_MODULE, CLK_CLKSEL1_TMR0SEL_PCLK0, 0, TMR0_RST, TMR0_IRQn, (void *) tmr0_vec};
<> 149:156823d33999 37
AnnaBridge 183:a56a73fd2a6f 38 #define TIMER_MODINIT timer0_modinit
AnnaBridge 183:a56a73fd2a6f 39
AnnaBridge 183:a56a73fd2a6f 40 static int ticker_inited = 0;
<> 149:156823d33999 41
<> 149:156823d33999 42 #define TMR_CMP_MIN 2
<> 149:156823d33999 43 #define TMR_CMP_MAX 0xFFFFFFu
<> 149:156823d33999 44
<> 149:156823d33999 45 void us_ticker_init(void)
<> 149:156823d33999 46 {
AnnaBridge 183:a56a73fd2a6f 47 if (ticker_inited) {
<> 149:156823d33999 48 return;
<> 149:156823d33999 49 }
AnnaBridge 183:a56a73fd2a6f 50 ticker_inited = 1;
AnnaBridge 183:a56a73fd2a6f 51
<> 149:156823d33999 52 // Reset IP
AnnaBridge 183:a56a73fd2a6f 53 SYS_ResetModule(TIMER_MODINIT.rsetidx);
AnnaBridge 183:a56a73fd2a6f 54
<> 149:156823d33999 55 // Select IP clock source
AnnaBridge 183:a56a73fd2a6f 56 CLK_SetModuleClock(TIMER_MODINIT.clkidx, TIMER_MODINIT.clksrc, TIMER_MODINIT.clkdiv);
AnnaBridge 183:a56a73fd2a6f 57
<> 149:156823d33999 58 // Enable IP clock
AnnaBridge 183:a56a73fd2a6f 59 CLK_EnableModuleClock(TIMER_MODINIT.clkidx);
<> 149:156823d33999 60
AnnaBridge 185:08ed48f1de7f 61 TIMER_T *timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname);
AnnaBridge 185:08ed48f1de7f 62
<> 149:156823d33999 63 // Timer for normal counter
AnnaBridge 185:08ed48f1de7f 64 uint32_t clk_timer = TIMER_GetModuleClock(timer_base);
AnnaBridge 183:a56a73fd2a6f 65 uint32_t prescale_timer = clk_timer / NU_TMRCLK_PER_SEC - 1;
AnnaBridge 183:a56a73fd2a6f 66 MBED_ASSERT((prescale_timer != (uint32_t) -1) && prescale_timer <= 127);
AnnaBridge 183:a56a73fd2a6f 67 MBED_ASSERT((clk_timer % NU_TMRCLK_PER_SEC) == 0);
AnnaBridge 183:a56a73fd2a6f 68 uint32_t cmp_timer = TMR_CMP_MAX;
AnnaBridge 183:a56a73fd2a6f 69 MBED_ASSERT(cmp_timer >= TMR_CMP_MIN && cmp_timer <= TMR_CMP_MAX);
<> 149:156823d33999 70 // NOTE: TIMER_CTL_CNTDATEN_Msk exists in NUC472, but not in M451. In M451, TIMER_CNT is updated continuously by default.
AnnaBridge 185:08ed48f1de7f 71 timer_base->CTL = TIMER_CONTINUOUS_MODE | prescale_timer/* | TIMER_CTL_CNTDATEN_Msk*/;
AnnaBridge 185:08ed48f1de7f 72 timer_base->CMP = cmp_timer;
AnnaBridge 183:a56a73fd2a6f 73
AnnaBridge 183:a56a73fd2a6f 74 NVIC_SetVector(TIMER_MODINIT.irq_n, (uint32_t) TIMER_MODINIT.var);
AnnaBridge 183:a56a73fd2a6f 75
AnnaBridge 183:a56a73fd2a6f 76 NVIC_EnableIRQ(TIMER_MODINIT.irq_n);
AnnaBridge 183:a56a73fd2a6f 77
AnnaBridge 185:08ed48f1de7f 78 TIMER_EnableInt(timer_base);
AnnaBridge 185:08ed48f1de7f 79
AnnaBridge 185:08ed48f1de7f 80 TIMER_Start(timer_base);
AnnaBridge 185:08ed48f1de7f 81 /* Wait for timer to start counting and raise active flag */
AnnaBridge 185:08ed48f1de7f 82 while(! (timer_base->CTL & TIMER_CTL_ACTSTS_Msk));
<> 149:156823d33999 83 }
<> 149:156823d33999 84
<> 149:156823d33999 85 uint32_t us_ticker_read()
<> 149:156823d33999 86 {
AnnaBridge 183:a56a73fd2a6f 87 if (! ticker_inited) {
<> 149:156823d33999 88 us_ticker_init();
<> 149:156823d33999 89 }
<> 149:156823d33999 90
AnnaBridge 185:08ed48f1de7f 91 TIMER_T *timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname);
<> 149:156823d33999 92
AnnaBridge 183:a56a73fd2a6f 93 return (TIMER_GetCounter(timer_base) / NU_TMRCLK_PER_TICK);
<> 149:156823d33999 94 }
<> 149:156823d33999 95
<> 149:156823d33999 96 void us_ticker_set_interrupt(timestamp_t timestamp)
<> 149:156823d33999 97 {
AnnaBridge 183:a56a73fd2a6f 98 /* In continuous mode, counter will be reset to zero with the following sequence:
AnnaBridge 183:a56a73fd2a6f 99 * 1. Stop counting
AnnaBridge 183:a56a73fd2a6f 100 * 2. Configure new CMP value
AnnaBridge 183:a56a73fd2a6f 101 * 3. Restart counting
AnnaBridge 183:a56a73fd2a6f 102 *
AnnaBridge 183:a56a73fd2a6f 103 * This behavior is not what we want. To fix it, we could configure new CMP value
AnnaBridge 183:a56a73fd2a6f 104 * without stopping counting first.
AnnaBridge 183:a56a73fd2a6f 105 */
AnnaBridge 185:08ed48f1de7f 106 TIMER_T *timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname);
AnnaBridge 183:a56a73fd2a6f 107
AnnaBridge 183:a56a73fd2a6f 108 /* NOTE: Because H/W timer requests min compare value, our implementation would have alarm delay of
AnnaBridge 183:a56a73fd2a6f 109 * (TMR_CMP_MIN - interval_clk) clocks when interval_clk is between [1, TMR_CMP_MIN). */
AnnaBridge 183:a56a73fd2a6f 110 uint32_t cmp_timer = timestamp * NU_TMRCLK_PER_TICK;
AnnaBridge 183:a56a73fd2a6f 111 cmp_timer = NU_CLAMP(cmp_timer, TMR_CMP_MIN, TMR_CMP_MAX);
AnnaBridge 183:a56a73fd2a6f 112 timer_base->CMP = cmp_timer;
AnnaBridge 183:a56a73fd2a6f 113 }
AnnaBridge 183:a56a73fd2a6f 114
AnnaBridge 183:a56a73fd2a6f 115 void us_ticker_disable_interrupt(void)
AnnaBridge 183:a56a73fd2a6f 116 {
AnnaBridge 183:a56a73fd2a6f 117 TIMER_DisableInt((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
AnnaBridge 183:a56a73fd2a6f 118 }
AnnaBridge 183:a56a73fd2a6f 119
AnnaBridge 183:a56a73fd2a6f 120 void us_ticker_clear_interrupt(void)
AnnaBridge 183:a56a73fd2a6f 121 {
AnnaBridge 183:a56a73fd2a6f 122 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
AnnaBridge 174:b96e65c34a4d 123 }
AnnaBridge 174:b96e65c34a4d 124
AnnaBridge 174:b96e65c34a4d 125 void us_ticker_fire_interrupt(void)
AnnaBridge 174:b96e65c34a4d 126 {
AnnaBridge 183:a56a73fd2a6f 127 // NOTE: This event was in the past. Set the interrupt as pending, but don't process it here.
AnnaBridge 183:a56a73fd2a6f 128 // This prevents a recursive loop under heavy load which can lead to a stack overflow.
AnnaBridge 183:a56a73fd2a6f 129 NVIC_SetPendingIRQ(TIMER_MODINIT.irq_n);
AnnaBridge 183:a56a73fd2a6f 130 }
AnnaBridge 183:a56a73fd2a6f 131
AnnaBridge 183:a56a73fd2a6f 132 const ticker_info_t* us_ticker_get_info()
AnnaBridge 183:a56a73fd2a6f 133 {
AnnaBridge 183:a56a73fd2a6f 134 static const ticker_info_t info = {
AnnaBridge 183:a56a73fd2a6f 135 NU_TMRCLK_PER_SEC / NU_TMRCLK_PER_TICK,
AnnaBridge 183:a56a73fd2a6f 136 NU_TMR_MAXCNT_BITSIZE
AnnaBridge 183:a56a73fd2a6f 137 };
AnnaBridge 183:a56a73fd2a6f 138 return &info;
<> 149:156823d33999 139 }
<> 149:156823d33999 140
<> 149:156823d33999 141 static void tmr0_vec(void)
<> 149:156823d33999 142 {
AnnaBridge 183:a56a73fd2a6f 143 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
<> 149:156823d33999 144
AnnaBridge 183:a56a73fd2a6f 145 // NOTE: us_ticker_set_interrupt() may get called in us_ticker_irq_handler();
AnnaBridge 183:a56a73fd2a6f 146 us_ticker_irq_handler();
<> 149:156823d33999 147 }