schneider françois / mbed-dev

Important changes to repositories hosted on mbed.com

Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.

To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.

It is also possible to export all your personal repositories from the account settings page.

Dependents:   STM32_F103-C8T6basecanblink_led

Fork of mbed-dev by mbed official

targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/device/inc/iodefines/l2c_iodefine.h@182:57724642e740, 2018-02-16 (annotated)

Committer:
AnnaBridge
Date:
Fri Feb 16 16:09:33 2018 +0000
Revision:
182:57724642e740
Parent:
targets/TARGET_RENESAS/TARGET_RZ_A1H/device/inc/iodefines/l2c_iodefine.h@181:96ed750bd169 
mbed-dev library. Release version 159.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*******************************************************************************
<> 144:ef7eb2e8f9f7 2 * DISCLAIMER
<> 144:ef7eb2e8f9f7 3 * This software is supplied by Renesas Electronics Corporation and is only
<> 144:ef7eb2e8f9f7 4 * intended for use with Renesas products. No other uses are authorized. This
<> 144:ef7eb2e8f9f7 5 * software is owned by Renesas Electronics Corporation and is protected under
<> 144:ef7eb2e8f9f7 6 * all applicable laws, including copyright laws.
<> 144:ef7eb2e8f9f7 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
<> 144:ef7eb2e8f9f7 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
<> 144:ef7eb2e8f9f7 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
<> 144:ef7eb2e8f9f7 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
<> 144:ef7eb2e8f9f7 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
<> 144:ef7eb2e8f9f7 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
<> 144:ef7eb2e8f9f7 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
<> 144:ef7eb2e8f9f7 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
<> 144:ef7eb2e8f9f7 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
<> 144:ef7eb2e8f9f7 16 * Renesas reserves the right, without notice, to make changes to this software
<> 144:ef7eb2e8f9f7 17 * and to discontinue the availability of this software. By using this software,
<> 144:ef7eb2e8f9f7 18 * you agree to the additional terms and conditions found by accessing the
<> 144:ef7eb2e8f9f7 19 * following link:
<> 144:ef7eb2e8f9f7 20 * http://www.renesas.com/disclaimer*
Anna Bridge 181:96ed750bd169 21 * Copyright (C) 2013-2015 Renesas Electronics Corporation. All rights reserved.
<> 144:ef7eb2e8f9f7 22 *******************************************************************************/
<> 144:ef7eb2e8f9f7 23 /*******************************************************************************
<> 144:ef7eb2e8f9f7 24 * File Name : l2c_iodefine.h
<> 144:ef7eb2e8f9f7 25 * $Rev: $
<> 144:ef7eb2e8f9f7 26 * $Date:: $
Anna Bridge 181:96ed750bd169 27 * Description : Definition of I/O Register for RZ/A1H,M (V2.00h)
<> 144:ef7eb2e8f9f7 28 ******************************************************************************/
<> 144:ef7eb2e8f9f7 29 #ifndef L2C_IODEFINE_H
<> 144:ef7eb2e8f9f7 30 #define L2C_IODEFINE_H
Anna Bridge 181:96ed750bd169 31 /* ->QAC 0639 : Over 127 members (C90) */
Anna Bridge 181:96ed750bd169 32 /* ->QAC 0857 : Over 1024 #define (C90) */
Anna Bridge 181:96ed750bd169 33 /* ->MISRA 18.4 : Pack unpack union */ /* ->SEC M1.6.2 */
<> 144:ef7eb2e8f9f7 34 /* ->SEC M1.10.1 : Not magic number */
<> 144:ef7eb2e8f9f7 35
Anna Bridge 181:96ed750bd169 36 #define L2C (*(struct st_l2c *)0x3FFFF000uL) /* L2C */
Anna Bridge 181:96ed750bd169 37
Anna Bridge 181:96ed750bd169 38
Anna Bridge 181:96ed750bd169 39 /* Start of channel array defines of L2C */
Anna Bridge 181:96ed750bd169 40
Anna Bridge 181:96ed750bd169 41 /* Channel array defines of L2C_FROM_REG9_D_LOCKDOWN0_ARRAY */
Anna Bridge 181:96ed750bd169 42 /*(Sample) value = L2C_FROM_REG9_D_LOCKDOWN0_ARRAY[ channel ]->REG9_D_LOCKDOWN0; */
Anna Bridge 181:96ed750bd169 43 #define L2C_FROM_REG9_D_LOCKDOWN0_ARRAY_COUNT (8)
Anna Bridge 181:96ed750bd169 44 #define L2C_FROM_REG9_D_LOCKDOWN0_ARRAY_ADDRESS_LIST \
Anna Bridge 181:96ed750bd169 45 { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
Anna Bridge 181:96ed750bd169 46 &L2C_FROM_REG9_D_LOCKDOWN0, &L2C_FROM_REG9_D_LOCKDOWN1, &L2C_FROM_REG9_D_LOCKDOWN2, &L2C_FROM_REG9_D_LOCKDOWN3, &L2C_FROM_REG9_D_LOCKDOWN4, &L2C_FROM_REG9_D_LOCKDOWN5, &L2C_FROM_REG9_D_LOCKDOWN6, &L2C_FROM_REG9_D_LOCKDOWN7 \
Anna Bridge 181:96ed750bd169 47 } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
Anna Bridge 181:96ed750bd169 48 #define L2C_FROM_REG9_D_LOCKDOWN0 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN0) /* L2C_FROM_REG9_D_LOCKDOWN0 */
Anna Bridge 181:96ed750bd169 49 #define L2C_FROM_REG9_D_LOCKDOWN1 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN1) /* L2C_FROM_REG9_D_LOCKDOWN1 */
Anna Bridge 181:96ed750bd169 50 #define L2C_FROM_REG9_D_LOCKDOWN2 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN2) /* L2C_FROM_REG9_D_LOCKDOWN2 */
Anna Bridge 181:96ed750bd169 51 #define L2C_FROM_REG9_D_LOCKDOWN3 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN3) /* L2C_FROM_REG9_D_LOCKDOWN3 */
Anna Bridge 181:96ed750bd169 52 #define L2C_FROM_REG9_D_LOCKDOWN4 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN4) /* L2C_FROM_REG9_D_LOCKDOWN4 */
Anna Bridge 181:96ed750bd169 53 #define L2C_FROM_REG9_D_LOCKDOWN5 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN5) /* L2C_FROM_REG9_D_LOCKDOWN5 */
Anna Bridge 181:96ed750bd169 54 #define L2C_FROM_REG9_D_LOCKDOWN6 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN6) /* L2C_FROM_REG9_D_LOCKDOWN6 */
Anna Bridge 181:96ed750bd169 55 #define L2C_FROM_REG9_D_LOCKDOWN7 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN7) /* L2C_FROM_REG9_D_LOCKDOWN7 */
Anna Bridge 181:96ed750bd169 56
Anna Bridge 181:96ed750bd169 57 /* End of channel array defines of L2C */
Anna Bridge 181:96ed750bd169 58
Anna Bridge 181:96ed750bd169 59
Anna Bridge 181:96ed750bd169 60 #define L2CREG0_CACHE_ID (L2C.REG0_CACHE_ID)
Anna Bridge 181:96ed750bd169 61 #define L2CREG0_CACHE_TYPE (L2C.REG0_CACHE_TYPE)
Anna Bridge 181:96ed750bd169 62 #define L2CREG1_CONTROL (L2C.REG1_CONTROL)
Anna Bridge 181:96ed750bd169 63 #define L2CREG1_AUX_CONTROL (L2C.REG1_AUX_CONTROL)
Anna Bridge 181:96ed750bd169 64 #define L2CREG1_TAG_RAM_CONTROL (L2C.REG1_TAG_RAM_CONTROL)
Anna Bridge 181:96ed750bd169 65 #define L2CREG1_DATA_RAM_CONTROL (L2C.REG1_DATA_RAM_CONTROL)
Anna Bridge 181:96ed750bd169 66 #define L2CREG2_EV_COUNTER_CTRL (L2C.REG2_EV_COUNTER_CTRL)
Anna Bridge 181:96ed750bd169 67 #define L2CREG2_EV_COUNTER1_CFG (L2C.REG2_EV_COUNTER1_CFG)
Anna Bridge 181:96ed750bd169 68 #define L2CREG2_EV_COUNTER0_CFG (L2C.REG2_EV_COUNTER0_CFG)
Anna Bridge 181:96ed750bd169 69 #define L2CREG2_EV_COUNTER1 (L2C.REG2_EV_COUNTER1)
Anna Bridge 181:96ed750bd169 70 #define L2CREG2_EV_COUNTER0 (L2C.REG2_EV_COUNTER0)
Anna Bridge 181:96ed750bd169 71 #define L2CREG2_INT_MASK (L2C.REG2_INT_MASK)
Anna Bridge 181:96ed750bd169 72 #define L2CREG2_INT_MASK_STATUS (L2C.REG2_INT_MASK_STATUS)
Anna Bridge 181:96ed750bd169 73 #define L2CREG2_INT_RAW_STATUS (L2C.REG2_INT_RAW_STATUS)
Anna Bridge 181:96ed750bd169 74 #define L2CREG2_INT_CLEAR (L2C.REG2_INT_CLEAR)
Anna Bridge 181:96ed750bd169 75 #define L2CREG7_CACHE_SYNC (L2C.REG7_CACHE_SYNC)
Anna Bridge 181:96ed750bd169 76 #define L2CREG7_INV_PA (L2C.REG7_INV_PA)
Anna Bridge 181:96ed750bd169 77 #define L2CREG7_INV_WAY (L2C.REG7_INV_WAY)
Anna Bridge 181:96ed750bd169 78 #define L2CREG7_CLEAN_PA (L2C.REG7_CLEAN_PA)
Anna Bridge 181:96ed750bd169 79 #define L2CREG7_CLEAN_INDEX (L2C.REG7_CLEAN_INDEX)
Anna Bridge 181:96ed750bd169 80 #define L2CREG7_CLEAN_WAY (L2C.REG7_CLEAN_WAY)
Anna Bridge 181:96ed750bd169 81 #define L2CREG7_CLEAN_INV_PA (L2C.REG7_CLEAN_INV_PA)
Anna Bridge 181:96ed750bd169 82 #define L2CREG7_CLEAN_INV_INDEX (L2C.REG7_CLEAN_INV_INDEX)
Anna Bridge 181:96ed750bd169 83 #define L2CREG7_CLEAN_INV_WAY (L2C.REG7_CLEAN_INV_WAY)
Anna Bridge 181:96ed750bd169 84 #define L2CREG9_D_LOCKDOWN0 (L2C.REG9_D_LOCKDOWN0)
Anna Bridge 181:96ed750bd169 85 #define L2CREG9_I_LOCKDOWN0 (L2C.REG9_I_LOCKDOWN0)
Anna Bridge 181:96ed750bd169 86 #define L2CREG9_D_LOCKDOWN1 (L2C.REG9_D_LOCKDOWN1)
Anna Bridge 181:96ed750bd169 87 #define L2CREG9_I_LOCKDOWN1 (L2C.REG9_I_LOCKDOWN1)
Anna Bridge 181:96ed750bd169 88 #define L2CREG9_D_LOCKDOWN2 (L2C.REG9_D_LOCKDOWN2)
Anna Bridge 181:96ed750bd169 89 #define L2CREG9_I_LOCKDOWN2 (L2C.REG9_I_LOCKDOWN2)
Anna Bridge 181:96ed750bd169 90 #define L2CREG9_D_LOCKDOWN3 (L2C.REG9_D_LOCKDOWN3)
Anna Bridge 181:96ed750bd169 91 #define L2CREG9_I_LOCKDOWN3 (L2C.REG9_I_LOCKDOWN3)
Anna Bridge 181:96ed750bd169 92 #define L2CREG9_D_LOCKDOWN4 (L2C.REG9_D_LOCKDOWN4)
Anna Bridge 181:96ed750bd169 93 #define L2CREG9_I_LOCKDOWN4 (L2C.REG9_I_LOCKDOWN4)
Anna Bridge 181:96ed750bd169 94 #define L2CREG9_D_LOCKDOWN5 (L2C.REG9_D_LOCKDOWN5)
Anna Bridge 181:96ed750bd169 95 #define L2CREG9_I_LOCKDOWN5 (L2C.REG9_I_LOCKDOWN5)
Anna Bridge 181:96ed750bd169 96 #define L2CREG9_D_LOCKDOWN6 (L2C.REG9_D_LOCKDOWN6)
Anna Bridge 181:96ed750bd169 97 #define L2CREG9_I_LOCKDOWN6 (L2C.REG9_I_LOCKDOWN6)
Anna Bridge 181:96ed750bd169 98 #define L2CREG9_D_LOCKDOWN7 (L2C.REG9_D_LOCKDOWN7)
Anna Bridge 181:96ed750bd169 99 #define L2CREG9_I_LOCKDOWN7 (L2C.REG9_I_LOCKDOWN7)
Anna Bridge 181:96ed750bd169 100 #define L2CREG9_LOCK_LINE_EN (L2C.REG9_LOCK_LINE_EN)
Anna Bridge 181:96ed750bd169 101 #define L2CREG9_UNLOCK_WAY (L2C.REG9_UNLOCK_WAY)
Anna Bridge 181:96ed750bd169 102 #define L2CREG12_ADDR_FILTERING_START (L2C.REG12_ADDR_FILTERING_START)
Anna Bridge 181:96ed750bd169 103 #define L2CREG12_ADDR_FILTERING_END (L2C.REG12_ADDR_FILTERING_END)
Anna Bridge 181:96ed750bd169 104 #define L2CREG15_DEBUG_CTRL (L2C.REG15_DEBUG_CTRL)
Anna Bridge 181:96ed750bd169 105 #define L2CREG15_PREFETCH_CTRL (L2C.REG15_PREFETCH_CTRL)
Anna Bridge 181:96ed750bd169 106 #define L2CREG15_POWER_CTRL (L2C.REG15_POWER_CTRL)
Anna Bridge 181:96ed750bd169 107
Anna Bridge 181:96ed750bd169 108
Anna Bridge 181:96ed750bd169 109 typedef struct st_l2c
Anna Bridge 181:96ed750bd169 110 {
Anna Bridge 181:96ed750bd169 111 /* L2C */
<> 144:ef7eb2e8f9f7 112 volatile uint32_t REG0_CACHE_ID; /* REG0_CACHE_ID */
<> 144:ef7eb2e8f9f7 113 volatile uint32_t REG0_CACHE_TYPE; /* REG0_CACHE_TYPE */
<> 144:ef7eb2e8f9f7 114 volatile uint8_t dummy8[248]; /* */
<> 144:ef7eb2e8f9f7 115 volatile uint32_t REG1_CONTROL; /* REG1_CONTROL */
<> 144:ef7eb2e8f9f7 116 volatile uint32_t REG1_AUX_CONTROL; /* REG1_AUX_CONTROL */
<> 144:ef7eb2e8f9f7 117 volatile uint32_t REG1_TAG_RAM_CONTROL; /* REG1_TAG_RAM_CONTROL */
<> 144:ef7eb2e8f9f7 118 volatile uint32_t REG1_DATA_RAM_CONTROL; /* REG1_DATA_RAM_CONTROL */
<> 144:ef7eb2e8f9f7 119 volatile uint8_t dummy9[240]; /* */
<> 144:ef7eb2e8f9f7 120 volatile uint32_t REG2_EV_COUNTER_CTRL; /* REG2_EV_COUNTER_CTRL */
<> 144:ef7eb2e8f9f7 121 volatile uint32_t REG2_EV_COUNTER1_CFG; /* REG2_EV_COUNTER1_CFG */
<> 144:ef7eb2e8f9f7 122 volatile uint32_t REG2_EV_COUNTER0_CFG; /* REG2_EV_COUNTER0_CFG */
<> 144:ef7eb2e8f9f7 123 volatile uint32_t REG2_EV_COUNTER1; /* REG2_EV_COUNTER1 */
<> 144:ef7eb2e8f9f7 124 volatile uint32_t REG2_EV_COUNTER0; /* REG2_EV_COUNTER0 */
<> 144:ef7eb2e8f9f7 125 volatile uint32_t REG2_INT_MASK; /* REG2_INT_MASK */
<> 144:ef7eb2e8f9f7 126 volatile uint32_t REG2_INT_MASK_STATUS; /* REG2_INT_MASK_STATUS */
<> 144:ef7eb2e8f9f7 127 volatile uint32_t REG2_INT_RAW_STATUS; /* REG2_INT_RAW_STATUS */
<> 144:ef7eb2e8f9f7 128 volatile uint32_t REG2_INT_CLEAR; /* REG2_INT_CLEAR */
<> 144:ef7eb2e8f9f7 129 volatile uint8_t dummy10[1292]; /* */
<> 144:ef7eb2e8f9f7 130 volatile uint32_t REG7_CACHE_SYNC; /* REG7_CACHE_SYNC */
<> 144:ef7eb2e8f9f7 131 volatile uint8_t dummy11[60]; /* */
<> 144:ef7eb2e8f9f7 132 volatile uint32_t REG7_INV_PA; /* REG7_INV_PA */
<> 144:ef7eb2e8f9f7 133 volatile uint8_t dummy12[8]; /* */
<> 144:ef7eb2e8f9f7 134 volatile uint32_t REG7_INV_WAY; /* REG7_INV_WAY */
<> 144:ef7eb2e8f9f7 135 volatile uint8_t dummy13[48]; /* */
<> 144:ef7eb2e8f9f7 136 volatile uint32_t REG7_CLEAN_PA; /* REG7_CLEAN_PA */
<> 144:ef7eb2e8f9f7 137 volatile uint8_t dummy14[4]; /* */
<> 144:ef7eb2e8f9f7 138 volatile uint32_t REG7_CLEAN_INDEX; /* REG7_CLEAN_INDEX */
<> 144:ef7eb2e8f9f7 139 volatile uint32_t REG7_CLEAN_WAY; /* REG7_CLEAN_WAY */
<> 144:ef7eb2e8f9f7 140 volatile uint8_t dummy15[48]; /* */
<> 144:ef7eb2e8f9f7 141 volatile uint32_t REG7_CLEAN_INV_PA; /* REG7_CLEAN_INV_PA */
<> 144:ef7eb2e8f9f7 142 volatile uint8_t dummy16[4]; /* */
<> 144:ef7eb2e8f9f7 143 volatile uint32_t REG7_CLEAN_INV_INDEX; /* REG7_CLEAN_INV_INDEX */
<> 144:ef7eb2e8f9f7 144 volatile uint32_t REG7_CLEAN_INV_WAY; /* REG7_CLEAN_INV_WAY */
<> 144:ef7eb2e8f9f7 145 volatile uint8_t dummy17[256]; /* */
Anna Bridge 181:96ed750bd169 146
<> 144:ef7eb2e8f9f7 147 /* start of struct st_l2c_from_reg9_d_lockdown0 */
<> 144:ef7eb2e8f9f7 148 volatile uint32_t REG9_D_LOCKDOWN0; /* REG9_D_LOCKDOWN0 */
<> 144:ef7eb2e8f9f7 149 volatile uint32_t REG9_I_LOCKDOWN0; /* REG9_I_LOCKDOWN0 */
Anna Bridge 181:96ed750bd169 150
<> 144:ef7eb2e8f9f7 151 /* end of struct st_l2c_from_reg9_d_lockdown0 */
Anna Bridge 181:96ed750bd169 152
<> 144:ef7eb2e8f9f7 153 /* start of struct st_l2c_from_reg9_d_lockdown0 */
<> 144:ef7eb2e8f9f7 154 volatile uint32_t REG9_D_LOCKDOWN1; /* REG9_D_LOCKDOWN1 */
<> 144:ef7eb2e8f9f7 155 volatile uint32_t REG9_I_LOCKDOWN1; /* REG9_I_LOCKDOWN1 */
Anna Bridge 181:96ed750bd169 156
<> 144:ef7eb2e8f9f7 157 /* end of struct st_l2c_from_reg9_d_lockdown0 */
Anna Bridge 181:96ed750bd169 158
<> 144:ef7eb2e8f9f7 159 /* start of struct st_l2c_from_reg9_d_lockdown0 */
<> 144:ef7eb2e8f9f7 160 volatile uint32_t REG9_D_LOCKDOWN2; /* REG9_D_LOCKDOWN2 */
<> 144:ef7eb2e8f9f7 161 volatile uint32_t REG9_I_LOCKDOWN2; /* REG9_I_LOCKDOWN2 */
Anna Bridge 181:96ed750bd169 162
<> 144:ef7eb2e8f9f7 163 /* end of struct st_l2c_from_reg9_d_lockdown0 */
Anna Bridge 181:96ed750bd169 164
<> 144:ef7eb2e8f9f7 165 /* start of struct st_l2c_from_reg9_d_lockdown0 */
<> 144:ef7eb2e8f9f7 166 volatile uint32_t REG9_D_LOCKDOWN3; /* REG9_D_LOCKDOWN3 */
<> 144:ef7eb2e8f9f7 167 volatile uint32_t REG9_I_LOCKDOWN3; /* REG9_I_LOCKDOWN3 */
Anna Bridge 181:96ed750bd169 168
<> 144:ef7eb2e8f9f7 169 /* end of struct st_l2c_from_reg9_d_lockdown0 */
Anna Bridge 181:96ed750bd169 170
<> 144:ef7eb2e8f9f7 171 /* start of struct st_l2c_from_reg9_d_lockdown0 */
<> 144:ef7eb2e8f9f7 172 volatile uint32_t REG9_D_LOCKDOWN4; /* REG9_D_LOCKDOWN4 */
<> 144:ef7eb2e8f9f7 173 volatile uint32_t REG9_I_LOCKDOWN4; /* REG9_I_LOCKDOWN4 */
Anna Bridge 181:96ed750bd169 174
<> 144:ef7eb2e8f9f7 175 /* end of struct st_l2c_from_reg9_d_lockdown0 */
Anna Bridge 181:96ed750bd169 176
<> 144:ef7eb2e8f9f7 177 /* start of struct st_l2c_from_reg9_d_lockdown0 */
<> 144:ef7eb2e8f9f7 178 volatile uint32_t REG9_D_LOCKDOWN5; /* REG9_D_LOCKDOWN5 */
<> 144:ef7eb2e8f9f7 179 volatile uint32_t REG9_I_LOCKDOWN5; /* REG9_I_LOCKDOWN5 */
Anna Bridge 181:96ed750bd169 180
<> 144:ef7eb2e8f9f7 181 /* end of struct st_l2c_from_reg9_d_lockdown0 */
Anna Bridge 181:96ed750bd169 182
<> 144:ef7eb2e8f9f7 183 /* start of struct st_l2c_from_reg9_d_lockdown0 */
<> 144:ef7eb2e8f9f7 184 volatile uint32_t REG9_D_LOCKDOWN6; /* REG9_D_LOCKDOWN6 */
<> 144:ef7eb2e8f9f7 185 volatile uint32_t REG9_I_LOCKDOWN6; /* REG9_I_LOCKDOWN6 */
Anna Bridge 181:96ed750bd169 186
<> 144:ef7eb2e8f9f7 187 /* end of struct st_l2c_from_reg9_d_lockdown0 */
Anna Bridge 181:96ed750bd169 188
<> 144:ef7eb2e8f9f7 189 /* start of struct st_l2c_from_reg9_d_lockdown0 */
<> 144:ef7eb2e8f9f7 190 volatile uint32_t REG9_D_LOCKDOWN7; /* REG9_D_LOCKDOWN7 */
<> 144:ef7eb2e8f9f7 191 volatile uint32_t REG9_I_LOCKDOWN7; /* REG9_I_LOCKDOWN7 */
Anna Bridge 181:96ed750bd169 192
<> 144:ef7eb2e8f9f7 193 /* end of struct st_l2c_from_reg9_d_lockdown0 */
<> 144:ef7eb2e8f9f7 194 volatile uint8_t dummy18[16]; /* */
<> 144:ef7eb2e8f9f7 195 volatile uint32_t REG9_LOCK_LINE_EN; /* REG9_LOCK_LINE_EN */
<> 144:ef7eb2e8f9f7 196 volatile uint32_t REG9_UNLOCK_WAY; /* REG9_UNLOCK_WAY */
<> 144:ef7eb2e8f9f7 197 volatile uint8_t dummy19[680]; /* */
<> 144:ef7eb2e8f9f7 198 volatile uint32_t REG12_ADDR_FILTERING_START; /* REG12_ADDR_FILTERING_START */
<> 144:ef7eb2e8f9f7 199 volatile uint32_t REG12_ADDR_FILTERING_END; /* REG12_ADDR_FILTERING_END */
<> 144:ef7eb2e8f9f7 200 volatile uint8_t dummy20[824]; /* */
<> 144:ef7eb2e8f9f7 201 volatile uint32_t REG15_DEBUG_CTRL; /* REG15_DEBUG_CTRL */
<> 144:ef7eb2e8f9f7 202 volatile uint8_t dummy21[28]; /* */
<> 144:ef7eb2e8f9f7 203 volatile uint32_t REG15_PREFETCH_CTRL; /* REG15_PREFETCH_CTRL */
<> 144:ef7eb2e8f9f7 204 volatile uint8_t dummy22[28]; /* */
<> 144:ef7eb2e8f9f7 205 volatile uint32_t REG15_POWER_CTRL; /* REG15_POWER_CTRL */
Anna Bridge 181:96ed750bd169 206 } r_io_l2c_t;
<> 144:ef7eb2e8f9f7 207
<> 144:ef7eb2e8f9f7 208
Anna Bridge 181:96ed750bd169 209 typedef struct st_l2c_from_reg9_d_lockdown0
Anna Bridge 181:96ed750bd169 210 {
Anna Bridge 181:96ed750bd169 211
Anna Bridge 181:96ed750bd169 212 volatile uint32_t REG9_D_LOCKDOWN0; /* REG9_D_LOCKDOWN0 */
Anna Bridge 181:96ed750bd169 213 volatile uint32_t REG9_I_LOCKDOWN0; /* REG9_I_LOCKDOWN0 */
Anna Bridge 181:96ed750bd169 214 } r_io_l2c_from_reg9_d_lockdown_t /* Short of r_io_l2c_from_reg9_d_lockdown0_t */;
<> 144:ef7eb2e8f9f7 215
<> 144:ef7eb2e8f9f7 216
Anna Bridge 181:96ed750bd169 217 /* Channel array defines of L2C (2)*/
Anna Bridge 181:96ed750bd169 218 #ifdef DECLARE_L2C_FROM_REG9_D_LOCKDOWN0_ARRAY_CHANNELS
Anna Bridge 181:96ed750bd169 219 volatile struct st_l2c_from_reg9_d_lockdown0* L2C_FROM_REG9_D_LOCKDOWN0_ARRAY[ L2C_FROM_REG9_D_LOCKDOWN0_ARRAY_COUNT ] =
Anna Bridge 181:96ed750bd169 220 /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */
Anna Bridge 181:96ed750bd169 221 L2C_FROM_REG9_D_LOCKDOWN0_ARRAY_ADDRESS_LIST;
Anna Bridge 181:96ed750bd169 222 /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */
Anna Bridge 181:96ed750bd169 223 #endif /* DECLARE_L2C_FROM_REG9_D_LOCKDOWN0_ARRAY_CHANNELS */
Anna Bridge 181:96ed750bd169 224 /* End of channel array defines of L2C (2)*/
Anna Bridge 181:96ed750bd169 225
Anna Bridge 181:96ed750bd169 226
<> 144:ef7eb2e8f9f7 227 /* <-SEC M1.10.1 */
Anna Bridge 181:96ed750bd169 228 /* <-MISRA 18.4 */ /* <-SEC M1.6.2 */
Anna Bridge 181:96ed750bd169 229 /* <-QAC 0857 */
Anna Bridge 181:96ed750bd169 230 /* <-QAC 0639 */
<> 144:ef7eb2e8f9f7 231 #endif