z ysaito / USBHost3

2018.07.26

Dependencies:   FATFileSystem3 mbed-rtos

Fork of USBHost by mbed official

USBHost/USBHALHost_RZ_A1.cpp@44:ef52682c423e, 2018-07-26 (annotated)

Committer:
sayzyas
Date:
Thu Jul 26 04:20:29 2018 +0000
Revision:
44:ef52682c423e
Parent:
43:1675750cca08 
2018.07.26;

Who changed what in which revision?

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sayzyas 43:1675750cca08 1 /* mbed USBHost Library
sayzyas 43:1675750cca08 2 * Copyright (c) 2006-2013 ARM Limited
sayzyas 43:1675750cca08 3 *
sayzyas 43:1675750cca08 4 * Licensed under the Apache License, Version 2.0 (the "License");
sayzyas 43:1675750cca08 5 * you may not use this file except in compliance with the License.
sayzyas 43:1675750cca08 6 * You may obtain a copy of the License at
sayzyas 43:1675750cca08 7 *
sayzyas 43:1675750cca08 8 * http://www.apache.org/licenses/LICENSE-2.0
sayzyas 43:1675750cca08 9 *
sayzyas 43:1675750cca08 10 * Unless required by applicable law or agreed to in writing, software
sayzyas 43:1675750cca08 11 * distributed under the License is distributed on an "AS IS" BASIS,
sayzyas 43:1675750cca08 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sayzyas 43:1675750cca08 13 * See the License for the specific language governing permissions and
sayzyas 43:1675750cca08 14 * limitations under the License.
sayzyas 43:1675750cca08 15 */
sayzyas 43:1675750cca08 16
sayzyas 43:1675750cca08 17 #if defined(TARGET_RZ_A1H)
sayzyas 43:1675750cca08 18
sayzyas 43:1675750cca08 19 #include "mbed.h"
sayzyas 43:1675750cca08 20 #include "USBHALHost.h"
sayzyas 43:1675750cca08 21 #include "dbg.h"
sayzyas 43:1675750cca08 22
sayzyas 43:1675750cca08 23 #include "ohci_wrapp_RZ_A1.h"
sayzyas 43:1675750cca08 24
sayzyas 43:1675750cca08 25
sayzyas 43:1675750cca08 26 #define HCCA_SIZE sizeof(HCCA)
sayzyas 43:1675750cca08 27 #define ED_SIZE sizeof(HCED)
sayzyas 43:1675750cca08 28 #define TD_SIZE sizeof(HCTD)
sayzyas 43:1675750cca08 29
sayzyas 43:1675750cca08 30 #define TOTAL_SIZE (HCCA_SIZE + (MAX_ENDPOINT*ED_SIZE) + (MAX_TD*TD_SIZE))
sayzyas 43:1675750cca08 31 #define ALIGNE_MSK (0x0000000F)
sayzyas 43:1675750cca08 32
sayzyas 43:1675750cca08 33 static volatile uint8_t usb_buf[TOTAL_SIZE + ALIGNE_MSK]; //16 bytes aligned!
sayzyas 43:1675750cca08 34
sayzyas 43:1675750cca08 35 USBHALHost * USBHALHost::instHost;
sayzyas 43:1675750cca08 36
sayzyas 43:1675750cca08 37 USBHALHost::USBHALHost() {
sayzyas 43:1675750cca08 38 instHost = this;
sayzyas 43:1675750cca08 39 memInit();
sayzyas 43:1675750cca08 40 memset((void*)usb_hcca, 0, HCCA_SIZE);
sayzyas 43:1675750cca08 41 for (int i = 0; i < MAX_ENDPOINT; i++) {
sayzyas 43:1675750cca08 42 edBufAlloc[i] = false;
sayzyas 43:1675750cca08 43 }
sayzyas 43:1675750cca08 44 for (int i = 0; i < MAX_TD; i++) {
sayzyas 43:1675750cca08 45 tdBufAlloc[i] = false;
sayzyas 43:1675750cca08 46 }
sayzyas 43:1675750cca08 47 }
sayzyas 43:1675750cca08 48
sayzyas 43:1675750cca08 49 void USBHALHost::init() {
sayzyas 43:1675750cca08 50 ohciwrapp_init(&_usbisr);
sayzyas 43:1675750cca08 51
sayzyas 43:1675750cca08 52 ohciwrapp_reg_w(OHCI_REG_CONTROL, 1); // HARDWARE RESET
sayzyas 43:1675750cca08 53 ohciwrapp_reg_w(OHCI_REG_CONTROLHEADED, 0); // Initialize Control list head to Zero
sayzyas 43:1675750cca08 54 ohciwrapp_reg_w(OHCI_REG_BULKHEADED, 0); // Initialize Bulk list head to Zero
sayzyas 43:1675750cca08 55
sayzyas 43:1675750cca08 56 // Wait 100 ms before apply reset
sayzyas 43:1675750cca08 57 wait_ms(100);
sayzyas 43:1675750cca08 58
sayzyas 43:1675750cca08 59 // software reset
sayzyas 43:1675750cca08 60 ohciwrapp_reg_w(OHCI_REG_COMMANDSTATUS, OR_CMD_STATUS_HCR);
sayzyas 43:1675750cca08 61
sayzyas 43:1675750cca08 62 // Write Fm Interval and Largest Data Packet Counter
sayzyas 43:1675750cca08 63 ohciwrapp_reg_w(OHCI_REG_FMINTERVAL, DEFAULT_FMINTERVAL);
sayzyas 43:1675750cca08 64 ohciwrapp_reg_w(OHCI_REG_PERIODICSTART, FI * 90 / 100);
sayzyas 43:1675750cca08 65
sayzyas 43:1675750cca08 66 // Put HC in operational state
sayzyas 43:1675750cca08 67 ohciwrapp_reg_w(OHCI_REG_CONTROL, (ohciwrapp_reg_r(OHCI_REG_CONTROL) & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER);
sayzyas 43:1675750cca08 68 // Set Global Power
sayzyas 43:1675750cca08 69 ohciwrapp_reg_w(OHCI_REG_RHSTATUS, OR_RH_STATUS_LPSC);
sayzyas 43:1675750cca08 70
sayzyas 43:1675750cca08 71 ohciwrapp_reg_w(OHCI_REG_HCCA, (uint32_t)(usb_hcca));
sayzyas 43:1675750cca08 72
sayzyas 43:1675750cca08 73 // Clear Interrrupt Status
sayzyas 43:1675750cca08 74 ohciwrapp_reg_w(OHCI_REG_INTERRUPTSTATUS, ohciwrapp_reg_r(OHCI_REG_INTERRUPTSTATUS));
sayzyas 43:1675750cca08 75
sayzyas 43:1675750cca08 76 ohciwrapp_reg_w(OHCI_REG_INTERRUPTENABLE, OR_INTR_ENABLE_MIE | OR_INTR_ENABLE_WDH | OR_INTR_ENABLE_RHSC);
sayzyas 43:1675750cca08 77
sayzyas 43:1675750cca08 78 // Enable the USB Interrupt
sayzyas 43:1675750cca08 79 ohciwrapp_reg_w(OHCI_REG_RHPORTSTATUS1, OR_RH_PORT_CSC);
sayzyas 43:1675750cca08 80 ohciwrapp_reg_w(OHCI_REG_RHPORTSTATUS1, OR_RH_PORT_PRSC);
sayzyas 43:1675750cca08 81
sayzyas 43:1675750cca08 82 // Check for any connected devices
sayzyas 43:1675750cca08 83 if (ohciwrapp_reg_r(OHCI_REG_RHPORTSTATUS1) & OR_RH_PORT_CCS) {
sayzyas 43:1675750cca08 84 //Device connected
sayzyas 43:1675750cca08 85 wait_ms(150);
sayzyas 43:1675750cca08 86 USB_DBG("Device connected (%08x)\n\r", ohciwrapp_reg_r(OHCI_REG_RHPORTSTATUS1));
sayzyas 43:1675750cca08 87 deviceConnected(0, 1, ohciwrapp_reg_r(OHCI_REG_RHPORTSTATUS1) & OR_RH_PORT_LSDA);
sayzyas 43:1675750cca08 88 }
sayzyas 43:1675750cca08 89 }
sayzyas 43:1675750cca08 90
sayzyas 43:1675750cca08 91 uint32_t USBHALHost::controlHeadED() {
sayzyas 43:1675750cca08 92 return ohciwrapp_reg_r(OHCI_REG_CONTROLHEADED);
sayzyas 43:1675750cca08 93 }
sayzyas 43:1675750cca08 94
sayzyas 43:1675750cca08 95 uint32_t USBHALHost::bulkHeadED() {
sayzyas 43:1675750cca08 96 return ohciwrapp_reg_r(OHCI_REG_BULKHEADED);
sayzyas 43:1675750cca08 97 }
sayzyas 43:1675750cca08 98
sayzyas 43:1675750cca08 99 uint32_t USBHALHost::interruptHeadED() {
sayzyas 43:1675750cca08 100 return usb_hcca->IntTable[0];
sayzyas 43:1675750cca08 101 }
sayzyas 43:1675750cca08 102
sayzyas 43:1675750cca08 103 void USBHALHost::updateBulkHeadED(uint32_t addr) {
sayzyas 43:1675750cca08 104 ohciwrapp_reg_w(OHCI_REG_BULKHEADED, addr);
sayzyas 43:1675750cca08 105 }
sayzyas 43:1675750cca08 106
sayzyas 43:1675750cca08 107
sayzyas 43:1675750cca08 108 void USBHALHost::updateControlHeadED(uint32_t addr) {
sayzyas 43:1675750cca08 109 ohciwrapp_reg_w(OHCI_REG_CONTROLHEADED, addr);
sayzyas 43:1675750cca08 110 }
sayzyas 43:1675750cca08 111
sayzyas 43:1675750cca08 112 void USBHALHost::updateInterruptHeadED(uint32_t addr) {
sayzyas 43:1675750cca08 113 usb_hcca->IntTable[0] = addr;
sayzyas 43:1675750cca08 114 }
sayzyas 43:1675750cca08 115
sayzyas 43:1675750cca08 116
sayzyas 43:1675750cca08 117 void USBHALHost::enableList(ENDPOINT_TYPE type) {
sayzyas 43:1675750cca08 118 uint32_t wk_data;
sayzyas 43:1675750cca08 119
sayzyas 43:1675750cca08 120 switch(type) {
sayzyas 43:1675750cca08 121 case CONTROL_ENDPOINT:
sayzyas 43:1675750cca08 122 ohciwrapp_reg_w(OHCI_REG_COMMANDSTATUS, OR_CMD_STATUS_CLF);
sayzyas 43:1675750cca08 123 wk_data = (ohciwrapp_reg_r(OHCI_REG_CONTROL) | OR_CONTROL_CLE);
sayzyas 43:1675750cca08 124 ohciwrapp_reg_w(OHCI_REG_CONTROL, wk_data);
sayzyas 43:1675750cca08 125 break;
sayzyas 43:1675750cca08 126 case ISOCHRONOUS_ENDPOINT:
sayzyas 43:1675750cca08 127 break;
sayzyas 43:1675750cca08 128 case BULK_ENDPOINT:
sayzyas 43:1675750cca08 129 ohciwrapp_reg_w(OHCI_REG_COMMANDSTATUS, OR_CMD_STATUS_BLF);
sayzyas 43:1675750cca08 130 wk_data = (ohciwrapp_reg_r(OHCI_REG_CONTROL) | OR_CONTROL_BLE);
sayzyas 43:1675750cca08 131 ohciwrapp_reg_w(OHCI_REG_CONTROL, wk_data);
sayzyas 43:1675750cca08 132 break;
sayzyas 43:1675750cca08 133 case INTERRUPT_ENDPOINT:
sayzyas 43:1675750cca08 134 wk_data = (ohciwrapp_reg_r(OHCI_REG_CONTROL) | OR_CONTROL_PLE);
sayzyas 43:1675750cca08 135 ohciwrapp_reg_w(OHCI_REG_CONTROL, wk_data);
sayzyas 43:1675750cca08 136 break;
sayzyas 43:1675750cca08 137 }
sayzyas 43:1675750cca08 138 }
sayzyas 43:1675750cca08 139
sayzyas 43:1675750cca08 140
sayzyas 43:1675750cca08 141 bool USBHALHost::disableList(ENDPOINT_TYPE type) {
sayzyas 43:1675750cca08 142 uint32_t wk_data;
sayzyas 43:1675750cca08 143
sayzyas 43:1675750cca08 144 switch(type) {
sayzyas 43:1675750cca08 145 case CONTROL_ENDPOINT:
sayzyas 43:1675750cca08 146 wk_data = ohciwrapp_reg_r(OHCI_REG_CONTROL);
sayzyas 43:1675750cca08 147 if(wk_data & OR_CONTROL_CLE) {
sayzyas 43:1675750cca08 148 wk_data &= ~OR_CONTROL_CLE;
sayzyas 43:1675750cca08 149 ohciwrapp_reg_w(OHCI_REG_CONTROL, wk_data);
sayzyas 43:1675750cca08 150 return true;
sayzyas 43:1675750cca08 151 }
sayzyas 43:1675750cca08 152 return false;
sayzyas 43:1675750cca08 153 case ISOCHRONOUS_ENDPOINT:
sayzyas 43:1675750cca08 154 return false;
sayzyas 43:1675750cca08 155 case BULK_ENDPOINT:
sayzyas 43:1675750cca08 156 wk_data = ohciwrapp_reg_r(OHCI_REG_CONTROL);
sayzyas 43:1675750cca08 157 if(wk_data & OR_CONTROL_BLE) {
sayzyas 43:1675750cca08 158 wk_data &= ~OR_CONTROL_BLE;
sayzyas 43:1675750cca08 159 ohciwrapp_reg_w(OHCI_REG_CONTROL, wk_data);
sayzyas 43:1675750cca08 160 return true;
sayzyas 43:1675750cca08 161 }
sayzyas 43:1675750cca08 162 return false;
sayzyas 43:1675750cca08 163 case INTERRUPT_ENDPOINT:
sayzyas 43:1675750cca08 164 wk_data = ohciwrapp_reg_r(OHCI_REG_CONTROL);
sayzyas 43:1675750cca08 165 if(wk_data & OR_CONTROL_PLE) {
sayzyas 43:1675750cca08 166 wk_data &= ~OR_CONTROL_PLE;
sayzyas 43:1675750cca08 167 ohciwrapp_reg_w(OHCI_REG_CONTROL, wk_data);
sayzyas 43:1675750cca08 168 return true;
sayzyas 43:1675750cca08 169 }
sayzyas 43:1675750cca08 170 return false;
sayzyas 43:1675750cca08 171 }
sayzyas 43:1675750cca08 172 return false;
sayzyas 43:1675750cca08 173 }
sayzyas 43:1675750cca08 174
sayzyas 43:1675750cca08 175
sayzyas 43:1675750cca08 176 void USBHALHost::memInit() {
sayzyas 43:1675750cca08 177 volatile uint8_t *p_wk_buf = (uint8_t *)(((uint32_t)usb_buf + ALIGNE_MSK) & ~ALIGNE_MSK);
sayzyas 43:1675750cca08 178
sayzyas 43:1675750cca08 179 usb_hcca = (volatile HCCA *)p_wk_buf;
sayzyas 43:1675750cca08 180 usb_edBuf = (volatile uint8_t *)(p_wk_buf + HCCA_SIZE);
sayzyas 43:1675750cca08 181 usb_tdBuf = (volatile uint8_t *)(p_wk_buf + HCCA_SIZE + (MAX_ENDPOINT*ED_SIZE));
sayzyas 43:1675750cca08 182 }
sayzyas 43:1675750cca08 183
sayzyas 43:1675750cca08 184 volatile uint8_t * USBHALHost::getED() {
sayzyas 43:1675750cca08 185 for (int i = 0; i < MAX_ENDPOINT; i++) {
sayzyas 43:1675750cca08 186 if ( !edBufAlloc[i] ) {
sayzyas 43:1675750cca08 187 edBufAlloc[i] = true;
sayzyas 43:1675750cca08 188 return (volatile uint8_t *)(usb_edBuf + i*ED_SIZE);
sayzyas 43:1675750cca08 189 }
sayzyas 43:1675750cca08 190 }
sayzyas 43:1675750cca08 191 perror("Could not allocate ED\r\n");
sayzyas 43:1675750cca08 192 return NULL; //Could not alloc ED
sayzyas 43:1675750cca08 193 }
sayzyas 43:1675750cca08 194
sayzyas 43:1675750cca08 195 volatile uint8_t * USBHALHost::getTD() {
sayzyas 43:1675750cca08 196 int i;
sayzyas 43:1675750cca08 197 for (i = 0; i < MAX_TD; i++) {
sayzyas 43:1675750cca08 198 if ( !tdBufAlloc[i] ) {
sayzyas 43:1675750cca08 199 tdBufAlloc[i] = true;
sayzyas 43:1675750cca08 200 return (volatile uint8_t *)(usb_tdBuf + i*TD_SIZE);
sayzyas 43:1675750cca08 201 }
sayzyas 43:1675750cca08 202 }
sayzyas 43:1675750cca08 203 perror("Could not allocate TD\r\n");
sayzyas 43:1675750cca08 204 return NULL; //Could not alloc TD
sayzyas 43:1675750cca08 205 }
sayzyas 43:1675750cca08 206
sayzyas 43:1675750cca08 207
sayzyas 43:1675750cca08 208 void USBHALHost::freeED(volatile uint8_t * ed) {
sayzyas 43:1675750cca08 209 int i;
sayzyas 43:1675750cca08 210 i = (ed - usb_edBuf) / ED_SIZE;
sayzyas 43:1675750cca08 211 edBufAlloc[i] = false;
sayzyas 43:1675750cca08 212 }
sayzyas 43:1675750cca08 213
sayzyas 43:1675750cca08 214 void USBHALHost::freeTD(volatile uint8_t * td) {
sayzyas 43:1675750cca08 215 int i;
sayzyas 43:1675750cca08 216 i = (td - usb_tdBuf) / TD_SIZE;
sayzyas 43:1675750cca08 217 tdBufAlloc[i] = false;
sayzyas 43:1675750cca08 218 }
sayzyas 43:1675750cca08 219
sayzyas 43:1675750cca08 220
sayzyas 43:1675750cca08 221 void USBHALHost::resetRootHub() {
sayzyas 43:1675750cca08 222 // Initiate port reset
sayzyas 43:1675750cca08 223 ohciwrapp_reg_w(OHCI_REG_RHPORTSTATUS1, OR_RH_PORT_PRS);
sayzyas 43:1675750cca08 224
sayzyas 43:1675750cca08 225 while (ohciwrapp_reg_r(OHCI_REG_RHPORTSTATUS1) & OR_RH_PORT_PRS);
sayzyas 43:1675750cca08 226
sayzyas 43:1675750cca08 227 // ...and clear port reset signal
sayzyas 43:1675750cca08 228 ohciwrapp_reg_w(OHCI_REG_RHPORTSTATUS1, OR_RH_PORT_PRSC);
sayzyas 43:1675750cca08 229 }
sayzyas 43:1675750cca08 230
sayzyas 43:1675750cca08 231
sayzyas 43:1675750cca08 232 void USBHALHost::_usbisr(void) {
sayzyas 43:1675750cca08 233 if (instHost) {
sayzyas 43:1675750cca08 234 instHost->UsbIrqhandler();
sayzyas 43:1675750cca08 235 }
sayzyas 43:1675750cca08 236 }
sayzyas 43:1675750cca08 237
sayzyas 43:1675750cca08 238 void USBHALHost::UsbIrqhandler() {
sayzyas 43:1675750cca08 239 uint32_t int_status = ohciwrapp_reg_r(OHCI_REG_INTERRUPTSTATUS) & ohciwrapp_reg_r(OHCI_REG_INTERRUPTENABLE);
sayzyas 43:1675750cca08 240 uint32_t data;
sayzyas 43:1675750cca08 241
sayzyas 43:1675750cca08 242 if (int_status != 0) { //Is there something to actually process?
sayzyas 43:1675750cca08 243 // Root hub status change interrupt
sayzyas 43:1675750cca08 244 if (int_status & OR_INTR_STATUS_RHSC) {
sayzyas 43:1675750cca08 245 if (ohciwrapp_reg_r(OHCI_REG_RHPORTSTATUS1) & OR_RH_PORT_CSC) {
sayzyas 43:1675750cca08 246 if (ohciwrapp_reg_r(OHCI_REG_RHSTATUS) & OR_RH_STATUS_DRWE) {
sayzyas 43:1675750cca08 247 // When DRWE is on, Connect Status Change
sayzyas 43:1675750cca08 248 // means a remote wakeup event.
sayzyas 43:1675750cca08 249 } else {
sayzyas 43:1675750cca08 250
sayzyas 43:1675750cca08 251 //Root device connected
sayzyas 43:1675750cca08 252 if (ohciwrapp_reg_r(OHCI_REG_RHPORTSTATUS1) & OR_RH_PORT_CCS) {
sayzyas 43:1675750cca08 253
sayzyas 43:1675750cca08 254 // wait 150ms to avoid bounce
sayzyas 43:1675750cca08 255 wait_ms(150);
sayzyas 43:1675750cca08 256
sayzyas 43:1675750cca08 257 //Hub 0 (root hub), Port 1 (count starts at 1), Low or High speed
sayzyas 43:1675750cca08 258 data = ohciwrapp_reg_r(OHCI_REG_RHPORTSTATUS1) & OR_RH_PORT_LSDA;
sayzyas 43:1675750cca08 259 deviceConnected(0, 1, data);
sayzyas 43:1675750cca08 260 }
sayzyas 43:1675750cca08 261
sayzyas 43:1675750cca08 262 //Root device disconnected
sayzyas 43:1675750cca08 263 else {
sayzyas 43:1675750cca08 264
sayzyas 43:1675750cca08 265 if (!(int_status & OR_INTR_STATUS_WDH)) {
sayzyas 43:1675750cca08 266 usb_hcca->DoneHead = 0;
sayzyas 43:1675750cca08 267 }
sayzyas 43:1675750cca08 268
sayzyas 43:1675750cca08 269 deviceDisconnected(0, 1, NULL, usb_hcca->DoneHead & 0xFFFFFFFE);
sayzyas 43:1675750cca08 270
sayzyas 43:1675750cca08 271 if (int_status & OR_INTR_STATUS_WDH) {
sayzyas 43:1675750cca08 272 usb_hcca->DoneHead = 0;
sayzyas 43:1675750cca08 273 ohciwrapp_reg_w(OHCI_REG_INTERRUPTSTATUS, OR_INTR_STATUS_WDH);
sayzyas 43:1675750cca08 274 }
sayzyas 43:1675750cca08 275 }
sayzyas 43:1675750cca08 276 }
sayzyas 43:1675750cca08 277 ohciwrapp_reg_w(OHCI_REG_RHPORTSTATUS1, OR_RH_PORT_CSC);
sayzyas 43:1675750cca08 278 }
sayzyas 43:1675750cca08 279 if (ohciwrapp_reg_r(OHCI_REG_RHPORTSTATUS1) & OR_RH_PORT_PRSC) {
sayzyas 43:1675750cca08 280 ohciwrapp_reg_w(OHCI_REG_RHPORTSTATUS1, OR_RH_PORT_PRSC);
sayzyas 43:1675750cca08 281 }
sayzyas 43:1675750cca08 282 ohciwrapp_reg_w(OHCI_REG_INTERRUPTSTATUS, OR_INTR_STATUS_RHSC);
sayzyas 43:1675750cca08 283 }
sayzyas 43:1675750cca08 284
sayzyas 43:1675750cca08 285 // Writeback Done Head interrupt
sayzyas 43:1675750cca08 286 if (int_status & OR_INTR_STATUS_WDH) {
sayzyas 43:1675750cca08 287 transferCompleted(usb_hcca->DoneHead & 0xFFFFFFFE);
sayzyas 43:1675750cca08 288 ohciwrapp_reg_w(OHCI_REG_INTERRUPTSTATUS, OR_INTR_STATUS_WDH);
sayzyas 43:1675750cca08 289 }
sayzyas 43:1675750cca08 290 }
sayzyas 43:1675750cca08 291 }
sayzyas 43:1675750cca08 292 #endif