z ysaito / USBHost3

2018.07.26

Dependencies:   FATFileSystem3 mbed-rtos

Fork of USBHost by mbed official

USBHost/USBHALHost_LPC17.cpp@43:1675750cca08, 2018-07-26 (annotated)

Committer:
sayzyas
Date:
Thu Jul 26 00:20:32 2018 +0000
Revision:
43:1675750cca08
2018.07.26

Who changed what in which revision?

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sayzyas 43:1675750cca08 1 /* mbed USBHost Library
sayzyas 43:1675750cca08 2 * Copyright (c) 2006-2013 ARM Limited
sayzyas 43:1675750cca08 3 *
sayzyas 43:1675750cca08 4 * Licensed under the Apache License, Version 2.0 (the "License");
sayzyas 43:1675750cca08 5 * you may not use this file except in compliance with the License.
sayzyas 43:1675750cca08 6 * You may obtain a copy of the License at
sayzyas 43:1675750cca08 7 *
sayzyas 43:1675750cca08 8 * http://www.apache.org/licenses/LICENSE-2.0
sayzyas 43:1675750cca08 9 *
sayzyas 43:1675750cca08 10 * Unless required by applicable law or agreed to in writing, software
sayzyas 43:1675750cca08 11 * distributed under the License is distributed on an "AS IS" BASIS,
sayzyas 43:1675750cca08 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sayzyas 43:1675750cca08 13 * See the License for the specific language governing permissions and
sayzyas 43:1675750cca08 14 * limitations under the License.
sayzyas 43:1675750cca08 15 */
sayzyas 43:1675750cca08 16
sayzyas 43:1675750cca08 17 #if defined(TARGET_LPC1768) || defined(TARGET_LPC2460)
sayzyas 43:1675750cca08 18
sayzyas 43:1675750cca08 19 #include "mbed.h"
sayzyas 43:1675750cca08 20 #include "USBHALHost.h"
sayzyas 43:1675750cca08 21 #include "dbg.h"
sayzyas 43:1675750cca08 22
sayzyas 43:1675750cca08 23 // bits of the USB/OTG clock control register
sayzyas 43:1675750cca08 24 #define HOST_CLK_EN (1<<0)
sayzyas 43:1675750cca08 25 #define DEV_CLK_EN (1<<1)
sayzyas 43:1675750cca08 26 #define PORTSEL_CLK_EN (1<<3)
sayzyas 43:1675750cca08 27 #define AHB_CLK_EN (1<<4)
sayzyas 43:1675750cca08 28
sayzyas 43:1675750cca08 29 // bits of the USB/OTG clock status register
sayzyas 43:1675750cca08 30 #define HOST_CLK_ON (1<<0)
sayzyas 43:1675750cca08 31 #define DEV_CLK_ON (1<<1)
sayzyas 43:1675750cca08 32 #define PORTSEL_CLK_ON (1<<3)
sayzyas 43:1675750cca08 33 #define AHB_CLK_ON (1<<4)
sayzyas 43:1675750cca08 34
sayzyas 43:1675750cca08 35 // we need host clock, OTG/portsel clock and AHB clock
sayzyas 43:1675750cca08 36 #define CLOCK_MASK (HOST_CLK_EN | PORTSEL_CLK_EN | AHB_CLK_EN)
sayzyas 43:1675750cca08 37
sayzyas 43:1675750cca08 38 #define HCCA_SIZE sizeof(HCCA)
sayzyas 43:1675750cca08 39 #define ED_SIZE sizeof(HCED)
sayzyas 43:1675750cca08 40 #define TD_SIZE sizeof(HCTD)
sayzyas 43:1675750cca08 41
sayzyas 43:1675750cca08 42 #define TOTAL_SIZE (HCCA_SIZE + (MAX_ENDPOINT*ED_SIZE) + (MAX_TD*TD_SIZE))
sayzyas 43:1675750cca08 43
sayzyas 43:1675750cca08 44 static volatile uint8_t usb_buf[TOTAL_SIZE] __attribute((section("AHBSRAM1"),aligned(256))); //256 bytes aligned!
sayzyas 43:1675750cca08 45
sayzyas 43:1675750cca08 46 USBHALHost * USBHALHost::instHost;
sayzyas 43:1675750cca08 47
sayzyas 43:1675750cca08 48 USBHALHost::USBHALHost() {
sayzyas 43:1675750cca08 49 instHost = this;
sayzyas 43:1675750cca08 50 memInit();
sayzyas 43:1675750cca08 51 memset((void*)usb_hcca, 0, HCCA_SIZE);
sayzyas 43:1675750cca08 52 for (int i = 0; i < MAX_ENDPOINT; i++) {
sayzyas 43:1675750cca08 53 edBufAlloc[i] = false;
sayzyas 43:1675750cca08 54 }
sayzyas 43:1675750cca08 55 for (int i = 0; i < MAX_TD; i++) {
sayzyas 43:1675750cca08 56 tdBufAlloc[i] = false;
sayzyas 43:1675750cca08 57 }
sayzyas 43:1675750cca08 58 }
sayzyas 43:1675750cca08 59
sayzyas 43:1675750cca08 60 void USBHALHost::init() {
sayzyas 43:1675750cca08 61 NVIC_DisableIRQ(USB_IRQn);
sayzyas 43:1675750cca08 62
sayzyas 43:1675750cca08 63 //Cut power
sayzyas 43:1675750cca08 64 LPC_SC->PCONP &= ~(1UL<<31);
sayzyas 43:1675750cca08 65 wait_ms(100);
sayzyas 43:1675750cca08 66
sayzyas 43:1675750cca08 67 // turn on power for USB
sayzyas 43:1675750cca08 68 LPC_SC->PCONP |= (1UL<<31);
sayzyas 43:1675750cca08 69
sayzyas 43:1675750cca08 70 // Enable USB host clock, port selection and AHB clock
sayzyas 43:1675750cca08 71 LPC_USB->USBClkCtrl |= CLOCK_MASK;
sayzyas 43:1675750cca08 72
sayzyas 43:1675750cca08 73 // Wait for clocks to become available
sayzyas 43:1675750cca08 74 while ((LPC_USB->USBClkSt & CLOCK_MASK) != CLOCK_MASK);
sayzyas 43:1675750cca08 75
sayzyas 43:1675750cca08 76 // it seems the bits[0:1] mean the following
sayzyas 43:1675750cca08 77 // 0: U1=device, U2=host
sayzyas 43:1675750cca08 78 // 1: U1=host, U2=host
sayzyas 43:1675750cca08 79 // 2: reserved
sayzyas 43:1675750cca08 80 // 3: U1=host, U2=device
sayzyas 43:1675750cca08 81 // NB: this register is only available if OTG clock (aka "port select") is enabled!!
sayzyas 43:1675750cca08 82 // since we don't care about port 2, set just bit 0 to 1 (U1=host)
sayzyas 43:1675750cca08 83 LPC_USB->OTGStCtrl |= 1;
sayzyas 43:1675750cca08 84
sayzyas 43:1675750cca08 85 // now that we've configured the ports, we can turn off the portsel clock
sayzyas 43:1675750cca08 86 LPC_USB->USBClkCtrl &= ~PORTSEL_CLK_EN;
sayzyas 43:1675750cca08 87
sayzyas 43:1675750cca08 88 // configure USB D+/D- pins
sayzyas 43:1675750cca08 89 // P0[29] = USB_D+, 01
sayzyas 43:1675750cca08 90 // P0[30] = USB_D-, 01
sayzyas 43:1675750cca08 91 LPC_PINCON->PINSEL1 &= ~((3<<26) | (3<<28));
sayzyas 43:1675750cca08 92 LPC_PINCON->PINSEL1 |= ((1<<26) | (1<<28));
sayzyas 43:1675750cca08 93
sayzyas 43:1675750cca08 94 LPC_USB->HcControl = 0; // HARDWARE RESET
sayzyas 43:1675750cca08 95 LPC_USB->HcControlHeadED = 0; // Initialize Control list head to Zero
sayzyas 43:1675750cca08 96 LPC_USB->HcBulkHeadED = 0; // Initialize Bulk list head to Zero
sayzyas 43:1675750cca08 97
sayzyas 43:1675750cca08 98 // Wait 100 ms before apply reset
sayzyas 43:1675750cca08 99 wait_ms(100);
sayzyas 43:1675750cca08 100
sayzyas 43:1675750cca08 101 // software reset
sayzyas 43:1675750cca08 102 LPC_USB->HcCommandStatus = OR_CMD_STATUS_HCR;
sayzyas 43:1675750cca08 103
sayzyas 43:1675750cca08 104 // Write Fm Interval and Largest Data Packet Counter
sayzyas 43:1675750cca08 105 LPC_USB->HcFmInterval = DEFAULT_FMINTERVAL;
sayzyas 43:1675750cca08 106 LPC_USB->HcPeriodicStart = FI * 90 / 100;
sayzyas 43:1675750cca08 107
sayzyas 43:1675750cca08 108 // Put HC in operational state
sayzyas 43:1675750cca08 109 LPC_USB->HcControl = (LPC_USB->HcControl & (~OR_CONTROL_HCFS)) | OR_CONTROL_HC_OPER;
sayzyas 43:1675750cca08 110 // Set Global Power
sayzyas 43:1675750cca08 111 LPC_USB->HcRhStatus = OR_RH_STATUS_LPSC;
sayzyas 43:1675750cca08 112
sayzyas 43:1675750cca08 113 LPC_USB->HcHCCA = (uint32_t)(usb_hcca);
sayzyas 43:1675750cca08 114
sayzyas 43:1675750cca08 115 // Clear Interrrupt Status
sayzyas 43:1675750cca08 116 LPC_USB->HcInterruptStatus |= LPC_USB->HcInterruptStatus;
sayzyas 43:1675750cca08 117
sayzyas 43:1675750cca08 118 LPC_USB->HcInterruptEnable = OR_INTR_ENABLE_MIE | OR_INTR_ENABLE_WDH | OR_INTR_ENABLE_RHSC;
sayzyas 43:1675750cca08 119
sayzyas 43:1675750cca08 120 // Enable the USB Interrupt
sayzyas 43:1675750cca08 121 NVIC_SetVector(USB_IRQn, (uint32_t)(_usbisr));
sayzyas 43:1675750cca08 122 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC;
sayzyas 43:1675750cca08 123 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
sayzyas 43:1675750cca08 124
sayzyas 43:1675750cca08 125 NVIC_EnableIRQ(USB_IRQn);
sayzyas 43:1675750cca08 126
sayzyas 43:1675750cca08 127 // Check for any connected devices
sayzyas 43:1675750cca08 128 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) {
sayzyas 43:1675750cca08 129 //Device connected
sayzyas 43:1675750cca08 130 wait_ms(150);
sayzyas 43:1675750cca08 131 USB_DBG("Device connected (%08x)\n\r", LPC_USB->HcRhPortStatus1);
sayzyas 43:1675750cca08 132 deviceConnected(0, 1, LPC_USB->HcRhPortStatus1 & OR_RH_PORT_LSDA);
sayzyas 43:1675750cca08 133 }
sayzyas 43:1675750cca08 134 }
sayzyas 43:1675750cca08 135
sayzyas 43:1675750cca08 136 uint32_t USBHALHost::controlHeadED() {
sayzyas 43:1675750cca08 137 return LPC_USB->HcControlHeadED;
sayzyas 43:1675750cca08 138 }
sayzyas 43:1675750cca08 139
sayzyas 43:1675750cca08 140 uint32_t USBHALHost::bulkHeadED() {
sayzyas 43:1675750cca08 141 return LPC_USB->HcBulkHeadED;
sayzyas 43:1675750cca08 142 }
sayzyas 43:1675750cca08 143
sayzyas 43:1675750cca08 144 uint32_t USBHALHost::interruptHeadED() {
sayzyas 43:1675750cca08 145 return usb_hcca->IntTable[0];
sayzyas 43:1675750cca08 146 }
sayzyas 43:1675750cca08 147
sayzyas 43:1675750cca08 148 void USBHALHost::updateBulkHeadED(uint32_t addr) {
sayzyas 43:1675750cca08 149 LPC_USB->HcBulkHeadED = addr;
sayzyas 43:1675750cca08 150 }
sayzyas 43:1675750cca08 151
sayzyas 43:1675750cca08 152
sayzyas 43:1675750cca08 153 void USBHALHost::updateControlHeadED(uint32_t addr) {
sayzyas 43:1675750cca08 154 LPC_USB->HcControlHeadED = addr;
sayzyas 43:1675750cca08 155 }
sayzyas 43:1675750cca08 156
sayzyas 43:1675750cca08 157 void USBHALHost::updateInterruptHeadED(uint32_t addr) {
sayzyas 43:1675750cca08 158 usb_hcca->IntTable[0] = addr;
sayzyas 43:1675750cca08 159 }
sayzyas 43:1675750cca08 160
sayzyas 43:1675750cca08 161
sayzyas 43:1675750cca08 162 void USBHALHost::enableList(ENDPOINT_TYPE type) {
sayzyas 43:1675750cca08 163 switch(type) {
sayzyas 43:1675750cca08 164 case CONTROL_ENDPOINT:
sayzyas 43:1675750cca08 165 LPC_USB->HcCommandStatus = OR_CMD_STATUS_CLF;
sayzyas 43:1675750cca08 166 LPC_USB->HcControl |= OR_CONTROL_CLE;
sayzyas 43:1675750cca08 167 break;
sayzyas 43:1675750cca08 168 case ISOCHRONOUS_ENDPOINT:
sayzyas 43:1675750cca08 169 break;
sayzyas 43:1675750cca08 170 case BULK_ENDPOINT:
sayzyas 43:1675750cca08 171 LPC_USB->HcCommandStatus = OR_CMD_STATUS_BLF;
sayzyas 43:1675750cca08 172 LPC_USB->HcControl |= OR_CONTROL_BLE;
sayzyas 43:1675750cca08 173 break;
sayzyas 43:1675750cca08 174 case INTERRUPT_ENDPOINT:
sayzyas 43:1675750cca08 175 LPC_USB->HcControl |= OR_CONTROL_PLE;
sayzyas 43:1675750cca08 176 break;
sayzyas 43:1675750cca08 177 }
sayzyas 43:1675750cca08 178 }
sayzyas 43:1675750cca08 179
sayzyas 43:1675750cca08 180
sayzyas 43:1675750cca08 181 bool USBHALHost::disableList(ENDPOINT_TYPE type) {
sayzyas 43:1675750cca08 182 switch(type) {
sayzyas 43:1675750cca08 183 case CONTROL_ENDPOINT:
sayzyas 43:1675750cca08 184 if(LPC_USB->HcControl & OR_CONTROL_CLE) {
sayzyas 43:1675750cca08 185 LPC_USB->HcControl &= ~OR_CONTROL_CLE;
sayzyas 43:1675750cca08 186 return true;
sayzyas 43:1675750cca08 187 }
sayzyas 43:1675750cca08 188 return false;
sayzyas 43:1675750cca08 189 case ISOCHRONOUS_ENDPOINT:
sayzyas 43:1675750cca08 190 return false;
sayzyas 43:1675750cca08 191 case BULK_ENDPOINT:
sayzyas 43:1675750cca08 192 if(LPC_USB->HcControl & OR_CONTROL_BLE){
sayzyas 43:1675750cca08 193 LPC_USB->HcControl &= ~OR_CONTROL_BLE;
sayzyas 43:1675750cca08 194 return true;
sayzyas 43:1675750cca08 195 }
sayzyas 43:1675750cca08 196 return false;
sayzyas 43:1675750cca08 197 case INTERRUPT_ENDPOINT:
sayzyas 43:1675750cca08 198 if(LPC_USB->HcControl & OR_CONTROL_PLE) {
sayzyas 43:1675750cca08 199 LPC_USB->HcControl &= ~OR_CONTROL_PLE;
sayzyas 43:1675750cca08 200 return true;
sayzyas 43:1675750cca08 201 }
sayzyas 43:1675750cca08 202 return false;
sayzyas 43:1675750cca08 203 }
sayzyas 43:1675750cca08 204 return false;
sayzyas 43:1675750cca08 205 }
sayzyas 43:1675750cca08 206
sayzyas 43:1675750cca08 207
sayzyas 43:1675750cca08 208 void USBHALHost::memInit() {
sayzyas 43:1675750cca08 209 usb_hcca = (volatile HCCA *)usb_buf;
sayzyas 43:1675750cca08 210 usb_edBuf = usb_buf + HCCA_SIZE;
sayzyas 43:1675750cca08 211 usb_tdBuf = usb_buf + HCCA_SIZE + (MAX_ENDPOINT*ED_SIZE);
sayzyas 43:1675750cca08 212 }
sayzyas 43:1675750cca08 213
sayzyas 43:1675750cca08 214 volatile uint8_t * USBHALHost::getED() {
sayzyas 43:1675750cca08 215 for (int i = 0; i < MAX_ENDPOINT; i++) {
sayzyas 43:1675750cca08 216 if ( !edBufAlloc[i] ) {
sayzyas 43:1675750cca08 217 edBufAlloc[i] = true;
sayzyas 43:1675750cca08 218 return (volatile uint8_t *)(usb_edBuf + i*ED_SIZE);
sayzyas 43:1675750cca08 219 }
sayzyas 43:1675750cca08 220 }
sayzyas 43:1675750cca08 221 perror("Could not allocate ED\r\n");
sayzyas 43:1675750cca08 222 return NULL; //Could not alloc ED
sayzyas 43:1675750cca08 223 }
sayzyas 43:1675750cca08 224
sayzyas 43:1675750cca08 225 volatile uint8_t * USBHALHost::getTD() {
sayzyas 43:1675750cca08 226 int i;
sayzyas 43:1675750cca08 227 for (i = 0; i < MAX_TD; i++) {
sayzyas 43:1675750cca08 228 if ( !tdBufAlloc[i] ) {
sayzyas 43:1675750cca08 229 tdBufAlloc[i] = true;
sayzyas 43:1675750cca08 230 return (volatile uint8_t *)(usb_tdBuf + i*TD_SIZE);
sayzyas 43:1675750cca08 231 }
sayzyas 43:1675750cca08 232 }
sayzyas 43:1675750cca08 233 perror("Could not allocate TD\r\n");
sayzyas 43:1675750cca08 234 return NULL; //Could not alloc TD
sayzyas 43:1675750cca08 235 }
sayzyas 43:1675750cca08 236
sayzyas 43:1675750cca08 237
sayzyas 43:1675750cca08 238 void USBHALHost::freeED(volatile uint8_t * ed) {
sayzyas 43:1675750cca08 239 int i;
sayzyas 43:1675750cca08 240 i = (ed - usb_edBuf) / ED_SIZE;
sayzyas 43:1675750cca08 241 edBufAlloc[i] = false;
sayzyas 43:1675750cca08 242 }
sayzyas 43:1675750cca08 243
sayzyas 43:1675750cca08 244 void USBHALHost::freeTD(volatile uint8_t * td) {
sayzyas 43:1675750cca08 245 int i;
sayzyas 43:1675750cca08 246 i = (td - usb_tdBuf) / TD_SIZE;
sayzyas 43:1675750cca08 247 tdBufAlloc[i] = false;
sayzyas 43:1675750cca08 248 }
sayzyas 43:1675750cca08 249
sayzyas 43:1675750cca08 250
sayzyas 43:1675750cca08 251 void USBHALHost::resetRootHub() {
sayzyas 43:1675750cca08 252 // Initiate port reset
sayzyas 43:1675750cca08 253 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRS;
sayzyas 43:1675750cca08 254
sayzyas 43:1675750cca08 255 while (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRS);
sayzyas 43:1675750cca08 256
sayzyas 43:1675750cca08 257 // ...and clear port reset signal
sayzyas 43:1675750cca08 258 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
sayzyas 43:1675750cca08 259 }
sayzyas 43:1675750cca08 260
sayzyas 43:1675750cca08 261
sayzyas 43:1675750cca08 262 void USBHALHost::_usbisr(void) {
sayzyas 43:1675750cca08 263 if (instHost) {
sayzyas 43:1675750cca08 264 instHost->UsbIrqhandler();
sayzyas 43:1675750cca08 265 }
sayzyas 43:1675750cca08 266 }
sayzyas 43:1675750cca08 267
sayzyas 43:1675750cca08 268 void USBHALHost::UsbIrqhandler() {
sayzyas 43:1675750cca08 269 if( LPC_USB->HcInterruptStatus & LPC_USB->HcInterruptEnable ) //Is there something to actually process?
sayzyas 43:1675750cca08 270 {
sayzyas 43:1675750cca08 271
sayzyas 43:1675750cca08 272 uint32_t int_status = LPC_USB->HcInterruptStatus & LPC_USB->HcInterruptEnable;
sayzyas 43:1675750cca08 273
sayzyas 43:1675750cca08 274 // Root hub status change interrupt
sayzyas 43:1675750cca08 275 if (int_status & OR_INTR_STATUS_RHSC) {
sayzyas 43:1675750cca08 276 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CSC) {
sayzyas 43:1675750cca08 277 if (LPC_USB->HcRhStatus & OR_RH_STATUS_DRWE) {
sayzyas 43:1675750cca08 278 // When DRWE is on, Connect Status Change
sayzyas 43:1675750cca08 279 // means a remote wakeup event.
sayzyas 43:1675750cca08 280 } else {
sayzyas 43:1675750cca08 281
sayzyas 43:1675750cca08 282 //Root device connected
sayzyas 43:1675750cca08 283 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_CCS) {
sayzyas 43:1675750cca08 284
sayzyas 43:1675750cca08 285 // wait 150ms to avoid bounce
sayzyas 43:1675750cca08 286 wait_ms(150);
sayzyas 43:1675750cca08 287
sayzyas 43:1675750cca08 288 //Hub 0 (root hub), Port 1 (count starts at 1), Low or High speed
sayzyas 43:1675750cca08 289 deviceConnected(0, 1, LPC_USB->HcRhPortStatus1 & OR_RH_PORT_LSDA);
sayzyas 43:1675750cca08 290 }
sayzyas 43:1675750cca08 291
sayzyas 43:1675750cca08 292 //Root device disconnected
sayzyas 43:1675750cca08 293 else {
sayzyas 43:1675750cca08 294
sayzyas 43:1675750cca08 295 if (!(int_status & OR_INTR_STATUS_WDH)) {
sayzyas 43:1675750cca08 296 usb_hcca->DoneHead = 0;
sayzyas 43:1675750cca08 297 }
sayzyas 43:1675750cca08 298
sayzyas 43:1675750cca08 299 // wait 200ms to avoid bounce
sayzyas 43:1675750cca08 300 wait_ms(200);
sayzyas 43:1675750cca08 301
sayzyas 43:1675750cca08 302 deviceDisconnected(0, 1, NULL, usb_hcca->DoneHead & 0xFFFFFFFE);
sayzyas 43:1675750cca08 303
sayzyas 43:1675750cca08 304 if (int_status & OR_INTR_STATUS_WDH) {
sayzyas 43:1675750cca08 305 usb_hcca->DoneHead = 0;
sayzyas 43:1675750cca08 306 LPC_USB->HcInterruptStatus = OR_INTR_STATUS_WDH;
sayzyas 43:1675750cca08 307 }
sayzyas 43:1675750cca08 308 }
sayzyas 43:1675750cca08 309 }
sayzyas 43:1675750cca08 310 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_CSC;
sayzyas 43:1675750cca08 311 }
sayzyas 43:1675750cca08 312 if (LPC_USB->HcRhPortStatus1 & OR_RH_PORT_PRSC) {
sayzyas 43:1675750cca08 313 LPC_USB->HcRhPortStatus1 = OR_RH_PORT_PRSC;
sayzyas 43:1675750cca08 314 }
sayzyas 43:1675750cca08 315 LPC_USB->HcInterruptStatus = OR_INTR_STATUS_RHSC;
sayzyas 43:1675750cca08 316 }
sayzyas 43:1675750cca08 317
sayzyas 43:1675750cca08 318 // Writeback Done Head interrupt
sayzyas 43:1675750cca08 319 if (int_status & OR_INTR_STATUS_WDH) {
sayzyas 43:1675750cca08 320 transferCompleted(usb_hcca->DoneHead & 0xFFFFFFFE);
sayzyas 43:1675750cca08 321 LPC_USB->HcInterruptStatus = OR_INTR_STATUS_WDH;
sayzyas 43:1675750cca08 322 }
sayzyas 43:1675750cca08 323 }
sayzyas 43:1675750cca08 324 }
sayzyas 43:1675750cca08 325 #endif