Narasing Sarwade / Mbed OS CAMSecuritySystem_rfid

lora

MFRC522.h@60:e8f234134c86, 2020-02-20 (annotated)

Committer:
sarwadenj
Date:
Thu Feb 20 07:51:11 2020 +0000
Revision:
60:e8f234134c86
project

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sarwadenj 60:e8f234134c86 1 /**
sarwadenj 60:e8f234134c86 2 * MFRC522.h - Library to use ARDUINO RFID MODULE KIT 13.56 MHZ WITH TAGS SPI W AND R BY COOQROBOT.
sarwadenj 60:e8f234134c86 3 * Based on code Dr.Leong ( WWW.B2CQSHOP.COM )
sarwadenj 60:e8f234134c86 4 * Created by Miguel Balboa (circuitito.com), Jan, 2012.
sarwadenj 60:e8f234134c86 5 * Rewritten by Soren Thing Andersen (access.thing.dk), fall of 2013 (Translation to English, refactored, comments, anti collision, cascade levels.)
sarwadenj 60:e8f234134c86 6 * Ported to mbed by Martin Olejar, Dec, 2013
sarwadenj 60:e8f234134c86 7 *
sarwadenj 60:e8f234134c86 8 * Please read this file for an overview and then MFRC522.cpp for comments on the specific functions.
sarwadenj 60:e8f234134c86 9 * Search for "mf-rc522" on ebay.com to purchase the MF-RC522 board.
sarwadenj 60:e8f234134c86 10 *
sarwadenj 60:e8f234134c86 11 * There are three hardware components involved:
sarwadenj 60:e8f234134c86 12 * 1) The micro controller: An Arduino
sarwadenj 60:e8f234134c86 13 * 2) The PCD (short for Proximity Coupling Device): NXP MFRC522 Contactless Reader IC
sarwadenj 60:e8f234134c86 14 * 3) The PICC (short for Proximity Integrated Circuit Card): A card or tag using the ISO 14443A interface, eg Mifare or NTAG203.
sarwadenj 60:e8f234134c86 15 *
sarwadenj 60:e8f234134c86 16 * The microcontroller and card reader uses SPI for communication.
sarwadenj 60:e8f234134c86 17 * The protocol is described in the MFRC522 datasheet: http://www.nxp.com/documents/data_sheet/MFRC522.pdf
sarwadenj 60:e8f234134c86 18 *
sarwadenj 60:e8f234134c86 19 * The card reader and the tags communicate using a 13.56MHz electromagnetic field.
sarwadenj 60:e8f234134c86 20 * The protocol is defined in ISO/IEC 14443-3 Identification cards -- Contactless integrated circuit cards -- Proximity cards -- Part 3: Initialization and anticollision".
sarwadenj 60:e8f234134c86 21 * A free version of the final draft can be found at http://wg8.de/wg8n1496_17n3613_Ballot_FCD14443-3.pdf
sarwadenj 60:e8f234134c86 22 * Details are found in chapter 6, Type A: Initialization and anticollision.
sarwadenj 60:e8f234134c86 23 *
sarwadenj 60:e8f234134c86 24 * If only the PICC UID is wanted, the above documents has all the needed information.
sarwadenj 60:e8f234134c86 25 * To read and write from MIFARE PICCs, the MIFARE protocol is used after the PICC has been selected.
sarwadenj 60:e8f234134c86 26 * The MIFARE Classic chips and protocol is described in the datasheets:
sarwadenj 60:e8f234134c86 27 * 1K: http://www.nxp.com/documents/data_sheet/MF1S503x.pdf
sarwadenj 60:e8f234134c86 28 * 4K: http://www.nxp.com/documents/data_sheet/MF1S703x.pdf
sarwadenj 60:e8f234134c86 29 * Mini: http://www.idcardmarket.com/download/mifare_S20_datasheet.pdf
sarwadenj 60:e8f234134c86 30 * The MIFARE Ultralight chip and protocol is described in the datasheets:
sarwadenj 60:e8f234134c86 31 * Ultralight: http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf
sarwadenj 60:e8f234134c86 32 * Ultralight C: http://www.nxp.com/documents/short_data_sheet/MF0ICU2_SDS.pdf
sarwadenj 60:e8f234134c86 33 *
sarwadenj 60:e8f234134c86 34 * MIFARE Classic 1K (MF1S503x):
sarwadenj 60:e8f234134c86 35 * Has 16 sectors * 4 blocks/sector * 16 bytes/block = 1024 bytes.
sarwadenj 60:e8f234134c86 36 * The blocks are numbered 0-63.
sarwadenj 60:e8f234134c86 37 * Block 3 in each sector is the Sector Trailer. See http://www.nxp.com/documents/data_sheet/MF1S503x.pdf sections 8.6 and 8.7:
sarwadenj 60:e8f234134c86 38 * Bytes 0-5: Key A
sarwadenj 60:e8f234134c86 39 * Bytes 6-8: Access Bits
sarwadenj 60:e8f234134c86 40 * Bytes 9: User data
sarwadenj 60:e8f234134c86 41 * Bytes 10-15: Key B (or user data)
sarwadenj 60:e8f234134c86 42 * Block 0 is read only manufacturer data.
sarwadenj 60:e8f234134c86 43 * To access a block, an authentication using a key from the block's sector must be performed first.
sarwadenj 60:e8f234134c86 44 * Example: To read from block 10, first authenticate using a key from sector 3 (blocks 8-11).
sarwadenj 60:e8f234134c86 45 * All keys are set to FFFFFFFFFFFFh at chip delivery.
sarwadenj 60:e8f234134c86 46 * Warning: Please read section 8.7 "Memory Access". It includes this text: if the PICC detects a format violation the whole sector is irreversibly blocked.
sarwadenj 60:e8f234134c86 47 * To use a block in "value block" mode (for Increment/Decrement operations) you need to change the sector trailer. Use PICC_SetAccessBits() to calculate the bit patterns.
sarwadenj 60:e8f234134c86 48 * MIFARE Classic 4K (MF1S703x):
sarwadenj 60:e8f234134c86 49 * Has (32 sectors * 4 blocks/sector + 8 sectors * 16 blocks/sector) * 16 bytes/block = 4096 bytes.
sarwadenj 60:e8f234134c86 50 * The blocks are numbered 0-255.
sarwadenj 60:e8f234134c86 51 * The last block in each sector is the Sector Trailer like above.
sarwadenj 60:e8f234134c86 52 * MIFARE Classic Mini (MF1 IC S20):
sarwadenj 60:e8f234134c86 53 * Has 5 sectors * 4 blocks/sector * 16 bytes/block = 320 bytes.
sarwadenj 60:e8f234134c86 54 * The blocks are numbered 0-19.
sarwadenj 60:e8f234134c86 55 * The last block in each sector is the Sector Trailer like above.
sarwadenj 60:e8f234134c86 56 *
sarwadenj 60:e8f234134c86 57 * MIFARE Ultralight (MF0ICU1):
sarwadenj 60:e8f234134c86 58 * Has 16 pages of 4 bytes = 64 bytes.
sarwadenj 60:e8f234134c86 59 * Pages 0 + 1 is used for the 7-byte UID.
sarwadenj 60:e8f234134c86 60 * Page 2 contains the last chech digit for the UID, one byte manufacturer internal data, and the lock bytes (see http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf section 8.5.2)
sarwadenj 60:e8f234134c86 61 * Page 3 is OTP, One Time Programmable bits. Once set to 1 they cannot revert to 0.
sarwadenj 60:e8f234134c86 62 * Pages 4-15 are read/write unless blocked by the lock bytes in page 2.
sarwadenj 60:e8f234134c86 63 * MIFARE Ultralight C (MF0ICU2):
sarwadenj 60:e8f234134c86 64 * Has 48 pages of 4 bytes = 64 bytes.
sarwadenj 60:e8f234134c86 65 * Pages 0 + 1 is used for the 7-byte UID.
sarwadenj 60:e8f234134c86 66 * Page 2 contains the last chech digit for the UID, one byte manufacturer internal data, and the lock bytes (see http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf section 8.5.2)
sarwadenj 60:e8f234134c86 67 * Page 3 is OTP, One Time Programmable bits. Once set to 1 they cannot revert to 0.
sarwadenj 60:e8f234134c86 68 * Pages 4-39 are read/write unless blocked by the lock bytes in page 2.
sarwadenj 60:e8f234134c86 69 * Page 40 Lock bytes
sarwadenj 60:e8f234134c86 70 * Page 41 16 bit one way counter
sarwadenj 60:e8f234134c86 71 * Pages 42-43 Authentication configuration
sarwadenj 60:e8f234134c86 72 * Pages 44-47 Authentication key
sarwadenj 60:e8f234134c86 73 */
sarwadenj 60:e8f234134c86 74 #ifndef MFRC522_h
sarwadenj 60:e8f234134c86 75 #define MFRC522_h
sarwadenj 60:e8f234134c86 76
sarwadenj 60:e8f234134c86 77 #include "mbed.h"
sarwadenj 60:e8f234134c86 78
sarwadenj 60:e8f234134c86 79 /**
sarwadenj 60:e8f234134c86 80 * MFRC522 example
sarwadenj 60:e8f234134c86 81 *
sarwadenj 60:e8f234134c86 82 * @code
sarwadenj 60:e8f234134c86 83 * #include "mbed.h"
sarwadenj 60:e8f234134c86 84 * #include "MFRC522.h"
sarwadenj 60:e8f234134c86 85 *
sarwadenj 60:e8f234134c86 86 * //KL25Z Pins for MFRC522 SPI interface
sarwadenj 60:e8f234134c86 87 * #define SPI_MOSI PTC6
sarwadenj 60:e8f234134c86 88 * #define SPI_MISO PTC7
sarwadenj 60:e8f234134c86 89 * #define SPI_SCLK PTC5
sarwadenj 60:e8f234134c86 90 * #define SPI_CS PTC4
sarwadenj 60:e8f234134c86 91 * // KL25Z Pin for MFRC522 reset
sarwadenj 60:e8f234134c86 92 * #define MF_RESET PTC3
sarwadenj 60:e8f234134c86 93 * // KL25Z Pins for Debug UART port
sarwadenj 60:e8f234134c86 94 * #define UART_RX PTA1
sarwadenj 60:e8f234134c86 95 * #define UART_TX PTA2
sarwadenj 60:e8f234134c86 96 *
sarwadenj 60:e8f234134c86 97 * DigitalOut LedRed (LED_RED);
sarwadenj 60:e8f234134c86 98 * DigitalOut LedGreen (LED_GREEN);
sarwadenj 60:e8f234134c86 99 *
sarwadenj 60:e8f234134c86 100 * Serial DebugUART(UART_TX, UART_RX);
sarwadenj 60:e8f234134c86 101 * MFRC522 RfChip (SPI_MOSI, SPI_MISO, SPI_SCLK, SPI_CS, MF_RESET);
sarwadenj 60:e8f234134c86 102 *
sarwadenj 60:e8f234134c86 103 * int main(void) {
sarwadenj 60:e8f234134c86 104 * // Set debug UART speed
sarwadenj 60:e8f234134c86 105 * DebugUART.baud(115200);
sarwadenj 60:e8f234134c86 106 *
sarwadenj 60:e8f234134c86 107 * // Init. RC522 Chip
sarwadenj 60:e8f234134c86 108 * RfChip.PCD_Init();
sarwadenj 60:e8f234134c86 109 *
sarwadenj 60:e8f234134c86 110 * while (true) {
sarwadenj 60:e8f234134c86 111 * LedRed = 1;
sarwadenj 60:e8f234134c86 112 * LedGreen = 1;
sarwadenj 60:e8f234134c86 113 *
sarwadenj 60:e8f234134c86 114 * // Look for new cards
sarwadenj 60:e8f234134c86 115 * if ( ! RfChip.PICC_IsNewCardPresent())
sarwadenj 60:e8f234134c86 116 * {
sarwadenj 60:e8f234134c86 117 * wait_ms(500);
sarwadenj 60:e8f234134c86 118 * continue;
sarwadenj 60:e8f234134c86 119 * }
sarwadenj 60:e8f234134c86 120 *
sarwadenj 60:e8f234134c86 121 * LedRed = 0;
sarwadenj 60:e8f234134c86 122 *
sarwadenj 60:e8f234134c86 123 * // Select one of the cards
sarwadenj 60:e8f234134c86 124 * if ( ! RfChip.PICC_ReadCardSerial())
sarwadenj 60:e8f234134c86 125 * {
sarwadenj 60:e8f234134c86 126 * wait_ms(500);
sarwadenj 60:e8f234134c86 127 * continue;
sarwadenj 60:e8f234134c86 128 * }
sarwadenj 60:e8f234134c86 129 *
sarwadenj 60:e8f234134c86 130 * LedRed = 1;
sarwadenj 60:e8f234134c86 131 * LedGreen = 0;
sarwadenj 60:e8f234134c86 132 *
sarwadenj 60:e8f234134c86 133 * // Print Card UID
sarwadenj 60:e8f234134c86 134 * printf("Card UID: ");
sarwadenj 60:e8f234134c86 135 * for (uint8_t i = 0; i < RfChip.uid.size; i++)
sarwadenj 60:e8f234134c86 136 * {
sarwadenj 60:e8f234134c86 137 * printf(" %X02", RfChip.uid.uidByte[i]);
sarwadenj 60:e8f234134c86 138 * }
sarwadenj 60:e8f234134c86 139 * printf("\n\r");
sarwadenj 60:e8f234134c86 140 *
sarwadenj 60:e8f234134c86 141 * // Print Card type
sarwadenj 60:e8f234134c86 142 * uint8_t piccType = RfChip.PICC_GetType(RfChip.uid.sak);
sarwadenj 60:e8f234134c86 143 * printf("PICC Type: %s \n\r", RfChip.PICC_GetTypeName(piccType));
sarwadenj 60:e8f234134c86 144 * wait_ms(1000);
sarwadenj 60:e8f234134c86 145 * }
sarwadenj 60:e8f234134c86 146 * }
sarwadenj 60:e8f234134c86 147 * @endcode
sarwadenj 60:e8f234134c86 148 */
sarwadenj 60:e8f234134c86 149
sarwadenj 60:e8f234134c86 150 class MFRC522 {
sarwadenj 60:e8f234134c86 151 public:
sarwadenj 60:e8f234134c86 152
sarwadenj 60:e8f234134c86 153 /**
sarwadenj 60:e8f234134c86 154 * MFRC522 registers (described in chapter 9 of the datasheet).
sarwadenj 60:e8f234134c86 155 * When using SPI all addresses are shifted one bit left in the "SPI address byte" (section 8.1.2.3)
sarwadenj 60:e8f234134c86 156 */
sarwadenj 60:e8f234134c86 157 enum PCD_Register {
sarwadenj 60:e8f234134c86 158 // Page 0: Command and status
sarwadenj 60:e8f234134c86 159 // 0x00 // reserved for future use
sarwadenj 60:e8f234134c86 160 CommandReg = 0x01 << 1, // starts and stops command execution
sarwadenj 60:e8f234134c86 161 ComIEnReg = 0x02 << 1, // enable and disable interrupt request control bits
sarwadenj 60:e8f234134c86 162 DivIEnReg = 0x03 << 1, // enable and disable interrupt request control bits
sarwadenj 60:e8f234134c86 163 ComIrqReg = 0x04 << 1, // interrupt request bits
sarwadenj 60:e8f234134c86 164 DivIrqReg = 0x05 << 1, // interrupt request bits
sarwadenj 60:e8f234134c86 165 ErrorReg = 0x06 << 1, // error bits showing the error status of the last command executed
sarwadenj 60:e8f234134c86 166 Status1Reg = 0x07 << 1, // communication status bits
sarwadenj 60:e8f234134c86 167 Status2Reg = 0x08 << 1, // receiver and transmitter status bits
sarwadenj 60:e8f234134c86 168 FIFODataReg = 0x09 << 1, // input and output of 64 byte FIFO buffer
sarwadenj 60:e8f234134c86 169 FIFOLevelReg = 0x0A << 1, // number of bytes stored in the FIFO buffer
sarwadenj 60:e8f234134c86 170 WaterLevelReg = 0x0B << 1, // level for FIFO underflow and overflow warning
sarwadenj 60:e8f234134c86 171 ControlReg = 0x0C << 1, // miscellaneous control registers
sarwadenj 60:e8f234134c86 172 BitFramingReg = 0x0D << 1, // adjustments for bit-oriented frames
sarwadenj 60:e8f234134c86 173 CollReg = 0x0E << 1, // bit position of the first bit-collision detected on the RF interface
sarwadenj 60:e8f234134c86 174 // 0x0F // reserved for future use
sarwadenj 60:e8f234134c86 175
sarwadenj 60:e8f234134c86 176 // Page 1:Command
sarwadenj 60:e8f234134c86 177 // 0x10 // reserved for future use
sarwadenj 60:e8f234134c86 178 ModeReg = 0x11 << 1, // defines general modes for transmitting and receiving
sarwadenj 60:e8f234134c86 179 TxModeReg = 0x12 << 1, // defines transmission data rate and framing
sarwadenj 60:e8f234134c86 180 RxModeReg = 0x13 << 1, // defines reception data rate and framing
sarwadenj 60:e8f234134c86 181 TxControlReg = 0x14 << 1, // controls the logical behavior of the antenna driver pins TX1 and TX2
sarwadenj 60:e8f234134c86 182 TxASKReg = 0x15 << 1, // controls the setting of the transmission modulation
sarwadenj 60:e8f234134c86 183 TxSelReg = 0x16 << 1, // selects the internal sources for the antenna driver
sarwadenj 60:e8f234134c86 184 RxSelReg = 0x17 << 1, // selects internal receiver settings
sarwadenj 60:e8f234134c86 185 RxThresholdReg = 0x18 << 1, // selects thresholds for the bit decoder
sarwadenj 60:e8f234134c86 186 DemodReg = 0x19 << 1, // defines demodulator settings
sarwadenj 60:e8f234134c86 187 // 0x1A // reserved for future use
sarwadenj 60:e8f234134c86 188 // 0x1B // reserved for future use
sarwadenj 60:e8f234134c86 189 MfTxReg = 0x1C << 1, // controls some MIFARE communication transmit parameters
sarwadenj 60:e8f234134c86 190 MfRxReg = 0x1D << 1, // controls some MIFARE communication receive parameters
sarwadenj 60:e8f234134c86 191 // 0x1E // reserved for future use
sarwadenj 60:e8f234134c86 192 SerialSpeedReg = 0x1F << 1, // selects the speed of the serial UART interface
sarwadenj 60:e8f234134c86 193
sarwadenj 60:e8f234134c86 194 // Page 2: Configuration
sarwadenj 60:e8f234134c86 195 // 0x20 // reserved for future use
sarwadenj 60:e8f234134c86 196 CRCResultRegH = 0x21 << 1, // shows the MSB and LSB values of the CRC calculation
sarwadenj 60:e8f234134c86 197 CRCResultRegL = 0x22 << 1,
sarwadenj 60:e8f234134c86 198 // 0x23 // reserved for future use
sarwadenj 60:e8f234134c86 199 ModWidthReg = 0x24 << 1, // controls the ModWidth setting?
sarwadenj 60:e8f234134c86 200 // 0x25 // reserved for future use
sarwadenj 60:e8f234134c86 201 RFCfgReg = 0x26 << 1, // configures the receiver gain
sarwadenj 60:e8f234134c86 202 GsNReg = 0x27 << 1, // selects the conductance of the antenna driver pins TX1 and TX2 for modulation
sarwadenj 60:e8f234134c86 203 CWGsPReg = 0x28 << 1, // defines the conductance of the p-driver output during periods of no modulation
sarwadenj 60:e8f234134c86 204 ModGsPReg = 0x29 << 1, // defines the conductance of the p-driver output during periods of modulation
sarwadenj 60:e8f234134c86 205 TModeReg = 0x2A << 1, // defines settings for the internal timer
sarwadenj 60:e8f234134c86 206 TPrescalerReg = 0x2B << 1, // the lower 8 bits of the TPrescaler value. The 4 high bits are in TModeReg.
sarwadenj 60:e8f234134c86 207 TReloadRegH = 0x2C << 1, // defines the 16-bit timer reload value
sarwadenj 60:e8f234134c86 208 TReloadRegL = 0x2D << 1,
sarwadenj 60:e8f234134c86 209 TCntValueRegH = 0x2E << 1, // shows the 16-bit timer value
sarwadenj 60:e8f234134c86 210 TCntValueRegL = 0x2F << 1,
sarwadenj 60:e8f234134c86 211
sarwadenj 60:e8f234134c86 212 // Page 3:Test Registers
sarwadenj 60:e8f234134c86 213 // 0x30 // reserved for future use
sarwadenj 60:e8f234134c86 214 TestSel1Reg = 0x31 << 1, // general test signal configuration
sarwadenj 60:e8f234134c86 215 TestSel2Reg = 0x32 << 1, // general test signal configuration
sarwadenj 60:e8f234134c86 216 TestPinEnReg = 0x33 << 1, // enables pin output driver on pins D1 to D7
sarwadenj 60:e8f234134c86 217 TestPinValueReg = 0x34 << 1, // defines the values for D1 to D7 when it is used as an I/O bus
sarwadenj 60:e8f234134c86 218 TestBusReg = 0x35 << 1, // shows the status of the internal test bus
sarwadenj 60:e8f234134c86 219 AutoTestReg = 0x36 << 1, // controls the digital self test
sarwadenj 60:e8f234134c86 220 VersionReg = 0x37 << 1, // shows the software version
sarwadenj 60:e8f234134c86 221 AnalogTestReg = 0x38 << 1, // controls the pins AUX1 and AUX2
sarwadenj 60:e8f234134c86 222 TestDAC1Reg = 0x39 << 1, // defines the test value for TestDAC1
sarwadenj 60:e8f234134c86 223 TestDAC2Reg = 0x3A << 1, // defines the test value for TestDAC2
sarwadenj 60:e8f234134c86 224 TestADCReg = 0x3B << 1 // shows the value of ADC I and Q channels
sarwadenj 60:e8f234134c86 225 // 0x3C // reserved for production tests
sarwadenj 60:e8f234134c86 226 // 0x3D // reserved for production tests
sarwadenj 60:e8f234134c86 227 // 0x3E // reserved for production tests
sarwadenj 60:e8f234134c86 228 // 0x3F // reserved for production tests
sarwadenj 60:e8f234134c86 229 };
sarwadenj 60:e8f234134c86 230
sarwadenj 60:e8f234134c86 231 // MFRC522 commands Described in chapter 10 of the datasheet.
sarwadenj 60:e8f234134c86 232 enum PCD_Command {
sarwadenj 60:e8f234134c86 233 PCD_Idle = 0x00, // no action, cancels current command execution
sarwadenj 60:e8f234134c86 234 PCD_Mem = 0x01, // stores 25 bytes into the internal buffer
sarwadenj 60:e8f234134c86 235 PCD_GenerateRandomID = 0x02, // generates a 10-byte random ID number
sarwadenj 60:e8f234134c86 236 PCD_CalcCRC = 0x03, // activates the CRC coprocessor or performs a self test
sarwadenj 60:e8f234134c86 237 PCD_Transmit = 0x04, // transmits data from the FIFO buffer
sarwadenj 60:e8f234134c86 238 PCD_NoCmdChange = 0x07, // no command change, can be used to modify the CommandReg register bits without affecting the command, for example, the PowerDown bit
sarwadenj 60:e8f234134c86 239 PCD_Receive = 0x08, // activates the receiver circuits
sarwadenj 60:e8f234134c86 240 PCD_Transceive = 0x0C, // transmits data from FIFO buffer to antenna and automatically activates the receiver after transmission
sarwadenj 60:e8f234134c86 241 PCD_MFAuthent = 0x0E, // performs the MIFARE standard authentication as a reader
sarwadenj 60:e8f234134c86 242 PCD_SoftReset = 0x0F // resets the MFRC522
sarwadenj 60:e8f234134c86 243 };
sarwadenj 60:e8f234134c86 244
sarwadenj 60:e8f234134c86 245 // Commands sent to the PICC.
sarwadenj 60:e8f234134c86 246 enum PICC_Command {
sarwadenj 60:e8f234134c86 247 // The commands used by the PCD to manage communication with several PICCs (ISO 14443-3, Type A, section 6.4)
sarwadenj 60:e8f234134c86 248 PICC_CMD_REQA = 0x26, // REQuest command, Type A. Invites PICCs in state IDLE to go to READY and prepare for anticollision or selection. 7 bit frame.
sarwadenj 60:e8f234134c86 249 PICC_CMD_WUPA = 0x52, // Wake-UP command, Type A. Invites PICCs in state IDLE and HALT to go to READY(*) and prepare for anticollision or selection. 7 bit frame.
sarwadenj 60:e8f234134c86 250 PICC_CMD_CT = 0x88, // Cascade Tag. Not really a command, but used during anti collision.
sarwadenj 60:e8f234134c86 251 PICC_CMD_SEL_CL1 = 0x93, // Anti collision/Select, Cascade Level 1
sarwadenj 60:e8f234134c86 252 PICC_CMD_SEL_CL2 = 0x95, // Anti collision/Select, Cascade Level 1
sarwadenj 60:e8f234134c86 253 PICC_CMD_SEL_CL3 = 0x97, // Anti collision/Select, Cascade Level 1
sarwadenj 60:e8f234134c86 254 PICC_CMD_HLTA = 0x50, // HaLT command, Type A. Instructs an ACTIVE PICC to go to state HALT.
sarwadenj 60:e8f234134c86 255
sarwadenj 60:e8f234134c86 256 // The commands used for MIFARE Classic (from http://www.nxp.com/documents/data_sheet/MF1S503x.pdf, Section 9)
sarwadenj 60:e8f234134c86 257 // Use PCD_MFAuthent to authenticate access to a sector, then use these commands to read/write/modify the blocks on the sector.
sarwadenj 60:e8f234134c86 258 // The read/write commands can also be used for MIFARE Ultralight.
sarwadenj 60:e8f234134c86 259 PICC_CMD_MF_AUTH_KEY_A = 0x60, // Perform authentication with Key A
sarwadenj 60:e8f234134c86 260 PICC_CMD_MF_AUTH_KEY_B = 0x61, // Perform authentication with Key B
sarwadenj 60:e8f234134c86 261 PICC_CMD_MF_READ = 0x30, // Reads one 16 byte block from the authenticated sector of the PICC. Also used for MIFARE Ultralight.
sarwadenj 60:e8f234134c86 262 PICC_CMD_MF_WRITE = 0xA0, // Writes one 16 byte block to the authenticated sector of the PICC. Called "COMPATIBILITY WRITE" for MIFARE Ultralight.
sarwadenj 60:e8f234134c86 263 PICC_CMD_MF_DECREMENT = 0xC0, // Decrements the contents of a block and stores the result in the internal data register.
sarwadenj 60:e8f234134c86 264 PICC_CMD_MF_INCREMENT = 0xC1, // Increments the contents of a block and stores the result in the internal data register.
sarwadenj 60:e8f234134c86 265 PICC_CMD_MF_RESTORE = 0xC2, // Reads the contents of a block into the internal data register.
sarwadenj 60:e8f234134c86 266 PICC_CMD_MF_TRANSFER = 0xB0, // Writes the contents of the internal data register to a block.
sarwadenj 60:e8f234134c86 267
sarwadenj 60:e8f234134c86 268 // The commands used for MIFARE Ultralight (from http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf, Section 8.6)
sarwadenj 60:e8f234134c86 269 // The PICC_CMD_MF_READ and PICC_CMD_MF_WRITE can also be used for MIFARE Ultralight.
sarwadenj 60:e8f234134c86 270 PICC_CMD_UL_WRITE = 0xA2 // Writes one 4 byte page to the PICC.
sarwadenj 60:e8f234134c86 271 };
sarwadenj 60:e8f234134c86 272
sarwadenj 60:e8f234134c86 273 // MIFARE constants that does not fit anywhere else
sarwadenj 60:e8f234134c86 274 enum MIFARE_Misc {
sarwadenj 60:e8f234134c86 275 MF_ACK = 0xA, // The MIFARE Classic uses a 4 bit ACK/NAK. Any other value than 0xA is NAK.
sarwadenj 60:e8f234134c86 276 MF_KEY_SIZE = 6 // A Mifare Crypto1 key is 6 bytes.
sarwadenj 60:e8f234134c86 277 };
sarwadenj 60:e8f234134c86 278
sarwadenj 60:e8f234134c86 279 // PICC types we can detect. Remember to update PICC_GetTypeName() if you add more.
sarwadenj 60:e8f234134c86 280 enum PICC_Type {
sarwadenj 60:e8f234134c86 281 PICC_TYPE_UNKNOWN = 0,
sarwadenj 60:e8f234134c86 282 PICC_TYPE_ISO_14443_4 = 1, // PICC compliant with ISO/IEC 14443-4
sarwadenj 60:e8f234134c86 283 PICC_TYPE_ISO_18092 = 2, // PICC compliant with ISO/IEC 18092 (NFC)
sarwadenj 60:e8f234134c86 284 PICC_TYPE_MIFARE_MINI = 3, // MIFARE Classic protocol, 320 bytes
sarwadenj 60:e8f234134c86 285 PICC_TYPE_MIFARE_1K = 4, // MIFARE Classic protocol, 1KB
sarwadenj 60:e8f234134c86 286 PICC_TYPE_MIFARE_4K = 5, // MIFARE Classic protocol, 4KB
sarwadenj 60:e8f234134c86 287 PICC_TYPE_MIFARE_UL = 6, // MIFARE Ultralight or Ultralight C
sarwadenj 60:e8f234134c86 288 PICC_TYPE_MIFARE_PLUS = 7, // MIFARE Plus
sarwadenj 60:e8f234134c86 289 PICC_TYPE_TNP3XXX = 8, // Only mentioned in NXP AN 10833 MIFARE Type Identification Procedure
sarwadenj 60:e8f234134c86 290 PICC_TYPE_NOT_COMPLETE = 255 // SAK indicates UID is not complete.
sarwadenj 60:e8f234134c86 291 };
sarwadenj 60:e8f234134c86 292
sarwadenj 60:e8f234134c86 293 // Return codes from the functions in this class. Remember to update GetStatusCodeName() if you add more.
sarwadenj 60:e8f234134c86 294 enum StatusCode {
sarwadenj 60:e8f234134c86 295 STATUS_OK = 1, // Success
sarwadenj 60:e8f234134c86 296 STATUS_ERROR = 2, // Error in communication
sarwadenj 60:e8f234134c86 297 STATUS_COLLISION = 3, // Collision detected
sarwadenj 60:e8f234134c86 298 STATUS_TIMEOUT = 4, // Timeout in communication.
sarwadenj 60:e8f234134c86 299 STATUS_NO_ROOM = 5, // A buffer is not big enough.
sarwadenj 60:e8f234134c86 300 STATUS_INTERNAL_ERROR = 6, // Internal error in the code. Should not happen ;-)
sarwadenj 60:e8f234134c86 301 STATUS_INVALID = 7, // Invalid argument.
sarwadenj 60:e8f234134c86 302 STATUS_CRC_WRONG = 8, // The CRC_A does not match
sarwadenj 60:e8f234134c86 303 STATUS_MIFARE_NACK = 9 // A MIFARE PICC responded with NAK.
sarwadenj 60:e8f234134c86 304 };
sarwadenj 60:e8f234134c86 305
sarwadenj 60:e8f234134c86 306 // A struct used for passing the UID of a PICC.
sarwadenj 60:e8f234134c86 307 typedef struct {
sarwadenj 60:e8f234134c86 308 uint8_t size; // Number of bytes in the UID. 4, 7 or 10.
sarwadenj 60:e8f234134c86 309 uint8_t uidByte[10];
sarwadenj 60:e8f234134c86 310 uint8_t sak; // The SAK (Select acknowledge) byte returned from the PICC after successful selection.
sarwadenj 60:e8f234134c86 311 } Uid;
sarwadenj 60:e8f234134c86 312
sarwadenj 60:e8f234134c86 313 // A struct used for passing a MIFARE Crypto1 key
sarwadenj 60:e8f234134c86 314 typedef struct {
sarwadenj 60:e8f234134c86 315 uint8_t keyByte[MF_KEY_SIZE];
sarwadenj 60:e8f234134c86 316 } MIFARE_Key;
sarwadenj 60:e8f234134c86 317
sarwadenj 60:e8f234134c86 318 // Member variables
sarwadenj 60:e8f234134c86 319 Uid uid; // Used by PICC_ReadCardSerial().
sarwadenj 60:e8f234134c86 320
sarwadenj 60:e8f234134c86 321 // Size of the MFRC522 FIFO
sarwadenj 60:e8f234134c86 322 static const uint8_t FIFO_SIZE = 64; // The FIFO is 64 bytes.
sarwadenj 60:e8f234134c86 323
sarwadenj 60:e8f234134c86 324 /**
sarwadenj 60:e8f234134c86 325 * MFRC522 constructor
sarwadenj 60:e8f234134c86 326 *
sarwadenj 60:e8f234134c86 327 * @param mosi SPI MOSI pin
sarwadenj 60:e8f234134c86 328 * @param miso SPI MISO pin
sarwadenj 60:e8f234134c86 329 * @param sclk SPI SCLK pin
sarwadenj 60:e8f234134c86 330 * @param cs SPI CS pin
sarwadenj 60:e8f234134c86 331 * @param reset Reset pin
sarwadenj 60:e8f234134c86 332 */
sarwadenj 60:e8f234134c86 333 MFRC522(PinName mosi, PinName miso, PinName sclk, PinName cs, PinName reset);
sarwadenj 60:e8f234134c86 334
sarwadenj 60:e8f234134c86 335 /**
sarwadenj 60:e8f234134c86 336 * MFRC522 destructor
sarwadenj 60:e8f234134c86 337 */
sarwadenj 60:e8f234134c86 338 ~MFRC522();
sarwadenj 60:e8f234134c86 339
sarwadenj 60:e8f234134c86 340
sarwadenj 60:e8f234134c86 341 // ************************************************************************************
sarwadenj 60:e8f234134c86 342 //! @name Functions for manipulating the MFRC522
sarwadenj 60:e8f234134c86 343 // ************************************************************************************
sarwadenj 60:e8f234134c86 344 //@{
sarwadenj 60:e8f234134c86 345
sarwadenj 60:e8f234134c86 346 /**
sarwadenj 60:e8f234134c86 347 * Initializes the MFRC522 chip.
sarwadenj 60:e8f234134c86 348 */
sarwadenj 60:e8f234134c86 349 void PCD_Init (void);
sarwadenj 60:e8f234134c86 350
sarwadenj 60:e8f234134c86 351 /**
sarwadenj 60:e8f234134c86 352 * Performs a soft reset on the MFRC522 chip and waits for it to be ready again.
sarwadenj 60:e8f234134c86 353 */
sarwadenj 60:e8f234134c86 354 void PCD_Reset (void);
sarwadenj 60:e8f234134c86 355
sarwadenj 60:e8f234134c86 356 /**
sarwadenj 60:e8f234134c86 357 * Turns the antenna on by enabling pins TX1 and TX2.
sarwadenj 60:e8f234134c86 358 * After a reset these pins disabled.
sarwadenj 60:e8f234134c86 359 */
sarwadenj 60:e8f234134c86 360 void PCD_AntennaOn (void);
sarwadenj 60:e8f234134c86 361
sarwadenj 60:e8f234134c86 362 /**
sarwadenj 60:e8f234134c86 363 * Writes a byte to the specified register in the MFRC522 chip.
sarwadenj 60:e8f234134c86 364 * The interface is described in the datasheet section 8.1.2.
sarwadenj 60:e8f234134c86 365 *
sarwadenj 60:e8f234134c86 366 * @param reg The register to write to. One of the PCD_Register enums.
sarwadenj 60:e8f234134c86 367 * @param value The value to write.
sarwadenj 60:e8f234134c86 368 */
sarwadenj 60:e8f234134c86 369 void PCD_WriteRegister (uint8_t reg, uint8_t value);
sarwadenj 60:e8f234134c86 370
sarwadenj 60:e8f234134c86 371 /**
sarwadenj 60:e8f234134c86 372 * Writes a number of bytes to the specified register in the MFRC522 chip.
sarwadenj 60:e8f234134c86 373 * The interface is described in the datasheet section 8.1.2.
sarwadenj 60:e8f234134c86 374 *
sarwadenj 60:e8f234134c86 375 * @param reg The register to write to. One of the PCD_Register enums.
sarwadenj 60:e8f234134c86 376 * @param count The number of bytes to write to the register
sarwadenj 60:e8f234134c86 377 * @param values The values to write. Byte array.
sarwadenj 60:e8f234134c86 378 */
sarwadenj 60:e8f234134c86 379 void PCD_WriteRegister (uint8_t reg, uint8_t count, uint8_t *values);
sarwadenj 60:e8f234134c86 380
sarwadenj 60:e8f234134c86 381 /**
sarwadenj 60:e8f234134c86 382 * Reads a byte from the specified register in the MFRC522 chip.
sarwadenj 60:e8f234134c86 383 * The interface is described in the datasheet section 8.1.2.
sarwadenj 60:e8f234134c86 384 *
sarwadenj 60:e8f234134c86 385 * @param reg The register to read from. One of the PCD_Register enums.
sarwadenj 60:e8f234134c86 386 * @returns Register value
sarwadenj 60:e8f234134c86 387 */
sarwadenj 60:e8f234134c86 388 uint8_t PCD_ReadRegister (uint8_t reg);
sarwadenj 60:e8f234134c86 389
sarwadenj 60:e8f234134c86 390 /**
sarwadenj 60:e8f234134c86 391 * Reads a number of bytes from the specified register in the MFRC522 chip.
sarwadenj 60:e8f234134c86 392 * The interface is described in the datasheet section 8.1.2.
sarwadenj 60:e8f234134c86 393 *
sarwadenj 60:e8f234134c86 394 * @param reg The register to read from. One of the PCD_Register enums.
sarwadenj 60:e8f234134c86 395 * @param count The number of bytes to read.
sarwadenj 60:e8f234134c86 396 * @param values Byte array to store the values in.
sarwadenj 60:e8f234134c86 397 * @param rxAlign Only bit positions rxAlign..7 in values[0] are updated.
sarwadenj 60:e8f234134c86 398 */
sarwadenj 60:e8f234134c86 399 void PCD_ReadRegister (uint8_t reg, uint8_t count, uint8_t *values, uint8_t rxAlign = 0);
sarwadenj 60:e8f234134c86 400
sarwadenj 60:e8f234134c86 401 /**
sarwadenj 60:e8f234134c86 402 * Sets the bits given in mask in register reg.
sarwadenj 60:e8f234134c86 403 *
sarwadenj 60:e8f234134c86 404 * @param reg The register to update. One of the PCD_Register enums.
sarwadenj 60:e8f234134c86 405 * @param mask The bits to set.
sarwadenj 60:e8f234134c86 406 */
sarwadenj 60:e8f234134c86 407 void PCD_SetRegisterBits(uint8_t reg, uint8_t mask);
sarwadenj 60:e8f234134c86 408
sarwadenj 60:e8f234134c86 409 /**
sarwadenj 60:e8f234134c86 410 * Clears the bits given in mask from register reg.
sarwadenj 60:e8f234134c86 411 *
sarwadenj 60:e8f234134c86 412 * @param reg The register to update. One of the PCD_Register enums.
sarwadenj 60:e8f234134c86 413 * @param mask The bits to clear.
sarwadenj 60:e8f234134c86 414 */
sarwadenj 60:e8f234134c86 415 void PCD_ClrRegisterBits(uint8_t reg, uint8_t mask);
sarwadenj 60:e8f234134c86 416
sarwadenj 60:e8f234134c86 417 /**
sarwadenj 60:e8f234134c86 418 * Use the CRC coprocessor in the MFRC522 to calculate a CRC_A.
sarwadenj 60:e8f234134c86 419 *
sarwadenj 60:e8f234134c86 420 * @param data Pointer to the data to transfer to the FIFO for CRC calculation.
sarwadenj 60:e8f234134c86 421 * @param length The number of bytes to transfer.
sarwadenj 60:e8f234134c86 422 * @param result Pointer to result buffer. Result is written to result[0..1], low byte first.
sarwadenj 60:e8f234134c86 423 * @return STATUS_OK on success, STATUS_??? otherwise.
sarwadenj 60:e8f234134c86 424 */
sarwadenj 60:e8f234134c86 425 uint8_t PCD_CalculateCRC (uint8_t *data, uint8_t length, uint8_t *result);
sarwadenj 60:e8f234134c86 426
sarwadenj 60:e8f234134c86 427 /**
sarwadenj 60:e8f234134c86 428 * Executes the Transceive command.
sarwadenj 60:e8f234134c86 429 * CRC validation can only be done if backData and backLen are specified.
sarwadenj 60:e8f234134c86 430 *
sarwadenj 60:e8f234134c86 431 * @param sendData Pointer to the data to transfer to the FIFO.
sarwadenj 60:e8f234134c86 432 * @param sendLen Number of bytes to transfer to the FIFO.
sarwadenj 60:e8f234134c86 433 * @param backData NULL or pointer to buffer if data should be read back after executing the command.
sarwadenj 60:e8f234134c86 434 * @param backLen Max number of bytes to write to *backData. Out: The number of bytes returned.
sarwadenj 60:e8f234134c86 435 * @param validBits The number of valid bits in the last byte. 0 for 8 valid bits. Default NULL.
sarwadenj 60:e8f234134c86 436 * @param rxAlign Defines the bit position in backData[0] for the first bit received. Default 0.
sarwadenj 60:e8f234134c86 437 * @param checkCRC True => The last two bytes of the response is assumed to be a CRC_A that must be validated.
sarwadenj 60:e8f234134c86 438 *
sarwadenj 60:e8f234134c86 439 * @return STATUS_OK on success, STATUS_??? otherwise.
sarwadenj 60:e8f234134c86 440 */
sarwadenj 60:e8f234134c86 441 uint8_t PCD_TransceiveData (uint8_t *sendData,
sarwadenj 60:e8f234134c86 442 uint8_t sendLen,
sarwadenj 60:e8f234134c86 443 uint8_t *backData,
sarwadenj 60:e8f234134c86 444 uint8_t *backLen,
sarwadenj 60:e8f234134c86 445 uint8_t *validBits = NULL,
sarwadenj 60:e8f234134c86 446 uint8_t rxAlign = 0,
sarwadenj 60:e8f234134c86 447 bool checkCRC = false);
sarwadenj 60:e8f234134c86 448
sarwadenj 60:e8f234134c86 449
sarwadenj 60:e8f234134c86 450 /**
sarwadenj 60:e8f234134c86 451 * Transfers data to the MFRC522 FIFO, executes a commend, waits for completion and transfers data back from the FIFO.
sarwadenj 60:e8f234134c86 452 * CRC validation can only be done if backData and backLen are specified.
sarwadenj 60:e8f234134c86 453 *
sarwadenj 60:e8f234134c86 454 * @param command The command to execute. One of the PCD_Command enums.
sarwadenj 60:e8f234134c86 455 * @param waitIRq The bits in the ComIrqReg register that signals successful completion of the command.
sarwadenj 60:e8f234134c86 456 * @param sendData Pointer to the data to transfer to the FIFO.
sarwadenj 60:e8f234134c86 457 * @param sendLen Number of bytes to transfer to the FIFO.
sarwadenj 60:e8f234134c86 458 * @param backData NULL or pointer to buffer if data should be read back after executing the command.
sarwadenj 60:e8f234134c86 459 * @param backLen In: Max number of bytes to write to *backData. Out: The number of bytes returned.
sarwadenj 60:e8f234134c86 460 * @param validBits In/Out: The number of valid bits in the last byte. 0 for 8 valid bits.
sarwadenj 60:e8f234134c86 461 * @param rxAlign In: Defines the bit position in backData[0] for the first bit received. Default 0.
sarwadenj 60:e8f234134c86 462 * @param checkCRC In: True => The last two bytes of the response is assumed to be a CRC_A that must be validated.
sarwadenj 60:e8f234134c86 463 *
sarwadenj 60:e8f234134c86 464 * @return STATUS_OK on success, STATUS_??? otherwise.
sarwadenj 60:e8f234134c86 465 */
sarwadenj 60:e8f234134c86 466 uint8_t PCD_CommunicateWithPICC(uint8_t command,
sarwadenj 60:e8f234134c86 467 uint8_t waitIRq,
sarwadenj 60:e8f234134c86 468 uint8_t *sendData,
sarwadenj 60:e8f234134c86 469 uint8_t sendLen,
sarwadenj 60:e8f234134c86 470 uint8_t *backData = NULL,
sarwadenj 60:e8f234134c86 471 uint8_t *backLen = NULL,
sarwadenj 60:e8f234134c86 472 uint8_t *validBits = NULL,
sarwadenj 60:e8f234134c86 473 uint8_t rxAlign = 0,
sarwadenj 60:e8f234134c86 474 bool checkCRC = false);
sarwadenj 60:e8f234134c86 475
sarwadenj 60:e8f234134c86 476 /**
sarwadenj 60:e8f234134c86 477 * Transmits a REQuest command, Type A. Invites PICCs in state IDLE to go to READY and prepare for anticollision or selection. 7 bit frame.
sarwadenj 60:e8f234134c86 478 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
sarwadenj 60:e8f234134c86 479 *
sarwadenj 60:e8f234134c86 480 * @param bufferATQA The buffer to store the ATQA (Answer to request) in
sarwadenj 60:e8f234134c86 481 * @param bufferSize Buffer size, at least two bytes. Also number of bytes returned if STATUS_OK.
sarwadenj 60:e8f234134c86 482 *
sarwadenj 60:e8f234134c86 483 * @return STATUS_OK on success, STATUS_??? otherwise.
sarwadenj 60:e8f234134c86 484 */
sarwadenj 60:e8f234134c86 485 uint8_t PICC_RequestA (uint8_t *bufferATQA, uint8_t *bufferSize);
sarwadenj 60:e8f234134c86 486
sarwadenj 60:e8f234134c86 487 /**
sarwadenj 60:e8f234134c86 488 * Transmits a Wake-UP command, Type A. Invites PICCs in state IDLE and HALT to go to READY(*) and prepare for anticollision or selection. 7 bit frame.
sarwadenj 60:e8f234134c86 489 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
sarwadenj 60:e8f234134c86 490 *
sarwadenj 60:e8f234134c86 491 * @param bufferATQA The buffer to store the ATQA (Answer to request) in
sarwadenj 60:e8f234134c86 492 * @param bufferSize Buffer size, at least two bytes. Also number of bytes returned if STATUS_OK.
sarwadenj 60:e8f234134c86 493 *
sarwadenj 60:e8f234134c86 494 * @return STATUS_OK on success, STATUS_??? otherwise.
sarwadenj 60:e8f234134c86 495 */
sarwadenj 60:e8f234134c86 496 uint8_t PICC_WakeupA (uint8_t *bufferATQA, uint8_t *bufferSize);
sarwadenj 60:e8f234134c86 497
sarwadenj 60:e8f234134c86 498 /**
sarwadenj 60:e8f234134c86 499 * Transmits REQA or WUPA commands.
sarwadenj 60:e8f234134c86 500 * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design.
sarwadenj 60:e8f234134c86 501 *
sarwadenj 60:e8f234134c86 502 * @param command The command to send - PICC_CMD_REQA or PICC_CMD_WUPA
sarwadenj 60:e8f234134c86 503 * @param bufferATQA The buffer to store the ATQA (Answer to request) in
sarwadenj 60:e8f234134c86 504 * @param bufferSize Buffer size, at least two bytes. Also number of bytes returned if STATUS_OK.
sarwadenj 60:e8f234134c86 505 *
sarwadenj 60:e8f234134c86 506 * @return STATUS_OK on success, STATUS_??? otherwise.
sarwadenj 60:e8f234134c86 507 */
sarwadenj 60:e8f234134c86 508 uint8_t PICC_REQA_or_WUPA (uint8_t command, uint8_t *bufferATQA, uint8_t *bufferSize);
sarwadenj 60:e8f234134c86 509
sarwadenj 60:e8f234134c86 510 /**
sarwadenj 60:e8f234134c86 511 * Transmits SELECT/ANTICOLLISION commands to select a single PICC.
sarwadenj 60:e8f234134c86 512 * Before calling this function the PICCs must be placed in the READY(*) state by calling PICC_RequestA() or PICC_WakeupA().
sarwadenj 60:e8f234134c86 513 * On success:
sarwadenj 60:e8f234134c86 514 * - The chosen PICC is in state ACTIVE(*) and all other PICCs have returned to state IDLE/HALT. (Figure 7 of the ISO/IEC 14443-3 draft.)
sarwadenj 60:e8f234134c86 515 * - The UID size and value of the chosen PICC is returned in *uid along with the SAK.
sarwadenj 60:e8f234134c86 516 *
sarwadenj 60:e8f234134c86 517 * A PICC UID consists of 4, 7 or 10 bytes.
sarwadenj 60:e8f234134c86 518 * Only 4 bytes can be specified in a SELECT command, so for the longer UIDs two or three iterations are used:
sarwadenj 60:e8f234134c86 519 *
sarwadenj 60:e8f234134c86 520 * UID size Number of UID bytes Cascade levels Example of PICC
sarwadenj 60:e8f234134c86 521 * ======== =================== ============== ===============
sarwadenj 60:e8f234134c86 522 * single 4 1 MIFARE Classic
sarwadenj 60:e8f234134c86 523 * double 7 2 MIFARE Ultralight
sarwadenj 60:e8f234134c86 524 * triple 10 3 Not currently in use?
sarwadenj 60:e8f234134c86 525 *
sarwadenj 60:e8f234134c86 526 *
sarwadenj 60:e8f234134c86 527 * @param uid Pointer to Uid struct. Normally output, but can also be used to supply a known UID.
sarwadenj 60:e8f234134c86 528 * @param validBits The number of known UID bits supplied in *uid. Normally 0. If set you must also supply uid->size.
sarwadenj 60:e8f234134c86 529 *
sarwadenj 60:e8f234134c86 530 * @return STATUS_OK on success, STATUS_??? otherwise.
sarwadenj 60:e8f234134c86 531 */
sarwadenj 60:e8f234134c86 532 uint8_t PICC_Select (Uid *uid, uint8_t validBits = 0);
sarwadenj 60:e8f234134c86 533
sarwadenj 60:e8f234134c86 534 /**
sarwadenj 60:e8f234134c86 535 * Instructs a PICC in state ACTIVE(*) to go to state HALT.
sarwadenj 60:e8f234134c86 536 *
sarwadenj 60:e8f234134c86 537 * @return STATUS_OK on success, STATUS_??? otherwise.
sarwadenj 60:e8f234134c86 538 */
sarwadenj 60:e8f234134c86 539 uint8_t PICC_HaltA (void);
sarwadenj 60:e8f234134c86 540
sarwadenj 60:e8f234134c86 541 // ************************************************************************************
sarwadenj 60:e8f234134c86 542 //@}
sarwadenj 60:e8f234134c86 543
sarwadenj 60:e8f234134c86 544
sarwadenj 60:e8f234134c86 545 // ************************************************************************************
sarwadenj 60:e8f234134c86 546 //! @name Functions for communicating with MIFARE PICCs
sarwadenj 60:e8f234134c86 547 // ************************************************************************************
sarwadenj 60:e8f234134c86 548 //@{
sarwadenj 60:e8f234134c86 549
sarwadenj 60:e8f234134c86 550 /**
sarwadenj 60:e8f234134c86 551 * Executes the MFRC522 MFAuthent command.
sarwadenj 60:e8f234134c86 552 * This command manages MIFARE authentication to enable a secure communication to any MIFARE Mini, MIFARE 1K and MIFARE 4K card.
sarwadenj 60:e8f234134c86 553 * The authentication is described in the MFRC522 datasheet section 10.3.1.9 and http://www.nxp.com/documents/data_sheet/MF1S503x.pdf section 10.1.
sarwadenj 60:e8f234134c86 554 * For use with MIFARE Classic PICCs.
sarwadenj 60:e8f234134c86 555 * The PICC must be selected - ie in state ACTIVE(*) - before calling this function.
sarwadenj 60:e8f234134c86 556 * Remember to call PCD_StopCrypto1() after communicating with the authenticated PICC - otherwise no new communications can start.
sarwadenj 60:e8f234134c86 557 *
sarwadenj 60:e8f234134c86 558 * All keys are set to FFFFFFFFFFFFh at chip delivery.
sarwadenj 60:e8f234134c86 559 *
sarwadenj 60:e8f234134c86 560 * @param command PICC_CMD_MF_AUTH_KEY_A or PICC_CMD_MF_AUTH_KEY_B
sarwadenj 60:e8f234134c86 561 * @param blockAddr The block number. See numbering in the comments in the .h file.
sarwadenj 60:e8f234134c86 562 * @param key Pointer to the Crypteo1 key to use (6 bytes)
sarwadenj 60:e8f234134c86 563 * @param uid Pointer to Uid struct. The first 4 bytes of the UID is used.
sarwadenj 60:e8f234134c86 564 *
sarwadenj 60:e8f234134c86 565 * @return STATUS_OK on success, STATUS_??? otherwise. Probably STATUS_TIMEOUT if you supply the wrong key.
sarwadenj 60:e8f234134c86 566 */
sarwadenj 60:e8f234134c86 567 uint8_t PCD_Authenticate (uint8_t command, uint8_t blockAddr, MIFARE_Key *key, Uid *uid);
sarwadenj 60:e8f234134c86 568
sarwadenj 60:e8f234134c86 569 /**
sarwadenj 60:e8f234134c86 570 * Used to exit the PCD from its authenticated state.
sarwadenj 60:e8f234134c86 571 * Remember to call this function after communicating with an authenticated PICC - otherwise no new communications can start.
sarwadenj 60:e8f234134c86 572 */
sarwadenj 60:e8f234134c86 573 void PCD_StopCrypto1 (void);
sarwadenj 60:e8f234134c86 574
sarwadenj 60:e8f234134c86 575 /**
sarwadenj 60:e8f234134c86 576 * Reads 16 bytes (+ 2 bytes CRC_A) from the active PICC.
sarwadenj 60:e8f234134c86 577 *
sarwadenj 60:e8f234134c86 578 * For MIFARE Classic the sector containing the block must be authenticated before calling this function.
sarwadenj 60:e8f234134c86 579 *
sarwadenj 60:e8f234134c86 580 * For MIFARE Ultralight only addresses 00h to 0Fh are decoded.
sarwadenj 60:e8f234134c86 581 * The MF0ICU1 returns a NAK for higher addresses.
sarwadenj 60:e8f234134c86 582 * The MF0ICU1 responds to the READ command by sending 16 bytes starting from the page address defined by the command argument.
sarwadenj 60:e8f234134c86 583 * For example; if blockAddr is 03h then pages 03h, 04h, 05h, 06h are returned.
sarwadenj 60:e8f234134c86 584 * A roll-back is implemented: If blockAddr is 0Eh, then the contents of pages 0Eh, 0Fh, 00h and 01h are returned.
sarwadenj 60:e8f234134c86 585 *
sarwadenj 60:e8f234134c86 586 * The buffer must be at least 18 bytes because a CRC_A is also returned.
sarwadenj 60:e8f234134c86 587 * Checks the CRC_A before returning STATUS_OK.
sarwadenj 60:e8f234134c86 588 *
sarwadenj 60:e8f234134c86 589 * @param blockAddr MIFARE Classic: The block (0-0xff) number. MIFARE Ultralight: The first page to return data from.
sarwadenj 60:e8f234134c86 590 * @param buffer The buffer to store the data in
sarwadenj 60:e8f234134c86 591 * @param bufferSize Buffer size, at least 18 bytes. Also number of bytes returned if STATUS_OK.
sarwadenj 60:e8f234134c86 592 *
sarwadenj 60:e8f234134c86 593 * @return STATUS_OK on success, STATUS_??? otherwise.
sarwadenj 60:e8f234134c86 594 */
sarwadenj 60:e8f234134c86 595 uint8_t MIFARE_Read (uint8_t blockAddr, uint8_t *buffer, uint8_t *bufferSize);
sarwadenj 60:e8f234134c86 596
sarwadenj 60:e8f234134c86 597 /**
sarwadenj 60:e8f234134c86 598 * Writes 16 bytes to the active PICC.
sarwadenj 60:e8f234134c86 599 *
sarwadenj 60:e8f234134c86 600 * For MIFARE Classic the sector containing the block must be authenticated before calling this function.
sarwadenj 60:e8f234134c86 601 *
sarwadenj 60:e8f234134c86 602 * For MIFARE Ultralight the opretaion is called "COMPATIBILITY WRITE".
sarwadenj 60:e8f234134c86 603 * Even though 16 bytes are transferred to the Ultralight PICC, only the least significant 4 bytes (bytes 0 to 3)
sarwadenj 60:e8f234134c86 604 * are written to the specified address. It is recommended to set the remaining bytes 04h to 0Fh to all logic 0.
sarwadenj 60:e8f234134c86 605 *
sarwadenj 60:e8f234134c86 606 * @param blockAddr MIFARE Classic: The block (0-0xff) number. MIFARE Ultralight: The page (2-15) to write to.
sarwadenj 60:e8f234134c86 607 * @param buffer The 16 bytes to write to the PICC
sarwadenj 60:e8f234134c86 608 * @param bufferSize Buffer size, must be at least 16 bytes. Exactly 16 bytes are written.
sarwadenj 60:e8f234134c86 609 *
sarwadenj 60:e8f234134c86 610 * @return STATUS_OK on success, STATUS_??? otherwise.
sarwadenj 60:e8f234134c86 611 */
sarwadenj 60:e8f234134c86 612 uint8_t MIFARE_Write (uint8_t blockAddr, uint8_t *buffer, uint8_t bufferSize);
sarwadenj 60:e8f234134c86 613
sarwadenj 60:e8f234134c86 614 /**
sarwadenj 60:e8f234134c86 615 * Writes a 4 byte page to the active MIFARE Ultralight PICC.
sarwadenj 60:e8f234134c86 616 *
sarwadenj 60:e8f234134c86 617 * @param page The page (2-15) to write to.
sarwadenj 60:e8f234134c86 618 * @param buffer The 4 bytes to write to the PICC
sarwadenj 60:e8f234134c86 619 * @param bufferSize Buffer size, must be at least 4 bytes. Exactly 4 bytes are written.
sarwadenj 60:e8f234134c86 620 *
sarwadenj 60:e8f234134c86 621 * @return STATUS_OK on success, STATUS_??? otherwise.
sarwadenj 60:e8f234134c86 622 */
sarwadenj 60:e8f234134c86 623 uint8_t MIFARE_UltralightWrite(uint8_t page, uint8_t *buffer, uint8_t bufferSize);
sarwadenj 60:e8f234134c86 624
sarwadenj 60:e8f234134c86 625 /**
sarwadenj 60:e8f234134c86 626 * MIFARE Decrement subtracts the delta from the value of the addressed block, and stores the result in a volatile memory.
sarwadenj 60:e8f234134c86 627 * For MIFARE Classic only. The sector containing the block must be authenticated before calling this function.
sarwadenj 60:e8f234134c86 628 * Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001].
sarwadenj 60:e8f234134c86 629 * Use MIFARE_Transfer() to store the result in a block.
sarwadenj 60:e8f234134c86 630 *
sarwadenj 60:e8f234134c86 631 * @param blockAddr The block (0-0xff) number.
sarwadenj 60:e8f234134c86 632 * @param delta This number is subtracted from the value of block blockAddr.
sarwadenj 60:e8f234134c86 633 *
sarwadenj 60:e8f234134c86 634 * @return STATUS_OK on success, STATUS_??? otherwise.
sarwadenj 60:e8f234134c86 635 */
sarwadenj 60:e8f234134c86 636 uint8_t MIFARE_Decrement (uint8_t blockAddr, uint32_t delta);
sarwadenj 60:e8f234134c86 637
sarwadenj 60:e8f234134c86 638 /**
sarwadenj 60:e8f234134c86 639 * MIFARE Increment adds the delta to the value of the addressed block, and stores the result in a volatile memory.
sarwadenj 60:e8f234134c86 640 * For MIFARE Classic only. The sector containing the block must be authenticated before calling this function.
sarwadenj 60:e8f234134c86 641 * Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001].
sarwadenj 60:e8f234134c86 642 * Use MIFARE_Transfer() to store the result in a block.
sarwadenj 60:e8f234134c86 643 *
sarwadenj 60:e8f234134c86 644 * @param blockAddr The block (0-0xff) number.
sarwadenj 60:e8f234134c86 645 * @param delta This number is added to the value of block blockAddr.
sarwadenj 60:e8f234134c86 646 *
sarwadenj 60:e8f234134c86 647 * @return STATUS_OK on success, STATUS_??? otherwise.
sarwadenj 60:e8f234134c86 648 */
sarwadenj 60:e8f234134c86 649 uint8_t MIFARE_Increment (uint8_t blockAddr, uint32_t delta);
sarwadenj 60:e8f234134c86 650
sarwadenj 60:e8f234134c86 651 /**
sarwadenj 60:e8f234134c86 652 * MIFARE Restore copies the value of the addressed block into a volatile memory.
sarwadenj 60:e8f234134c86 653 * For MIFARE Classic only. The sector containing the block must be authenticated before calling this function.
sarwadenj 60:e8f234134c86 654 * Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001].
sarwadenj 60:e8f234134c86 655 * Use MIFARE_Transfer() to store the result in a block.
sarwadenj 60:e8f234134c86 656 *
sarwadenj 60:e8f234134c86 657 * @param blockAddr The block (0-0xff) number.
sarwadenj 60:e8f234134c86 658 *
sarwadenj 60:e8f234134c86 659 * @return STATUS_OK on success, STATUS_??? otherwise.
sarwadenj 60:e8f234134c86 660 */
sarwadenj 60:e8f234134c86 661 uint8_t MIFARE_Restore (uint8_t blockAddr);
sarwadenj 60:e8f234134c86 662
sarwadenj 60:e8f234134c86 663 /**
sarwadenj 60:e8f234134c86 664 * MIFARE Transfer writes the value stored in the volatile memory into one MIFARE Classic block.
sarwadenj 60:e8f234134c86 665 * For MIFARE Classic only. The sector containing the block must be authenticated before calling this function.
sarwadenj 60:e8f234134c86 666 * Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001].
sarwadenj 60:e8f234134c86 667 *
sarwadenj 60:e8f234134c86 668 * @param blockAddr The block (0-0xff) number.
sarwadenj 60:e8f234134c86 669 *
sarwadenj 60:e8f234134c86 670 * @return STATUS_OK on success, STATUS_??? otherwise.
sarwadenj 60:e8f234134c86 671 */
sarwadenj 60:e8f234134c86 672 uint8_t MIFARE_Transfer (uint8_t blockAddr);
sarwadenj 60:e8f234134c86 673
sarwadenj 60:e8f234134c86 674 // ************************************************************************************
sarwadenj 60:e8f234134c86 675 //@}
sarwadenj 60:e8f234134c86 676
sarwadenj 60:e8f234134c86 677
sarwadenj 60:e8f234134c86 678 // ************************************************************************************
sarwadenj 60:e8f234134c86 679 //! @name Support functions
sarwadenj 60:e8f234134c86 680 // ************************************************************************************
sarwadenj 60:e8f234134c86 681 //@{
sarwadenj 60:e8f234134c86 682
sarwadenj 60:e8f234134c86 683 /**
sarwadenj 60:e8f234134c86 684 * Wrapper for MIFARE protocol communication.
sarwadenj 60:e8f234134c86 685 * Adds CRC_A, executes the Transceive command and checks that the response is MF_ACK or a timeout.
sarwadenj 60:e8f234134c86 686 *
sarwadenj 60:e8f234134c86 687 * @param sendData Pointer to the data to transfer to the FIFO. Do NOT include the CRC_A.
sarwadenj 60:e8f234134c86 688 * @param sendLen Number of bytes in sendData.
sarwadenj 60:e8f234134c86 689 * @param acceptTimeout True => A timeout is also success
sarwadenj 60:e8f234134c86 690 *
sarwadenj 60:e8f234134c86 691 * @return STATUS_OK on success, STATUS_??? otherwise.
sarwadenj 60:e8f234134c86 692 */
sarwadenj 60:e8f234134c86 693 uint8_t PCD_MIFARE_Transceive(uint8_t *sendData, uint8_t sendLen, bool acceptTimeout = false);
sarwadenj 60:e8f234134c86 694
sarwadenj 60:e8f234134c86 695 /**
sarwadenj 60:e8f234134c86 696 * Translates the SAK (Select Acknowledge) to a PICC type.
sarwadenj 60:e8f234134c86 697 *
sarwadenj 60:e8f234134c86 698 * @param sak The SAK byte returned from PICC_Select().
sarwadenj 60:e8f234134c86 699 *
sarwadenj 60:e8f234134c86 700 * @return PICC_Type
sarwadenj 60:e8f234134c86 701 */
sarwadenj 60:e8f234134c86 702 uint8_t PICC_GetType (uint8_t sak);
sarwadenj 60:e8f234134c86 703
sarwadenj 60:e8f234134c86 704 /**
sarwadenj 60:e8f234134c86 705 * Returns a string pointer to the PICC type name.
sarwadenj 60:e8f234134c86 706 *
sarwadenj 60:e8f234134c86 707 * @param type One of the PICC_Type enums.
sarwadenj 60:e8f234134c86 708 *
sarwadenj 60:e8f234134c86 709 * @return A string pointer to the PICC type name.
sarwadenj 60:e8f234134c86 710 */
sarwadenj 60:e8f234134c86 711 char* PICC_GetTypeName (uint8_t type);
sarwadenj 60:e8f234134c86 712
sarwadenj 60:e8f234134c86 713 /**
sarwadenj 60:e8f234134c86 714 * Returns a string pointer to a status code name.
sarwadenj 60:e8f234134c86 715 *
sarwadenj 60:e8f234134c86 716 * @param code One of the StatusCode enums.
sarwadenj 60:e8f234134c86 717 *
sarwadenj 60:e8f234134c86 718 * @return A string pointer to a status code name.
sarwadenj 60:e8f234134c86 719 */
sarwadenj 60:e8f234134c86 720 char* GetStatusCodeName (uint8_t code);
sarwadenj 60:e8f234134c86 721
sarwadenj 60:e8f234134c86 722 /**
sarwadenj 60:e8f234134c86 723 * Calculates the bit pattern needed for the specified access bits. In the [C1 C2 C3] tupples C1 is MSB (=4) and C3 is LSB (=1).
sarwadenj 60:e8f234134c86 724 *
sarwadenj 60:e8f234134c86 725 * @param accessBitBuffer Pointer to byte 6, 7 and 8 in the sector trailer. Bytes [0..2] will be set.
sarwadenj 60:e8f234134c86 726 * @param g0 Access bits [C1 C2 C3] for block 0 (for sectors 0-31) or blocks 0-4 (for sectors 32-39)
sarwadenj 60:e8f234134c86 727 * @param g1 Access bits [C1 C2 C3] for block 1 (for sectors 0-31) or blocks 5-9 (for sectors 32-39)
sarwadenj 60:e8f234134c86 728 * @param g2 Access bits [C1 C2 C3] for block 2 (for sectors 0-31) or blocks 10-14 (for sectors 32-39)
sarwadenj 60:e8f234134c86 729 * @param g3 Access bits [C1 C2 C3] for the sector trailer, block 3 (for sectors 0-31) or block 15 (for sectors 32-39)
sarwadenj 60:e8f234134c86 730 */
sarwadenj 60:e8f234134c86 731 void MIFARE_SetAccessBits (uint8_t *accessBitBuffer,
sarwadenj 60:e8f234134c86 732 uint8_t g0,
sarwadenj 60:e8f234134c86 733 uint8_t g1,
sarwadenj 60:e8f234134c86 734 uint8_t g2,
sarwadenj 60:e8f234134c86 735 uint8_t g3);
sarwadenj 60:e8f234134c86 736
sarwadenj 60:e8f234134c86 737 // ************************************************************************************
sarwadenj 60:e8f234134c86 738 //@}
sarwadenj 60:e8f234134c86 739
sarwadenj 60:e8f234134c86 740
sarwadenj 60:e8f234134c86 741 // ************************************************************************************
sarwadenj 60:e8f234134c86 742 //! @name Convenience functions - does not add extra functionality
sarwadenj 60:e8f234134c86 743 // ************************************************************************************
sarwadenj 60:e8f234134c86 744 //@{
sarwadenj 60:e8f234134c86 745
sarwadenj 60:e8f234134c86 746 /**
sarwadenj 60:e8f234134c86 747 * Returns true if a PICC responds to PICC_CMD_REQA.
sarwadenj 60:e8f234134c86 748 * Only "new" cards in state IDLE are invited. Sleeping cards in state HALT are ignored.
sarwadenj 60:e8f234134c86 749 *
sarwadenj 60:e8f234134c86 750 * @return bool
sarwadenj 60:e8f234134c86 751 */
sarwadenj 60:e8f234134c86 752 bool PICC_IsNewCardPresent(void);
sarwadenj 60:e8f234134c86 753
sarwadenj 60:e8f234134c86 754 /**
sarwadenj 60:e8f234134c86 755 * Simple wrapper around PICC_Select.
sarwadenj 60:e8f234134c86 756 * Returns true if a UID could be read.
sarwadenj 60:e8f234134c86 757 * Remember to call PICC_IsNewCardPresent(), PICC_RequestA() or PICC_WakeupA() first.
sarwadenj 60:e8f234134c86 758 * The read UID is available in the class variable uid.
sarwadenj 60:e8f234134c86 759 *
sarwadenj 60:e8f234134c86 760 * @return bool
sarwadenj 60:e8f234134c86 761 */
sarwadenj 60:e8f234134c86 762 bool PICC_ReadCardSerial (void);
sarwadenj 60:e8f234134c86 763
sarwadenj 60:e8f234134c86 764 void PCD_DumpVersionToSerial(char * dump);
sarwadenj 60:e8f234134c86 765 // ************************************************************************************
sarwadenj 60:e8f234134c86 766 //@}
sarwadenj 60:e8f234134c86 767
sarwadenj 60:e8f234134c86 768
sarwadenj 60:e8f234134c86 769 private:
sarwadenj 60:e8f234134c86 770 SPI m_SPI;
sarwadenj 60:e8f234134c86 771 DigitalOut m_CS;
sarwadenj 60:e8f234134c86 772 DigitalOut m_RESET;
sarwadenj 60:e8f234134c86 773
sarwadenj 60:e8f234134c86 774 /**
sarwadenj 60:e8f234134c86 775 * Helper function for the two-step MIFARE Classic protocol operations Decrement, Increment and Restore.
sarwadenj 60:e8f234134c86 776 *
sarwadenj 60:e8f234134c86 777 * @param command The command to use
sarwadenj 60:e8f234134c86 778 * @param blockAddr The block (0-0xff) number.
sarwadenj 60:e8f234134c86 779 * @param data The data to transfer in step 2
sarwadenj 60:e8f234134c86 780 *
sarwadenj 60:e8f234134c86 781 * @return STATUS_OK on success, STATUS_??? otherwise.
sarwadenj 60:e8f234134c86 782 */
sarwadenj 60:e8f234134c86 783 uint8_t MIFARE_TwoStepHelper(uint8_t command, uint8_t blockAddr, uint32_t data);
sarwadenj 60:e8f234134c86 784 };
sarwadenj 60:e8f234134c86 785
sarwadenj 60:e8f234134c86 786 #endif