Diff: RFM69.cpp

Revision:

1:59f91670db51

Parent:

0:db6e4ce9dc02

--- a/RFM69.cpp	Sun Mar 08 17:13:43 2015 +0000
+++ b/RFM69.cpp	Sat Jun 09 14:12:37 2018 +0000
@@ -97,7 +97,7 @@
     /* 0x25 */ { REG_DIOMAPPING1, RF_DIOMAPPING1_DIO0_01 }, // DIO0 is the only IRQ we're using
     /* 0x26 */ { REG_DIOMAPPING2, RF_DIOMAPPING2_CLKOUT_OFF }, // DIO5 ClkOut disable for power saving
     /* 0x28 */ { REG_IRQFLAGS2, RF_IRQFLAGS2_FIFOOVERRUN }, // writing to this bit ensures that the FIFO & status flags are reset
-    /* 0x29 */ { REG_RSSITHRESH, 220 }, // must be set to dBm = (-Sensitivity / 2), default is 0xE4 = 228 so -114dBm
+    /* 0x29 */ { REG_RSSITHRESH, 0xE4 }, // must be set to dBm = (-Sensitivity / 2), default is 0xE4 = 228 so -114dBm
     ///* 0x2D */ { REG_PREAMBLELSB, RF_PREAMBLESIZE_LSB_VALUE } // default 3 preamble bytes 0xAAAAAA
     /* 0x2E */ { REG_SYNCCONFIG, RF_SYNC_ON | RF_SYNC_FIFOFILL_AUTO | RF_SYNC_SIZE_2 | RF_SYNC_TOL_0 },
     /* 0x2F */ { REG_SYNCVALUE1, 0x2D },      // attempt to make this compatible with sync1 byte of RFM12B lib
@@ -505,6 +505,18 @@
     return val;
 }
 
+int16_t RFM69::noise()
+{
+    int16_t rssi = 0;
+    writeReg(REG_RSSICONFIG, RF_RSSI_START);
+    while ((readReg(REG_RSSICONFIG) & RF_RSSI_DONE) == 0x00); // wait for RSSI_Ready
+
+  	rssi = -readReg(REG_RSSIVALUE);
+     rssi >>= 1;
+	  
+	  return rssi;
+}
+
 void RFM69::writeReg(uint8_t addr, uint8_t value)
 {
     select();