CDMS_CODE_samp_23SEP_DMA_flag

Dependencies:   FreescaleIAP SimpleDMA mbed-rtos mbed

Fork of CDMS_CODE_samp_23SEP_DMA by iitm sat

Committer:
shreeshas95
Date:
Mon Dec 14 12:04:01 2015 +0000
Revision:
1:a0055b3280c8
Child:
2:2caf2a9a13aa
Simple working version code

Who changed what in which revision?

UserRevisionLine numberNew contents of line
shreeshas95 1:a0055b3280c8 1 //without reset feature , with state checks.
shreeshas95 1:a0055b3280c8 2 DigitalOut led2(LED_RED);
shreeshas95 1:a0055b3280c8 3 InterruptIn IRQ(PTA14);
shreeshas95 1:a0055b3280c8 4 Ticker ticker;
shreeshas95 1:a0055b3280c8 5
shreeshas95 1:a0055b3280c8 6 bool sent_tmfrom_SDcard;
shreeshas95 1:a0055b3280c8 7 bool loop_on;
shreeshas95 1:a0055b3280c8 8 bool ADF_off;
shreeshas95 1:a0055b3280c8 9 bool buffer_state;
shreeshas95 1:a0055b3280c8 10 uint8_t signal = 0x00;
shreeshas95 1:a0055b3280c8 11 unsigned char bbram_buffer[66]={0x19,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x33,0x00,0xF4,0xC2,0x10,0xC0,0x00,0x30,0x31,0x07,0x00,0x01,0x00,0x7F,0x00,0x0B,0x37,0x00,0x00,0x40,0x0C,0x00,0x05,0x00,0x00,0x18,0x12,0x34,0x56,0x10,0x10,0xC4,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x00,0x00};
shreeshas95 1:a0055b3280c8 12
shreeshas95 1:a0055b3280c8 13 int initialise_card();
shreeshas95 1:a0055b3280c8 14 int disk_initialize();
shreeshas95 1:a0055b3280c8 15
shreeshas95 1:a0055b3280c8 16 #define bbram_write {\
shreeshas95 1:a0055b3280c8 17 SPI_mutex.lock();\
shreeshas95 1:a0055b3280c8 18 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 19 spi.write(0xB0);\
shreeshas95 1:a0055b3280c8 20 wait_us(300);\
shreeshas95 1:a0055b3280c8 21 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 22 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 23 for(int i=0;i<66;i++){\
shreeshas95 1:a0055b3280c8 24 spi.write(bbram_buffer[i]);\
shreeshas95 1:a0055b3280c8 25 }\
shreeshas95 1:a0055b3280c8 26 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 27 SPI_mutex.unlock();\
shreeshas95 1:a0055b3280c8 28 }
shreeshas95 1:a0055b3280c8 29 //------------------------------------------------------------------------
shreeshas95 1:a0055b3280c8 30 // state checking functions
shreeshas95 1:a0055b3280c8 31 //bool assrt_phy_off( int, int, int);
shreeshas95 1:a0055b3280c8 32 //bool assrt_phy_on( int,int,int);
shreeshas95 1:a0055b3280c8 33 //bool assrt_phy_tx(int,int,int);
shreeshas95 1:a0055b3280c8 34
shreeshas95 1:a0055b3280c8 35 #define START_ADDRESS 0x020;
shreeshas95 1:a0055b3280c8 36 #define MISO_PIN PTE3
shreeshas95 1:a0055b3280c8 37 /**************Defining Counter Limits**************/
shreeshas95 1:a0055b3280c8 38 #define THRS 20
shreeshas95 1:a0055b3280c8 39 #define STATE_ERR_THRS 20
shreeshas95 1:a0055b3280c8 40 #define PHY_OFF_EXEC_TIME 300
shreeshas95 1:a0055b3280c8 41 #define PHY_ON_EXEC_TIME 300
shreeshas95 1:a0055b3280c8 42 #define PHY_TX_EXEC_TIME 600
shreeshas95 1:a0055b3280c8 43 /******DEFINING COMMANDS*********/
shreeshas95 1:a0055b3280c8 44 #define CMD_HW_RESET 0xC8
shreeshas95 1:a0055b3280c8 45 #define CMD_PHY_ON 0xB1
shreeshas95 1:a0055b3280c8 46 #define CMD_PHY_OFF 0xB0
shreeshas95 1:a0055b3280c8 47 #define CMD_PHY_TX 0xB5
shreeshas95 1:a0055b3280c8 48 #define CMD_CONFIG_DEV 0xBB
shreeshas95 1:a0055b3280c8 49
shreeshas95 1:a0055b3280c8 50 #define check_status {\
shreeshas95 1:a0055b3280c8 51 unsigned char stat=0;\
shreeshas95 1:a0055b3280c8 52 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 53 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 54 stat = spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 55 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 56 status = stat;\
shreeshas95 1:a0055b3280c8 57 }
shreeshas95 1:a0055b3280c8 58
shreeshas95 1:a0055b3280c8 59 // all three arguments are int
shreeshas95 1:a0055b3280c8 60 #define assrt_phy_off(return_this) {\
shreeshas95 1:a0055b3280c8 61 int cmd_err_cnt = 0;\
shreeshas95 1:a0055b3280c8 62 int spi_err_cnt = 0;\
shreeshas95 1:a0055b3280c8 63 int state_err_cnt = 0;\
shreeshas95 1:a0055b3280c8 64 for(int i = 0 ; i < 40 ;i++){\
shreeshas95 1:a0055b3280c8 65 check_status;\
shreeshas95 1:a0055b3280c8 66 if(status == 0xB1){\
shreeshas95 1:a0055b3280c8 67 return_this = 0;\
shreeshas95 1:a0055b3280c8 68 break;\
shreeshas95 1:a0055b3280c8 69 }\
shreeshas95 1:a0055b3280c8 70 else if(cmd_err_cnt>THRS||spi_err_cnt>THRS){\
shreeshas95 1:a0055b3280c8 71 return_this = 1;\
shreeshas95 1:a0055b3280c8 72 break;\
shreeshas95 1:a0055b3280c8 73 }\
shreeshas95 1:a0055b3280c8 74 else if(state_err_cnt>STATE_ERR_THRS){\
shreeshas95 1:a0055b3280c8 75 return_this = 1;\
shreeshas95 1:a0055b3280c8 76 break;\
shreeshas95 1:a0055b3280c8 77 }\
shreeshas95 1:a0055b3280c8 78 else if( (status & 0xA0) == 0xA0 ){\
shreeshas95 1:a0055b3280c8 79 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 80 spi.write(CMD_PHY_OFF);\
shreeshas95 1:a0055b3280c8 81 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 82 wait_us(PHY_OFF_EXEC_TIME);\
shreeshas95 1:a0055b3280c8 83 state_err_cnt++;\
shreeshas95 1:a0055b3280c8 84 }\
shreeshas95 1:a0055b3280c8 85 else if(status&0x80==0x00){\
shreeshas95 1:a0055b3280c8 86 wait_ms(5);\
shreeshas95 1:a0055b3280c8 87 spi_err_cnt++;\
shreeshas95 1:a0055b3280c8 88 }\
shreeshas95 1:a0055b3280c8 89 else {\
shreeshas95 1:a0055b3280c8 90 wait_ms(1);\
shreeshas95 1:a0055b3280c8 91 cmd_err_cnt++;\
shreeshas95 1:a0055b3280c8 92 }\
shreeshas95 1:a0055b3280c8 93 }\
shreeshas95 1:a0055b3280c8 94 }
shreeshas95 1:a0055b3280c8 95
shreeshas95 1:a0055b3280c8 96
shreeshas95 1:a0055b3280c8 97 //#define assrt_phy_on(cmd_err_cnt, spi_err_cnt, state_err_cnt, return_this){\
shreeshas95 1:a0055b3280c8 98 // status=check_status();\
shreeshas95 1:a0055b3280c8 99 // if((status&0x1F)==0x12){\
shreeshas95 1:a0055b3280c8 100 // return 0;\
shreeshas95 1:a0055b3280c8 101 // }\
shreeshas95 1:a0055b3280c8 102 // else if(cmd_err_cnt>THRS||spi_err_cnt>THRS){\
shreeshas95 1:a0055b3280c8 103 // return 1;\
shreeshas95 1:a0055b3280c8 104 // }\
shreeshas95 1:a0055b3280c8 105 // else if(state_err_cnt>STATE_ERR_THRS){\
shreeshas95 1:a0055b3280c8 106 // return 1;\
shreeshas95 1:a0055b3280c8 107 // }\
shreeshas95 1:a0055b3280c8 108 // else if((status&0xA0)==0xA0){\
shreeshas95 1:a0055b3280c8 109 // cs_adf=0;\
shreeshas95 1:a0055b3280c8 110 // spi.write(0xB1);\
shreeshas95 1:a0055b3280c8 111 // cs_adf=1;\
shreeshas95 1:a0055b3280c8 112 // wait_us(PHY_ON_EXEC_TIME);\
shreeshas95 1:a0055b3280c8 113 // return assrt_phy_on(cmd_err_cnt,spi_err_cnt,state_err_cnt+1);\
shreeshas95 1:a0055b3280c8 114 // }\
shreeshas95 1:a0055b3280c8 115 // else if(status&0x80==0x00){\
shreeshas95 1:a0055b3280c8 116 // wait_ms(5);\
shreeshas95 1:a0055b3280c8 117 // //Error: SPI=0 Not ready CMD= Dont care
shreeshas95 1:a0055b3280c8 118 // return assrt_phy_on(cmd_err_cnt,spi_err_cnt+1,state_err_cnt);\
shreeshas95 1:a0055b3280c8 119 // }\
shreeshas95 1:a0055b3280c8 120 // else{\
shreeshas95 1:a0055b3280c8 121 // if(status&0xA0==0x80){\
shreeshas95 1:a0055b3280c8 122 // wait_ms(1);\
shreeshas95 1:a0055b3280c8 123 // //Error: Command Not ready SPI Ready cmd_err_cnt is a global variable
shreeshas95 1:a0055b3280c8 124 // return assrt_phy_on(cmd_err_cnt+1,spi_err_cnt,state_err_cnt);\
shreeshas95 1:a0055b3280c8 125 // }\
shreeshas95 1:a0055b3280c8 126 // }\
shreeshas95 1:a0055b3280c8 127 //}
shreeshas95 1:a0055b3280c8 128
shreeshas95 1:a0055b3280c8 129
shreeshas95 1:a0055b3280c8 130
shreeshas95 1:a0055b3280c8 131
shreeshas95 1:a0055b3280c8 132 #define initial_adf_check {\
shreeshas95 1:a0055b3280c8 133 spi.write(CMD_PHY_OFF);\
shreeshas95 1:a0055b3280c8 134 int tempReturn = 0;\
shreeshas95 1:a0055b3280c8 135 while( hw_reset_err_cnt < 2 ){\
shreeshas95 1:a0055b3280c8 136 assrt_phy_off( tempReturn);\
shreeshas95 1:a0055b3280c8 137 if( !tempReturn ){\
shreeshas95 1:a0055b3280c8 138 bbram_write;\
shreeshas95 1:a0055b3280c8 139 bbram_flag=1;\
shreeshas95 1:a0055b3280c8 140 break;\
shreeshas95 1:a0055b3280c8 141 }\
shreeshas95 1:a0055b3280c8 142 else{\
shreeshas95 1:a0055b3280c8 143 hardware_reset(0);\
shreeshas95 1:a0055b3280c8 144 hw_reset_err_cnt++;\
shreeshas95 1:a0055b3280c8 145 }\
shreeshas95 1:a0055b3280c8 146 }\
shreeshas95 1:a0055b3280c8 147 assrt_phy_off(tempReturn);\
shreeshas95 1:a0055b3280c8 148 if(!bbram_flag){\
shreeshas95 1:a0055b3280c8 149 bcn_flag=1;\
shreeshas95 1:a0055b3280c8 150 }\
shreeshas95 1:a0055b3280c8 151 }
shreeshas95 1:a0055b3280c8 152
shreeshas95 1:a0055b3280c8 153 unsigned char status =0;
shreeshas95 1:a0055b3280c8 154 unsigned int cmd_err_cnt=0;
shreeshas95 1:a0055b3280c8 155 unsigned int state_err_cnt=0;
shreeshas95 1:a0055b3280c8 156 unsigned int miso_err_cnt=0;
shreeshas95 1:a0055b3280c8 157 unsigned int hw_reset_err_cnt=0;
shreeshas95 1:a0055b3280c8 158 bool bcn_flag=0;
shreeshas95 1:a0055b3280c8 159 bool bbram_flag=0;
shreeshas95 1:a0055b3280c8 160
shreeshas95 1:a0055b3280c8 161 //bool assrt_phy_off(int cmd_err_cnt,int spi_err_cnt,int state_err_cnt){
shreeshas95 1:a0055b3280c8 162 // status=check_status();
shreeshas95 1:a0055b3280c8 163 // if(status==0xB1){
shreeshas95 1:a0055b3280c8 164 // return 0;
shreeshas95 1:a0055b3280c8 165 // }
shreeshas95 1:a0055b3280c8 166 // else if(cmd_err_cnt>THRS||spi_err_cnt>THRS){
shreeshas95 1:a0055b3280c8 167 // return 1;//You need to Reset the hardware
shreeshas95 1:a0055b3280c8 168 // }
shreeshas95 1:a0055b3280c8 169 // else if(state_err_cnt>STATE_ERR_THRS){
shreeshas95 1:a0055b3280c8 170 // return 1;//Again reset the hardware
shreeshas95 1:a0055b3280c8 171 // }
shreeshas95 1:a0055b3280c8 172 // else if((status&0xA0)==0xA0){ //If Status' first three bit ore 0b1X1 =>SPI ready, Dont care interrupt and CMD Ready.
shreeshas95 1:a0055b3280c8 173 // cs_adf=0;
shreeshas95 1:a0055b3280c8 174 // spi.write(CMD_PHY_OFF); //CMD_PHY_OFF=0xB0
shreeshas95 1:a0055b3280c8 175 // cs_adf=1;
shreeshas95 1:a0055b3280c8 176 // wait_us(PHY_OFF_EXEC_TIME);// Typical = 24us We are giving 300us
shreeshas95 1:a0055b3280c8 177 // return assrt_phy_off(cmd_err_cnt,spi_err_cnt,state_err_cnt+1);
shreeshas95 1:a0055b3280c8 178 // }
shreeshas95 1:a0055b3280c8 179 // else if(status&0x80==0x00){
shreeshas95 1:a0055b3280c8 180 // wait_ms(5);
shreeshas95 1:a0055b3280c8 181 // //Error: SPI=0 Not ready CMD= Dont care
shreeshas95 1:a0055b3280c8 182 // return assrt_phy_off(cmd_err_cnt,spi_err_cnt+1,state_err_cnt);
shreeshas95 1:a0055b3280c8 183 // }
shreeshas95 1:a0055b3280c8 184 // else {//if(status&0xA0==0x80){
shreeshas95 1:a0055b3280c8 185 // wait_ms(1);
shreeshas95 1:a0055b3280c8 186 // //Error: Command Not ready SPI Ready cmd_err_cnt is a global variable
shreeshas95 1:a0055b3280c8 187 // return assrt_phy_off(cmd_err_cnt+1,spi_err_cnt,state_err_cnt);
shreeshas95 1:a0055b3280c8 188 // }
shreeshas95 1:a0055b3280c8 189 //}
shreeshas95 1:a0055b3280c8 190
shreeshas95 1:a0055b3280c8 191 //bool assrt_phy_on(int cmd_err_cnt,int spi_err_cnt,int state_err_cnt){
shreeshas95 1:a0055b3280c8 192 // status=check_status();
shreeshas95 1:a0055b3280c8 193 // if((status&0x1F)==0x12){
shreeshas95 1:a0055b3280c8 194 // return 0;
shreeshas95 1:a0055b3280c8 195 // }
shreeshas95 1:a0055b3280c8 196 // else if(cmd_err_cnt>THRS||spi_err_cnt>THRS){
shreeshas95 1:a0055b3280c8 197 // return 1;//You need to Reset the hardware
shreeshas95 1:a0055b3280c8 198 // }
shreeshas95 1:a0055b3280c8 199 // else if(state_err_cnt>STATE_ERR_THRS){
shreeshas95 1:a0055b3280c8 200 // return 1;//Again reset the hardware
shreeshas95 1:a0055b3280c8 201 // }
shreeshas95 1:a0055b3280c8 202 // else if((status&0xA0)==0xA0){ //If Status' first three bit ore 0b1X1 =>SPI ready, Dont care interrupt and CMD Ready.
shreeshas95 1:a0055b3280c8 203 // cs_adf=0;
shreeshas95 1:a0055b3280c8 204 // spi.write(0xB1); //CMD_PHY_OFF
shreeshas95 1:a0055b3280c8 205 // cs_adf=1;
shreeshas95 1:a0055b3280c8 206 // wait_us(PHY_ON_EXEC_TIME);// Typical = 24us We are giving 300us
shreeshas95 1:a0055b3280c8 207 // return assrt_phy_on(cmd_err_cnt,spi_err_cnt,state_err_cnt+1);
shreeshas95 1:a0055b3280c8 208 // }
shreeshas95 1:a0055b3280c8 209 // else if(status&0x80==0x00){
shreeshas95 1:a0055b3280c8 210 // wait_ms(5);
shreeshas95 1:a0055b3280c8 211 // //Error: SPI=0 Not ready CMD= Dont care
shreeshas95 1:a0055b3280c8 212 // return assrt_phy_on(cmd_err_cnt,spi_err_cnt+1,state_err_cnt);
shreeshas95 1:a0055b3280c8 213 // }
shreeshas95 1:a0055b3280c8 214 // else{
shreeshas95 1:a0055b3280c8 215 // if(status&0xA0==0x80){
shreeshas95 1:a0055b3280c8 216 // wait_ms(1);
shreeshas95 1:a0055b3280c8 217 // //Error: Command Not ready SPI Ready cmd_err_cnt is a global variable
shreeshas95 1:a0055b3280c8 218 // return assrt_phy_on(cmd_err_cnt+1,spi_err_cnt,state_err_cnt);
shreeshas95 1:a0055b3280c8 219 // }
shreeshas95 1:a0055b3280c8 220 // }
shreeshas95 1:a0055b3280c8 221 //}
shreeshas95 1:a0055b3280c8 222
shreeshas95 1:a0055b3280c8 223
shreeshas95 1:a0055b3280c8 224 // bool assrt_phy_tx(int cmd_err_cnt,int spi_err_cnt,int state_err_cnt){
shreeshas95 1:a0055b3280c8 225 // status=check_status();
shreeshas95 1:a0055b3280c8 226 // if((status & 0x1F) == 0x14){
shreeshas95 1:a0055b3280c8 227 // return 0;
shreeshas95 1:a0055b3280c8 228 // }
shreeshas95 1:a0055b3280c8 229 // else if(cmd_err_cnt>THRS||spi_err_cnt>THRS){
shreeshas95 1:a0055b3280c8 230 // return 1;//You need to Reset the hardware
shreeshas95 1:a0055b3280c8 231 // }
shreeshas95 1:a0055b3280c8 232 // else if(state_err_cnt>STATE_ERR_THRS){
shreeshas95 1:a0055b3280c8 233 // return 1;//Again reset the hardware
shreeshas95 1:a0055b3280c8 234 // }
shreeshas95 1:a0055b3280c8 235 // else if((status&0xA0)==0xA0){ //If Status' first three bit ore 0b1X1 =>SPI ready, Dont care interrupt and CMD Ready.
shreeshas95 1:a0055b3280c8 236 // cs_adf=0;
shreeshas95 1:a0055b3280c8 237 // spi.write(0xB1); //CMD_PHY_OFF
shreeshas95 1:a0055b3280c8 238 // cs_adf=1;
shreeshas95 1:a0055b3280c8 239 // wait_us(PHY_TX_EXEC_TIME);// Typical = 24us We are giving 300us
shreeshas95 1:a0055b3280c8 240 // return assrt_phy_tx(cmd_err_cnt,spi_err_cnt,state_err_cnt+1);
shreeshas95 1:a0055b3280c8 241 // }
shreeshas95 1:a0055b3280c8 242 // else if(status&0x80==0x00){
shreeshas95 1:a0055b3280c8 243 // wait_ms(1);
shreeshas95 1:a0055b3280c8 244 // //Error: SPI=0 Not ready CMD= Dont care
shreeshas95 1:a0055b3280c8 245 // return assrt_phy_tx(cmd_err_cnt,spi_err_cnt+1,state_err_cnt);
shreeshas95 1:a0055b3280c8 246 // }
shreeshas95 1:a0055b3280c8 247 // else {
shreeshas95 1:a0055b3280c8 248 // if(status&0xA0==0x80){
shreeshas95 1:a0055b3280c8 249 // wait_us(50);
shreeshas95 1:a0055b3280c8 250 // //Error: Command Not ready SPI Ready cmd_err_cnt is a global variable
shreeshas95 1:a0055b3280c8 251 // return assrt_phy_tx(cmd_err_cnt+1,spi_err_cnt,state_err_cnt);
shreeshas95 1:a0055b3280c8 252 // }
shreeshas95 1:a0055b3280c8 253 // }
shreeshas95 1:a0055b3280c8 254 //}
shreeshas95 1:a0055b3280c8 255
shreeshas95 1:a0055b3280c8 256 bool hardware_reset(int bcn_call){
shreeshas95 1:a0055b3280c8 257 for(int i= 0; i < 20 ; i++){
shreeshas95 1:a0055b3280c8 258 gCS_ADF=0;
shreeshas95 1:a0055b3280c8 259 spi.write(CMD_HW_RESET);
shreeshas95 1:a0055b3280c8 260 gCS_ADF=1;
shreeshas95 1:a0055b3280c8 261 wait_ms(2);// Typically 1 ms
shreeshas95 1:a0055b3280c8 262 int count=0;
shreeshas95 1:a0055b3280c8 263 int temp_return = 0;
shreeshas95 1:a0055b3280c8 264 while(count<10 && miso_err_cnt<10){
shreeshas95 1:a0055b3280c8 265 if(MISO_PIN){
shreeshas95 1:a0055b3280c8 266 assrt_phy_off(temp_return);
shreeshas95 1:a0055b3280c8 267 if(!temp_return){
shreeshas95 1:a0055b3280c8 268 return 0;
shreeshas95 1:a0055b3280c8 269 }
shreeshas95 1:a0055b3280c8 270 count++;
shreeshas95 1:a0055b3280c8 271 }
shreeshas95 1:a0055b3280c8 272 else{
shreeshas95 1:a0055b3280c8 273 wait_us(50);
shreeshas95 1:a0055b3280c8 274 miso_err_cnt++;
shreeshas95 1:a0055b3280c8 275 }
shreeshas95 1:a0055b3280c8 276 }
shreeshas95 1:a0055b3280c8 277 }
shreeshas95 1:a0055b3280c8 278 return 1;
shreeshas95 1:a0055b3280c8 279 }
shreeshas95 1:a0055b3280c8 280
shreeshas95 1:a0055b3280c8 281 //bool hardware_reset(int bcn_call){
shreeshas95 1:a0055b3280c8 282 // if (bcn_call>20){//Worst Case 20seconds will be lost !
shreeshas95 1:a0055b3280c8 283 // return 1;
shreeshas95 1:a0055b3280c8 284 // }
shreeshas95 1:a0055b3280c8 285 // int count=0;
shreeshas95 1:a0055b3280c8 286 // cs_adf=0;
shreeshas95 1:a0055b3280c8 287 // spi.write(CMD_HW_RESET);
shreeshas95 1:a0055b3280c8 288 // cs_adf=1;
shreeshas95 1:a0055b3280c8 289 // wait_ms(2);// Typically 1 ms
shreeshas95 1:a0055b3280c8 290 // while(count<10 && miso_err_cnt<10){
shreeshas95 1:a0055b3280c8 291 // if(MISO_PIN){
shreeshas95 1:a0055b3280c8 292 // int temp_return;
shreeshas95 1:a0055b3280c8 293 // assrt_phy_off(0,0,0,temp_return);
shreeshas95 1:a0055b3280c8 294 // if(!temp_return){
shreeshas95 1:a0055b3280c8 295 // break;
shreeshas95 1:a0055b3280c8 296 // }
shreeshas95 1:a0055b3280c8 297 // count++;
shreeshas95 1:a0055b3280c8 298 // }
shreeshas95 1:a0055b3280c8 299 // else{
shreeshas95 1:a0055b3280c8 300 // wait_us(50);
shreeshas95 1:a0055b3280c8 301 // miso_err_cnt++;
shreeshas95 1:a0055b3280c8 302 // }
shreeshas95 1:a0055b3280c8 303 // }
shreeshas95 1:a0055b3280c8 304 // if(count==10 ||miso_err_cnt==10){
shreeshas95 1:a0055b3280c8 305 // return hardware_reset(bcn_call+1);
shreeshas95 1:a0055b3280c8 306 // }
shreeshas95 1:a0055b3280c8 307 // else
shreeshas95 1:a0055b3280c8 308 // return 0;
shreeshas95 1:a0055b3280c8 309 //
shreeshas95 1:a0055b3280c8 310 //}
shreeshas95 1:a0055b3280c8 311
shreeshas95 1:a0055b3280c8 312
shreeshas95 1:a0055b3280c8 313
shreeshas95 1:a0055b3280c8 314
shreeshas95 1:a0055b3280c8 315 //void initial_adf_check(){
shreeshas95 1:a0055b3280c8 316 // spi.write(CMD_PHY_OFF); //0xB0
shreeshas95 1:a0055b3280c8 317 // while(hw_reset_err_cnt<2){
shreeshas95 1:a0055b3280c8 318 //
shreeshas95 1:a0055b3280c8 319 // if(!assrt_phy_off(0,0,0)){ //assrt_phy_off () returns 0 if state is PHY_OFF , returns 1 if couldn't go to PHY_OFF
shreeshas95 1:a0055b3280c8 320 // bbram_write();
shreeshas95 1:a0055b3280c8 321 // bbram_flag=1;
shreeshas95 1:a0055b3280c8 322 // break;
shreeshas95 1:a0055b3280c8 323 // }
shreeshas95 1:a0055b3280c8 324 // else{
shreeshas95 1:a0055b3280c8 325 // hardware_reset(0); // Asserts Hardware for 20sec(20times). PHY_OFF for 20,000 times
shreeshas95 1:a0055b3280c8 326 // hw_reset_err_cnt++;
shreeshas95 1:a0055b3280c8 327 // }
shreeshas95 1:a0055b3280c8 328 // }
shreeshas95 1:a0055b3280c8 329 // assrt_phy_off(0,0,0);// We actually do not need this but make sure "we do not need this"
shreeshas95 1:a0055b3280c8 330 // if(!bbram_flag){
shreeshas95 1:a0055b3280c8 331 // //Switch to beacon
shreeshas95 1:a0055b3280c8 332 // bcn_flag=1;
shreeshas95 1:a0055b3280c8 333 // }
shreeshas95 1:a0055b3280c8 334 //}
shreeshas95 1:a0055b3280c8 335
shreeshas95 1:a0055b3280c8 336 //for reseting the transmission call assert function after b5 and b1. after b1 assert_phi_on and after b5 assert_phi_tx.
shreeshas95 1:a0055b3280c8 337 //----------------------------------------------------------------------------
shreeshas95 1:a0055b3280c8 338
shreeshas95 1:a0055b3280c8 339 # define initiate {\
shreeshas95 1:a0055b3280c8 340 SPI_mutex.lock();\
shreeshas95 1:a0055b3280c8 341 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 342 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 343 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 344 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 345 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 346 spi.write(0x08);\
shreeshas95 1:a0055b3280c8 347 spi.write(0x14);\
shreeshas95 1:a0055b3280c8 348 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 349 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 350 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 351 spi.write(0x08);\
shreeshas95 1:a0055b3280c8 352 spi.write(0x15);\
shreeshas95 1:a0055b3280c8 353 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 354 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 355 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 356 spi.write(0x09);\
shreeshas95 1:a0055b3280c8 357 spi.write(0x24);\
shreeshas95 1:a0055b3280c8 358 spi.write(0x20);\
shreeshas95 1:a0055b3280c8 359 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 360 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 361 spi.write(0x09);\
shreeshas95 1:a0055b3280c8 362 spi.write(0x37);\
shreeshas95 1:a0055b3280c8 363 spi.write(0xE0);\
shreeshas95 1:a0055b3280c8 364 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 365 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 366 spi.write(0x09);\
shreeshas95 1:a0055b3280c8 367 spi.write(0x36);\
shreeshas95 1:a0055b3280c8 368 spi.write(0x70);\
shreeshas95 1:a0055b3280c8 369 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 370 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 371 spi.write(0x09);\
shreeshas95 1:a0055b3280c8 372 spi.write(0x39);\
shreeshas95 1:a0055b3280c8 373 spi.write(0x10);\
shreeshas95 1:a0055b3280c8 374 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 375 SPI_mutex.unlock();\
shreeshas95 1:a0055b3280c8 376 }
shreeshas95 1:a0055b3280c8 377
shreeshas95 1:a0055b3280c8 378
shreeshas95 1:a0055b3280c8 379 #define write_data {\
shreeshas95 1:a0055b3280c8 380 SPI_mutex.lock();\
shreeshas95 1:a0055b3280c8 381 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 382 spi.write(0x0B);\
shreeshas95 1:a0055b3280c8 383 spi.write(0x36);\
shreeshas95 1:a0055b3280c8 384 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 385 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 386 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 387 if(buffer_state){\
shreeshas95 1:a0055b3280c8 388 spi.write(0x18);\
shreeshas95 1:a0055b3280c8 389 spi.write(0x20);\
shreeshas95 1:a0055b3280c8 390 for(unsigned char i=0; i<112;i++){\
shreeshas95 1:a0055b3280c8 391 spi.write(buffer_112[i]);\
shreeshas95 1:a0055b3280c8 392 }\
shreeshas95 1:a0055b3280c8 393 }\
shreeshas95 1:a0055b3280c8 394 else{\
shreeshas95 1:a0055b3280c8 395 spi.write(0x18);\
shreeshas95 1:a0055b3280c8 396 spi.write(0x90);\
shreeshas95 1:a0055b3280c8 397 for(unsigned char i=0; i<112;i++){\
shreeshas95 1:a0055b3280c8 398 spi.write(buffer_112[i]);\
shreeshas95 1:a0055b3280c8 399 }\
shreeshas95 1:a0055b3280c8 400 }\
shreeshas95 1:a0055b3280c8 401 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 402 SPI_mutex.unlock();\
shreeshas95 1:a0055b3280c8 403 buffer_state = !buffer_state;\
shreeshas95 1:a0055b3280c8 404 if(last_buffer){\
shreeshas95 1:a0055b3280c8 405 ADF_off = true;\
shreeshas95 1:a0055b3280c8 406 gPC.puts("adf_off\r\n");\
shreeshas95 1:a0055b3280c8 407 }\
shreeshas95 1:a0055b3280c8 408 }
shreeshas95 1:a0055b3280c8 409
shreeshas95 1:a0055b3280c8 410
shreeshas95 1:a0055b3280c8 411 void check(){
shreeshas95 1:a0055b3280c8 412 if(IRQ){
shreeshas95 1:a0055b3280c8 413 gCOM_MNG_TMTC_THREAD->signal_set(signal);
shreeshas95 1:a0055b3280c8 414 }
shreeshas95 1:a0055b3280c8 415 }
shreeshas95 1:a0055b3280c8 416
shreeshas95 1:a0055b3280c8 417
shreeshas95 1:a0055b3280c8 418 #define send_data {\
shreeshas95 1:a0055b3280c8 419 SPI_mutex.lock();\
shreeshas95 1:a0055b3280c8 420 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 421 spi.write(0xBB);\
shreeshas95 1:a0055b3280c8 422 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 423 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 424 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 425 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 426 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 427 SPI_mutex.unlock();\
shreeshas95 1:a0055b3280c8 428 if(sent_tmfrom_SDcard){\
shreeshas95 1:a0055b3280c8 429 send_tm_from_SD_card();\
shreeshas95 1:a0055b3280c8 430 }else{\
shreeshas95 1:a0055b3280c8 431 snd_tm.transmit_data(buffer_112,&last_buffer);\
shreeshas95 1:a0055b3280c8 432 }\
shreeshas95 1:a0055b3280c8 433 write_data;\
shreeshas95 1:a0055b3280c8 434 if(sent_tmfrom_SDcard){\
shreeshas95 1:a0055b3280c8 435 send_tm_from_SD_card();\
shreeshas95 1:a0055b3280c8 436 }else{\
shreeshas95 1:a0055b3280c8 437 snd_tm.transmit_data(buffer_112,&last_buffer);\
shreeshas95 1:a0055b3280c8 438 }\
shreeshas95 1:a0055b3280c8 439 write_data;\
shreeshas95 1:a0055b3280c8 440 if(sent_tmfrom_SDcard){\
shreeshas95 1:a0055b3280c8 441 send_tm_from_SD_card();\
shreeshas95 1:a0055b3280c8 442 }else{\
shreeshas95 1:a0055b3280c8 443 snd_tm.transmit_data(buffer_112,&last_buffer);\
shreeshas95 1:a0055b3280c8 444 }\
shreeshas95 1:a0055b3280c8 445 SPI_mutex.lock();\
shreeshas95 1:a0055b3280c8 446 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 447 spi.write(0xB1);\
shreeshas95 1:a0055b3280c8 448 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 449 wait_us(300);\
shreeshas95 1:a0055b3280c8 450 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 451 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 452 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 453 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 454 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 455 spi.write(0xB5);\
shreeshas95 1:a0055b3280c8 456 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 457 wait_us(300);\
shreeshas95 1:a0055b3280c8 458 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 459 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 460 spi.write(0xFF);\
shreeshas95 1:a0055b3280c8 461 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 462 SPI_mutex.unlock();\
shreeshas95 1:a0055b3280c8 463 ticker.attach_us(&check,32000);\
shreeshas95 1:a0055b3280c8 464 }
shreeshas95 1:a0055b3280c8 465
shreeshas95 1:a0055b3280c8 466
shreeshas95 1:a0055b3280c8 467
shreeshas95 1:a0055b3280c8 468 #define adf_SND_SDCard {\
shreeshas95 1:a0055b3280c8 469 buffer_state = true;\
shreeshas95 1:a0055b3280c8 470 last_buffer = false;\
shreeshas95 1:a0055b3280c8 471 loop_on = true;\
shreeshas95 1:a0055b3280c8 472 ADF_off = false;\
shreeshas95 1:a0055b3280c8 473 sent_tmfrom_SDcard = true;\
shreeshas95 1:a0055b3280c8 474 signal = COM_MNG_TMTC_SIGNAL_ADF_SD;\
shreeshas95 1:a0055b3280c8 475 start_block_num = starting_add;\
shreeshas95 1:a0055b3280c8 476 end_block_num = ending_add;\
shreeshas95 1:a0055b3280c8 477 initial_adf_check;\
shreeshas95 1:a0055b3280c8 478 initiate;\
shreeshas95 1:a0055b3280c8 479 send_data;\
shreeshas95 1:a0055b3280c8 480 while(loop_on){\
shreeshas95 1:a0055b3280c8 481 led2=!led2;\
shreeshas95 1:a0055b3280c8 482 Thread::signal_wait(COM_MNG_TMTC_SIGNAL_ADF_SD);\
shreeshas95 1:a0055b3280c8 483 if(ADF_off){\
shreeshas95 1:a0055b3280c8 484 SPI_mutex.lock();\
shreeshas95 1:a0055b3280c8 485 ticker.detach();\
shreeshas95 1:a0055b3280c8 486 gCS_ADF=0;\
shreeshas95 1:a0055b3280c8 487 spi.write(0xB1);\
shreeshas95 1:a0055b3280c8 488 gCS_ADF=1;\
shreeshas95 1:a0055b3280c8 489 SPI_mutex.unlock();\
shreeshas95 1:a0055b3280c8 490 gPC.puts("transmission done\r\n");\
shreeshas95 1:a0055b3280c8 491 loop_on = false;\
shreeshas95 1:a0055b3280c8 492 }else{\
shreeshas95 1:a0055b3280c8 493 write_data;\
shreeshas95 1:a0055b3280c8 494 if(!last_buffer)\
shreeshas95 1:a0055b3280c8 495 send_tm_from_SD_card();\
shreeshas95 1:a0055b3280c8 496 }\
shreeshas95 1:a0055b3280c8 497 }\
shreeshas95 1:a0055b3280c8 498 }
shreeshas95 1:a0055b3280c8 499
shreeshas95 1:a0055b3280c8 500 void read_TC(Base_tc* TC_ptr){
shreeshas95 1:a0055b3280c8 501 gPC.puts("Inside sd card sending\r\n");
shreeshas95 1:a0055b3280c8 502 unsigned char service_subtype = 0;
shreeshas95 1:a0055b3280c8 503 uint64_t starting_add = 0, ending_add = 0;
shreeshas95 1:a0055b3280c8 504 service_subtype = (TC_ptr->TC_string[2])&0x0f;
shreeshas95 1:a0055b3280c8 505 starting_add = (TC_ptr->TC_string[5]) + ( (TC_ptr->TC_string[4])<<8 ) + ( (TC_ptr->TC_string[3]) <<16);
shreeshas95 1:a0055b3280c8 506 ending_add = (TC_ptr->TC_string[8]) + ( (TC_ptr->TC_string[7])<<8 ) + ( (TC_ptr->TC_string[6]) <<16);
shreeshas95 1:a0055b3280c8 507 starting_add = 10; // for now
shreeshas95 1:a0055b3280c8 508 ending_add = 20;
shreeshas95 1:a0055b3280c8 509 // adf_SND_SDCard(starting_add , ending_add);
shreeshas95 1:a0055b3280c8 510 gPC.puts("sending from sd card\r\n");
shreeshas95 1:a0055b3280c8 511 adf_SND_SDCard;
shreeshas95 1:a0055b3280c8 512 }
shreeshas95 1:a0055b3280c8 513
shreeshas95 1:a0055b3280c8 514
shreeshas95 1:a0055b3280c8 515 void adf_not_SDcard(){
shreeshas95 1:a0055b3280c8 516 buffer_state = true;
shreeshas95 1:a0055b3280c8 517 last_buffer = false;
shreeshas95 1:a0055b3280c8 518 loop_on = true;
shreeshas95 1:a0055b3280c8 519 ADF_off = false;
shreeshas95 1:a0055b3280c8 520 sent_tmfrom_SDcard = false;
shreeshas95 1:a0055b3280c8 521
shreeshas95 1:a0055b3280c8 522 signal = COM_MNG_TMTC_SIGNAL_ADF_NSD;
shreeshas95 1:a0055b3280c8 523 initial_adf_check;
shreeshas95 1:a0055b3280c8 524 initiate;
shreeshas95 1:a0055b3280c8 525 send_data;
shreeshas95 1:a0055b3280c8 526
shreeshas95 1:a0055b3280c8 527 while(loop_on){
shreeshas95 1:a0055b3280c8 528 led2=!led2;
shreeshas95 1:a0055b3280c8 529 Thread::signal_wait(COM_MNG_TMTC_SIGNAL_ADF_NSD);
shreeshas95 1:a0055b3280c8 530 if(ADF_off){
shreeshas95 1:a0055b3280c8 531 SPI_mutex.lock();
shreeshas95 1:a0055b3280c8 532 ticker.detach();
shreeshas95 1:a0055b3280c8 533 // wait_ms(35);
shreeshas95 1:a0055b3280c8 534 gCS_ADF=0;
shreeshas95 1:a0055b3280c8 535 spi.write(0xB1);
shreeshas95 1:a0055b3280c8 536 gCS_ADF=1;
shreeshas95 1:a0055b3280c8 537 SPI_mutex.unlock();
shreeshas95 1:a0055b3280c8 538 loop_on = false;
shreeshas95 1:a0055b3280c8 539 }else{
shreeshas95 1:a0055b3280c8 540 write_data;
shreeshas95 1:a0055b3280c8 541 snd_tm.transmit_data(buffer_112,&last_buffer);
shreeshas95 1:a0055b3280c8 542 }
shreeshas95 1:a0055b3280c8 543 }
shreeshas95 1:a0055b3280c8 544 }
shreeshas95 1:a0055b3280c8 545