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CDMS_CODE_samp_23SEP_DMA_flag
Dependencies: FreescaleIAP SimpleDMA mbed-rtos mbed
Fork of CDMS_CODE_samp_23SEP_DMA by
DefinitionsAndGlobals.h@48:18919bb88fa1, 2016-01-12 (annotated)
- Committer:
- shreeshas95
- Date:
- Tue Jan 12 13:12:16 2016 +0000
- Revision:
- 48:18919bb88fa1
- Parent:
- 35:3beac900a034
RX1M integrated. gives output as TC list complete for 32 random telecommands
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
shreeshas95 | 0:f016e9e8d48b | 1 | // **************DEFINITIONS********************* |
shreeshas95 | 0:f016e9e8d48b | 2 | // COM_RX |
shreeshas95 | 5:ab276a17ca07 | 3 | #define RX_TIMEOUT_LIMIT 0.5 |
shreeshas95 | 48:18919bb88fa1 | 4 | #define COM_RX_UART_TX PTE20 |
shreeshas95 | 48:18919bb88fa1 | 5 | #define COM_RX_UART_RX PTE21 |
shreeshas95 | 0:f016e9e8d48b | 6 | |
shreeshas95 | 0:f016e9e8d48b | 7 | // COMMON SPI |
shreeshas95 | 0:f016e9e8d48b | 8 | #define SPI_MOSI PTE1 |
shreeshas95 | 0:f016e9e8d48b | 9 | #define SPI_MISO PTE3 |
shreeshas95 | 0:f016e9e8d48b | 10 | #define SPI_CLK PTE2 |
shreeshas95 | 1:a0055b3280c8 | 11 | #define SPI_CS_ADF PTA15 |
shreeshas95 | 2:2caf2a9a13aa | 12 | #define SPI_CS_SDC PTE22 |
shreeshas95 | 2:2caf2a9a13aa | 13 | #define SPI_CS_RTC PTE29 |
shreeshas95 | 2:2caf2a9a13aa | 14 | |
shreeshas95 | 4:104dd82c99b8 | 15 | // COM_TX |
shreeshas95 | 4:104dd82c99b8 | 16 | #define COM_TX_CONFIG_LIMIT 3 |
ee12b079 | 35:3beac900a034 | 17 | #define COM_TX_TICKER_LIMIT 32 |
shreeshas95 | 4:104dd82c99b8 | 18 | |
shreeshas95 | 2:2caf2a9a13aa | 19 | // ADF INTERRUPUT |
shreeshas95 | 2:2caf2a9a13aa | 20 | #define ADF_IRQ PTA14 |
shreeshas95 | 0:f016e9e8d48b | 21 | |
shreeshas95 | 0:f016e9e8d48b | 22 | // TC LIST |
shreeshas95 | 2:2caf2a9a13aa | 23 | #define TCL_STATE_INCOMPLETE 0x00 |
shreeshas95 | 5:ab276a17ca07 | 24 | #define TCL_STATE_ABORTED 0x03 |
shreeshas95 | 5:ab276a17ca07 | 25 | #define TCL_STATE_EXECUTING 0x04 |
shreeshas95 | 5:ab276a17ca07 | 26 | #define TCL_STATE_COMPLETED 0x05 |
shreeshas95 | 5:ab276a17ca07 | 27 | #define TCL_STATE_EXCEEDED_LIMIT 0x06 |
shreeshas95 | 0:f016e9e8d48b | 28 | |
shreeshas95 | 0:f016e9e8d48b | 29 | // LIST OF FLAGS |
shreeshas95 | 2:2caf2a9a13aa | 30 | #define UART_INT_FLAG 0x0001 |
shreeshas95 | 2:2caf2a9a13aa | 31 | #define NEW_TC_RECEIVED 0x0002 |
shreeshas95 | 2:2caf2a9a13aa | 32 | #define COM_SESSION_FLAG 0x0004 |
shreeshas95 | 2:2caf2a9a13aa | 33 | #define COM_RX_FLAG 0x0008 |
shreeshas95 | 2:2caf2a9a13aa | 34 | #define COM_MNG_TMTC_RUNNING_FLAG 0x0010 |
shreeshas95 | 2:2caf2a9a13aa | 35 | #define COM_SESSION_VALIDITY 0x0020 |
shreeshas95 | 2:2caf2a9a13aa | 36 | #define ALL_CRC_PASS_FLAG 0x0040 |
shreeshas95 | 2:2caf2a9a13aa | 37 | #define COM_PA_HOT_FLAG 0x0080 |
shreeshas95 | 2:2caf2a9a13aa | 38 | #define COM_TX_FLAG 0x0100 |
shreeshas95 | 6:79d422d1ed42 | 39 | #define COM_SESSION_TIMEOUT_FLAG 0x0200 |
shreeshas95 | 0:f016e9e8d48b | 40 | |
shreeshas95 | 0:f016e9e8d48b | 41 | // COM_MNG_TMTC THREAD |
shreeshas95 | 6:79d422d1ed42 | 42 | #define SESSION_TIME_LIMIT 1500 |
shreeshas95 | 0:f016e9e8d48b | 43 | #define COM_MNG_TMTC_SIGNAL_UART_INT 0x01 |
shreeshas95 | 0:f016e9e8d48b | 44 | #define COM_MNG_TMTC_SIGNAL_ADF_NSD 0x02 |
shreeshas95 | 0:f016e9e8d48b | 45 | #define COM_MNG_TMTC_SIGNAL_ADF_SD 0x03 |
shreeshas95 | 0:f016e9e8d48b | 46 | |
shreeshas95 | 0:f016e9e8d48b | 47 | // COM_MNG_TMTC |
shreeshas95 | 2:2caf2a9a13aa | 48 | #define COM_PA_COOLING_TIME_LIMIT 20 |
shreeshas95 | 4:104dd82c99b8 | 49 | #define COM_MAX_TC_LIMIT 200 |
shreeshas95 | 4:104dd82c99b8 | 50 | #define TM_ACK_CODE_INDEX 2 |
shreeshas95 | 5:ab276a17ca07 | 51 | #define CRC_FAIL_NACK_CODE 0x01 |
shreeshas95 | 2:2caf2a9a13aa | 52 | |
shreeshas95 | 2:2caf2a9a13aa | 53 | // call sign |
shreeshas95 | 2:2caf2a9a13aa | 54 | #define PSC_CALLSIGN 0x00 |
shreeshas95 | 2:2caf2a9a13aa | 55 | #define APID_CALLSIGN 0x00 |
shreeshas95 | 2:2caf2a9a13aa | 56 | |
shreeshas95 | 2:2caf2a9a13aa | 57 | // max value of telecommands in a tcl |
shreeshas95 | 2:2caf2a9a13aa | 58 | #define TCL_OVERFLOW_CONSTANT 256 |
shreeshas95 | 4:104dd82c99b8 | 59 | #define TM_OVERFLOW_CONSTANT 256 |
shreeshas95 | 2:2caf2a9a13aa | 60 | |
shreeshas95 | 0:f016e9e8d48b | 61 | // starting value of packet sequence count at each pass |
shreeshas95 | 0:f016e9e8d48b | 62 | #define PSC_START_VALUE 1 |
shreeshas95 | 0:f016e9e8d48b | 63 | |
shreeshas95 | 0:f016e9e8d48b | 64 | // APID list |
shreeshas95 | 0:f016e9e8d48b | 65 | #define APID_BAE 1 |
shreeshas95 | 0:f016e9e8d48b | 66 | #define APID_CDMS 2 |
shreeshas95 | 0:f016e9e8d48b | 67 | #define APID_SPEED 3 |
shreeshas95 | 0:f016e9e8d48b | 68 | |
shreeshas95 | 0:f016e9e8d48b | 69 | // HIGH PRIORITY TC - priority list |
shreeshas95 | 0:f016e9e8d48b | 70 | // not correct values here |
shreeshas95 | 0:f016e9e8d48b | 71 | #define HPTC1 5 |
shreeshas95 | 0:f016e9e8d48b | 72 | #define HPTC2 6 |
shreeshas95 | 0:f016e9e8d48b | 73 | // Add more entries above |
shreeshas95 | 0:f016e9e8d48b | 74 | |
shreeshas95 | 0:f016e9e8d48b | 75 | // SIZE of tc in bytes |
shreeshas95 | 0:f016e9e8d48b | 76 | #define TC_SHORT_SIZE 11 |
shreeshas95 | 0:f016e9e8d48b | 77 | #define TC_LONG_SIZE 135 |
shreeshas95 | 0:f016e9e8d48b | 78 | |
shreeshas95 | 0:f016e9e8d48b | 79 | // TMID list |
shreeshas95 | 0:f016e9e8d48b | 80 | #define TMID_ACK_L1 0xA |
shreeshas95 | 4:104dd82c99b8 | 81 | #define TMID_ACK_L234 0xB |
shreeshas95 | 4:104dd82c99b8 | 82 | #define TMID_TCL 0x7 |
shreeshas95 | 4:104dd82c99b8 | 83 | #define TMID_CALL_SIGN 0xE |
shreeshas95 | 0:f016e9e8d48b | 84 | |
shreeshas95 | 0:f016e9e8d48b | 85 | // OBOSC SERVICE SUBTYPE |
shreeshas95 | 4:104dd82c99b8 | 86 | #define OBOSC_TCL_MAX_SHORT_SIZE 11 |
shreeshas95 | 4:104dd82c99b8 | 87 | #define OBOSC_LONG_TC_FIRST_HALF_SIZE 67 |
shreeshas95 | 4:104dd82c99b8 | 88 | #define OBOSC_LONG_TC_SECOND_HALF_SIZE 68 |
shreeshas95 | 4:104dd82c99b8 | 89 | #define OBOSC_TCL_TAG_LONG_FIRST_HALF 0x10 |
shreeshas95 | 4:104dd82c99b8 | 90 | #define OBOSC_TCL_TAG_LONG_SECOND_HALF 0x11 |
shreeshas95 | 4:104dd82c99b8 | 91 | |
shreeshas95 | 0:f016e9e8d48b | 92 | #define OBOSC_SUB_DISABLE 0x01 |
shreeshas95 | 0:f016e9e8d48b | 93 | #define OBOSC_SUB_RETRY 0x05 |
shreeshas95 | 4:104dd82c99b8 | 94 | #define OBOSC_SUB_REP_TCLD 0x06 |
shreeshas95 | 0:f016e9e8d48b | 95 | #define OBOSC_SUB_REP_LE 0x0F |
shreeshas95 | 0:f016e9e8d48b | 96 | #define OBOSC_SUB_RESET 0x07 |
shreeshas95 | 0:f016e9e8d48b | 97 | |
shreeshas95 | 3:6c81fc8834e2 | 98 | // PAYLOAD |
shreeshas95 | 3:6c81fc8834e2 | 99 | #define PAYLOAD_BUFFER_LENGTH 2190 |
shreeshas95 | 3:6c81fc8834e2 | 100 | |
shreeshas95 | 0:f016e9e8d48b | 101 | // ****************GLOBAL VARIABLES****************** |
shreeshas95 | 0:f016e9e8d48b | 102 | // DEBUG |
shreeshas95 | 0:f016e9e8d48b | 103 | Serial gPC( USBTX, USBRX ); |
shreeshas95 | 4:104dd82c99b8 | 104 | DigitalOut gLEDR(LED_RED); |
shreeshas95 | 4:104dd82c99b8 | 105 | DigitalOut gLEDG(LED_GREEN); |
shreeshas95 | 0:f016e9e8d48b | 106 | |
shreeshas95 | 0:f016e9e8d48b | 107 | // COM_RX |
shreeshas95 | 0:f016e9e8d48b | 108 | RawSerial RX1M( COM_RX_UART_TX, COM_RX_UART_RX ); |
shreeshas95 | 0:f016e9e8d48b | 109 | COM_RX_DATA_NODE *gRX_HEAD_DATA_NODE = NULL; |
shreeshas95 | 0:f016e9e8d48b | 110 | COM_RX_DATA_NODE *gRX_CURRENT_DATA_NODE = NULL; |
shreeshas95 | 2:2caf2a9a13aa | 111 | // uint8_t *gRX_CURRENT_PTR = NULL; |
shreeshas95 | 0:f016e9e8d48b | 112 | uint32_t gRX_COUNT = 0; |
shreeshas95 | 0:f016e9e8d48b | 113 | uint16_t gTOTAL_INCORRECT_SIZE_TC = 0x00; |
shreeshas95 | 0:f016e9e8d48b | 114 | uint16_t gTOTAL_CRC_FAIL_TC = 0x00; |
shreeshas95 | 2:2caf2a9a13aa | 115 | uint16_t gTOTAL_REPEATED_TC = 0x00; |
shreeshas95 | 0:f016e9e8d48b | 116 | |
shreeshas95 | 0:f016e9e8d48b | 117 | // COMMON SPI |
shreeshas95 | 0:f016e9e8d48b | 118 | SPI spi( SPI_MOSI, SPI_MISO, SPI_CLK ); |
shreeshas95 | 1:a0055b3280c8 | 119 | DigitalOut gCS_ADF(SPI_CS_ADF); |
shreeshas95 | 1:a0055b3280c8 | 120 | DigitalOut gCS_SDC(SPI_CS_SDC); |
shreeshas95 | 2:2caf2a9a13aa | 121 | DigitalOut gCS_RTC(SPI_CS_RTC); |
shreeshas95 | 0:f016e9e8d48b | 122 | Mutex SPI_mutex; |
shreeshas95 | 0:f016e9e8d48b | 123 | |
shreeshas95 | 0:f016e9e8d48b | 124 | // TC LIST |
shreeshas95 | 0:f016e9e8d48b | 125 | Base_tc* gHEAD_NODE_TCL = NULL; |
shreeshas95 | 0:f016e9e8d48b | 126 | Base_tc* gLAST_NODE_TCL = NULL; |
shreeshas95 | 2:2caf2a9a13aa | 127 | uint8_t gMASTER_STATE = TCL_STATE_INCOMPLETE; |
shreeshas95 | 2:2caf2a9a13aa | 128 | uint16_t gFLAGS = 0x0000; |
shreeshas95 | 0:f016e9e8d48b | 129 | |
shreeshas95 | 0:f016e9e8d48b | 130 | // COM_MNG_TMTC THREAD |
shreeshas95 | 0:f016e9e8d48b | 131 | Thread* gCOM_MNG_TMTC_THREAD = NULL; |
shreeshas95 | 0:f016e9e8d48b | 132 | Timeout gRX_TIMEOUT; |
shreeshas95 | 0:f016e9e8d48b | 133 | Timeout gSESSION_TIMEOUT; |
shreeshas95 | 0:f016e9e8d48b | 134 | |
shreeshas95 | 0:f016e9e8d48b | 135 | // COM_MNG_TMTC |
shreeshas95 | 2:2caf2a9a13aa | 136 | |
shreeshas95 | 2:2caf2a9a13aa | 137 | // PA cooling timeout |
shreeshas95 | 4:104dd82c99b8 | 138 | Timeout gCOM_PA_COOLING_TIMEOUT; |
shreeshas95 | 2:2caf2a9a13aa | 139 | |
shreeshas95 | 2:2caf2a9a13aa | 140 | // GS code for verification |
shreeshas95 | 2:2caf2a9a13aa | 141 | const uint8_t gGSCODE[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; |
shreeshas95 | 2:2caf2a9a13aa | 142 | |
shreeshas95 | 0:f016e9e8d48b | 143 | uint8_t gTOTAL_VALID_TC = 0x00; |
shreeshas95 | 0:f016e9e8d48b | 144 | // USE LAST_L1_ACK FOR GENERATING REPORT |
shreeshas95 | 4:104dd82c99b8 | 145 | uint8_t gLAST_TM[TM_LONG_SIZE]; |
shreeshas95 | 4:104dd82c99b8 | 146 | uint8_t gLAST_TM_SHORT_OR_LONG = SHORT_TM_CODE; |
shreeshas95 | 3:6c81fc8834e2 | 147 | |
shreeshas95 | 3:6c81fc8834e2 | 148 | // SCIENCE_THREAD |
shreeshas95 | 3:6c81fc8834e2 | 149 | Thread* gSCIENCE_THREAD = NULL; |
shreeshas95 | 4:104dd82c99b8 | 150 | uint8_t gPAYLOAD_BUFFER[PAYLOAD_BUFFER_LENGTH]; |
shreeshas95 | 4:104dd82c99b8 | 151 | |
shreeshas95 | 4:104dd82c99b8 | 152 | // CALL SIGN TM |
shreeshas95 | 4:104dd82c99b8 | 153 | const uint8_t gCALL_SIGN_STRING[TM_SHORT_SIZE] = {0xE0, 0x00, 0x00, 0x00, 0x56, 0x55, 0x32, 0x4E, 0x43, 0x46, 0x00, 0xAC, 0x11}; |