To fix the hang problem
Dependencies: FreescaleIAP SimpleDMA mbed-rtos mbed
Fork of CDMS_CODE by
DefinitionsAndGlobals.h@137:489a93a04d6b, 2016-03-24 (annotated)
- Committer:
- aniruddhv
- Date:
- Thu Mar 24 04:04:33 2016 +0000
- Revision:
- 137:489a93a04d6b
- Parent:
- 133:56d37aa8a011
- Child:
- 144:4c20fcc105ce
Updated POWER_ON_TX, POWER_OFF_TX
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
shreeshas95 | 0:f016e9e8d48b | 1 | // **************DEFINITIONS********************* |
aniruddhv | 69:20f09a0c3fd2 | 2 | |
ee12b079 | 133:56d37aa8a011 | 3 | #define bypass_adf 1 |
aniruddhv | 69:20f09a0c3fd2 | 4 | |
shreeshas95 | 0:f016e9e8d48b | 5 | // COM_RX |
shreeshas95 | 5:ab276a17ca07 | 6 | #define RX_TIMEOUT_LIMIT 0.5 |
ee12b079 | 81:1a39e9e14771 | 7 | //#define COM_RX_UART_TX PTE20 // For bypassing RX1M (SET BAUD RATE 1200) #define COM_RX_UART_TX USBTX |
ee12b079 | 81:1a39e9e14771 | 8 | //#define COM_RX_UART_RX PTE21 // For bypassing RX1M (SET BAUD RATE 1200) #define COM_RX_UART_RX USBRX |
ee12b079 | 81:1a39e9e14771 | 9 | |
ee12b079 | 81:1a39e9e14771 | 10 | #define COM_RX_UART_TX USBTX |
ee12b079 | 81:1a39e9e14771 | 11 | #define COM_RX_UART_RX USBRX |
aniruddhv | 56:a88e16f6c18e | 12 | |
shreeshas95 | 0:f016e9e8d48b | 13 | // COMMON SPI |
shreeshas95 | 0:f016e9e8d48b | 14 | #define SPI_MOSI PTE1 |
shreeshas95 | 0:f016e9e8d48b | 15 | #define SPI_MISO PTE3 |
shreeshas95 | 0:f016e9e8d48b | 16 | #define SPI_CLK PTE2 |
shreeshas95 | 1:a0055b3280c8 | 17 | #define SPI_CS_ADF PTA15 |
ee12b079 | 114:9fb55057b13f | 18 | #define SPI_CS_SDC PIN20 |
ee12b079 | 114:9fb55057b13f | 19 | #define SPI_CS_RTC PIN26 |
shreeshas95 | 2:2caf2a9a13aa | 20 | |
shreeshas95 | 4:104dd82c99b8 | 21 | // COM_TX |
shreeshas95 | 4:104dd82c99b8 | 22 | #define COM_TX_CONFIG_LIMIT 3 |
aniruddhv | 52:0bd68655c651 | 23 | #define COM_TX_TICKER_LIMIT 32 |
shreeshas95 | 4:104dd82c99b8 | 24 | |
aniruddhv | 137:489a93a04d6b | 25 | // ADF INTERRUPT |
shreeshas95 | 2:2caf2a9a13aa | 26 | #define ADF_IRQ PTA14 |
shreeshas95 | 0:f016e9e8d48b | 27 | |
shreeshas95 | 0:f016e9e8d48b | 28 | // TC LIST |
shreeshas95 | 2:2caf2a9a13aa | 29 | #define TCL_STATE_INCOMPLETE 0x00 |
shreeshas95 | 5:ab276a17ca07 | 30 | #define TCL_STATE_ABORTED 0x03 |
shreeshas95 | 5:ab276a17ca07 | 31 | #define TCL_STATE_EXECUTING 0x04 |
shreeshas95 | 5:ab276a17ca07 | 32 | #define TCL_STATE_COMPLETED 0x05 |
shreeshas95 | 5:ab276a17ca07 | 33 | #define TCL_STATE_EXCEEDED_LIMIT 0x06 |
shreeshas95 | 0:f016e9e8d48b | 34 | |
shreeshas95 | 0:f016e9e8d48b | 35 | // LIST OF FLAGS |
shreeshas95 | 2:2caf2a9a13aa | 36 | #define UART_INT_FLAG 0x0001 |
shreeshas95 | 2:2caf2a9a13aa | 37 | #define NEW_TC_RECEIVED 0x0002 |
shreeshas95 | 2:2caf2a9a13aa | 38 | #define COM_SESSION_FLAG 0x0004 |
shreeshas95 | 2:2caf2a9a13aa | 39 | #define COM_RX_FLAG 0x0008 |
shreeshas95 | 2:2caf2a9a13aa | 40 | #define COM_MNG_TMTC_RUNNING_FLAG 0x0010 |
shreeshas95 | 2:2caf2a9a13aa | 41 | #define COM_SESSION_VALIDITY 0x0020 |
shreeshas95 | 2:2caf2a9a13aa | 42 | #define ALL_CRC_PASS_FLAG 0x0040 |
shreeshas95 | 2:2caf2a9a13aa | 43 | #define COM_PA_HOT_FLAG 0x0080 |
shreeshas95 | 2:2caf2a9a13aa | 44 | #define COM_TX_FLAG 0x0100 |
shreeshas95 | 6:79d422d1ed42 | 45 | #define COM_SESSION_TIMEOUT_FLAG 0x0200 |
aniruddhv | 137:489a93a04d6b | 46 | #define COM_AUTO_POWER_OFF_BAE_FLAG 0x0400 |
aniruddhv | 137:489a93a04d6b | 47 | #define BAE_SW_EN_FLAG 0x0800 |
aniruddhv | 137:489a93a04d6b | 48 | #define RF_SW_STATUS_FLAG 0x1000 |
aniruddhv | 137:489a93a04d6b | 49 | #define COM_INIT_STATUS_FLAG 0x2000 |
aniruddhv | 137:489a93a04d6b | 50 | |
aniruddhv | 137:489a93a04d6b | 51 | //RF relay STATUS |
aniruddhv | 137:489a93a04d6b | 52 | #define RF_COM_TX 0 |
aniruddhv | 137:489a93a04d6b | 53 | #define RF_BCN 1 |
shreeshas95 | 0:f016e9e8d48b | 54 | |
shreeshas95 | 0:f016e9e8d48b | 55 | // COM_MNG_TMTC THREAD |
shreeshas95 | 6:79d422d1ed42 | 56 | #define SESSION_TIME_LIMIT 1500 |
shreeshas95 | 0:f016e9e8d48b | 57 | #define COM_MNG_TMTC_SIGNAL_UART_INT 0x01 |
shreeshas95 | 0:f016e9e8d48b | 58 | #define COM_MNG_TMTC_SIGNAL_ADF_NSD 0x02 |
shreeshas95 | 0:f016e9e8d48b | 59 | #define COM_MNG_TMTC_SIGNAL_ADF_SD 0x03 |
ee12b079 | 93:4d76de54a699 | 60 | #define SCIENCE_SIGNAL 0x04 |
shreeshas95 | 0:f016e9e8d48b | 61 | // COM_MNG_TMTC |
shreeshas95 | 2:2caf2a9a13aa | 62 | #define COM_PA_COOLING_TIME_LIMIT 20 |
shreeshas95 | 4:104dd82c99b8 | 63 | #define COM_MAX_TC_LIMIT 200 |
shreeshas95 | 4:104dd82c99b8 | 64 | #define TM_ACK_CODE_INDEX 2 |
shreeshas95 | 5:ab276a17ca07 | 65 | #define CRC_FAIL_NACK_CODE 0x01 |
shreeshas95 | 2:2caf2a9a13aa | 66 | |
shreeshas95 | 2:2caf2a9a13aa | 67 | // call sign |
shreeshas95 | 2:2caf2a9a13aa | 68 | #define PSC_CALLSIGN 0x00 |
shreeshas95 | 2:2caf2a9a13aa | 69 | #define APID_CALLSIGN 0x00 |
shreeshas95 | 2:2caf2a9a13aa | 70 | |
shreeshas95 | 2:2caf2a9a13aa | 71 | // max value of telecommands in a tcl |
shreeshas95 | 2:2caf2a9a13aa | 72 | #define TCL_OVERFLOW_CONSTANT 256 |
shreeshas95 | 4:104dd82c99b8 | 73 | #define TM_OVERFLOW_CONSTANT 256 |
shreeshas95 | 2:2caf2a9a13aa | 74 | |
shreeshas95 | 0:f016e9e8d48b | 75 | // starting value of packet sequence count at each pass |
shreeshas95 | 0:f016e9e8d48b | 76 | #define PSC_START_VALUE 1 |
shreeshas95 | 0:f016e9e8d48b | 77 | |
shreeshas95 | 0:f016e9e8d48b | 78 | // APID list |
aniruddhv | 52:0bd68655c651 | 79 | #define APID_COM 0 |
shreeshas95 | 0:f016e9e8d48b | 80 | #define APID_BAE 1 |
shreeshas95 | 0:f016e9e8d48b | 81 | #define APID_CDMS 2 |
shreeshas95 | 0:f016e9e8d48b | 82 | #define APID_SPEED 3 |
shreeshas95 | 0:f016e9e8d48b | 83 | |
aniruddhv | 52:0bd68655c651 | 84 | //SERVICE |
aniruddhv | 52:0bd68655c651 | 85 | #define SERVICE_OBOSC 0xB |
aniruddhv | 52:0bd68655c651 | 86 | #define SERVICE_OBSRS 0xF |
aniruddhv | 52:0bd68655c651 | 87 | |
shreeshas95 | 0:f016e9e8d48b | 88 | // HIGH PRIORITY TC - priority list |
shreeshas95 | 0:f016e9e8d48b | 89 | // not correct values here |
shreeshas95 | 0:f016e9e8d48b | 90 | #define HPTC1 5 |
shreeshas95 | 0:f016e9e8d48b | 91 | #define HPTC2 6 |
shreeshas95 | 0:f016e9e8d48b | 92 | // Add more entries above |
shreeshas95 | 0:f016e9e8d48b | 93 | |
shreeshas95 | 0:f016e9e8d48b | 94 | // SIZE of tc in bytes |
shreeshas95 | 0:f016e9e8d48b | 95 | #define TC_SHORT_SIZE 11 |
shreeshas95 | 0:f016e9e8d48b | 96 | #define TC_LONG_SIZE 135 |
shreeshas95 | 0:f016e9e8d48b | 97 | |
shreeshas95 | 0:f016e9e8d48b | 98 | // TMID list |
shreeshas95 | 0:f016e9e8d48b | 99 | #define TMID_ACK_L1 0xA |
shreeshas95 | 4:104dd82c99b8 | 100 | #define TMID_ACK_L234 0xB |
shreeshas95 | 4:104dd82c99b8 | 101 | #define TMID_TCL 0x7 |
shreeshas95 | 4:104dd82c99b8 | 102 | #define TMID_CALL_SIGN 0xE |
shreeshas95 | 0:f016e9e8d48b | 103 | |
shreeshas95 | 0:f016e9e8d48b | 104 | // OBOSC SERVICE SUBTYPE |
shreeshas95 | 4:104dd82c99b8 | 105 | #define OBOSC_TCL_MAX_SHORT_SIZE 11 |
shreeshas95 | 4:104dd82c99b8 | 106 | #define OBOSC_LONG_TC_FIRST_HALF_SIZE 67 |
shreeshas95 | 4:104dd82c99b8 | 107 | #define OBOSC_LONG_TC_SECOND_HALF_SIZE 68 |
shreeshas95 | 4:104dd82c99b8 | 108 | #define OBOSC_TCL_TAG_LONG_FIRST_HALF 0x10 |
shreeshas95 | 4:104dd82c99b8 | 109 | #define OBOSC_TCL_TAG_LONG_SECOND_HALF 0x11 |
shreeshas95 | 4:104dd82c99b8 | 110 | |
shreeshas95 | 0:f016e9e8d48b | 111 | #define OBOSC_SUB_DISABLE 0x01 |
shreeshas95 | 0:f016e9e8d48b | 112 | #define OBOSC_SUB_RETRY 0x05 |
shreeshas95 | 4:104dd82c99b8 | 113 | #define OBOSC_SUB_REP_TCLD 0x06 |
shreeshas95 | 0:f016e9e8d48b | 114 | #define OBOSC_SUB_REP_LE 0x0F |
shreeshas95 | 0:f016e9e8d48b | 115 | #define OBOSC_SUB_RESET 0x07 |
shreeshas95 | 0:f016e9e8d48b | 116 | |
shreeshas95 | 101:bece931236a2 | 117 | // PAYLOAD or SCIENCE |
shreeshas95 | 101:bece931236a2 | 118 | #define PAYLOAD_BUFFER_LENGTH 6723 |
ee12b079 | 113:b8991d9e3b6c | 119 | #define PAY_SPI_MOSI PTE18 |
ee12b079 | 113:b8991d9e3b6c | 120 | #define PAY_SPI_MISO PTE19 |
ee12b079 | 113:b8991d9e3b6c | 121 | #define PAY_SPI_CLK PTE17 |
ee12b079 | 113:b8991d9e3b6c | 122 | #define PAY_SPI_CS PTE16 |
shreeshas95 | 101:bece931236a2 | 123 | |
shreeshas95 | 3:6c81fc8834e2 | 124 | |
shreeshas95 | 0:f016e9e8d48b | 125 | // ****************GLOBAL VARIABLES****************** |
shreeshas95 | 0:f016e9e8d48b | 126 | // DEBUG |
shreeshas95 | 0:f016e9e8d48b | 127 | Serial gPC( USBTX, USBRX ); |
shreeshas95 | 4:104dd82c99b8 | 128 | DigitalOut gLEDR(LED_RED); |
shreeshas95 | 4:104dd82c99b8 | 129 | DigitalOut gLEDG(LED_GREEN); |
shreeshas95 | 0:f016e9e8d48b | 130 | |
shreeshas95 | 0:f016e9e8d48b | 131 | // COM_RX |
shreeshas95 | 0:f016e9e8d48b | 132 | RawSerial RX1M( COM_RX_UART_TX, COM_RX_UART_RX ); |
shreeshas95 | 0:f016e9e8d48b | 133 | COM_RX_DATA_NODE *gRX_HEAD_DATA_NODE = NULL; |
shreeshas95 | 0:f016e9e8d48b | 134 | COM_RX_DATA_NODE *gRX_CURRENT_DATA_NODE = NULL; |
shreeshas95 | 2:2caf2a9a13aa | 135 | // uint8_t *gRX_CURRENT_PTR = NULL; |
shreeshas95 | 0:f016e9e8d48b | 136 | uint32_t gRX_COUNT = 0; |
shreeshas95 | 0:f016e9e8d48b | 137 | uint16_t gTOTAL_INCORRECT_SIZE_TC = 0x00; |
shreeshas95 | 0:f016e9e8d48b | 138 | uint16_t gTOTAL_CRC_FAIL_TC = 0x00; |
shreeshas95 | 2:2caf2a9a13aa | 139 | uint16_t gTOTAL_REPEATED_TC = 0x00; |
shreeshas95 | 0:f016e9e8d48b | 140 | |
shreeshas95 | 0:f016e9e8d48b | 141 | // COMMON SPI |
shreeshas95 | 0:f016e9e8d48b | 142 | SPI spi( SPI_MOSI, SPI_MISO, SPI_CLK ); |
shreeshas95 | 1:a0055b3280c8 | 143 | DigitalOut gCS_ADF(SPI_CS_ADF); |
ee12b079 | 86:a26f5f22631d | 144 | DigitalOut cs_sd(SPI_CS_SDC); |
shreeshas95 | 2:2caf2a9a13aa | 145 | DigitalOut gCS_RTC(SPI_CS_RTC); |
shreeshas95 | 0:f016e9e8d48b | 146 | Mutex SPI_mutex; |
shreeshas95 | 0:f016e9e8d48b | 147 | |
shreeshas95 | 0:f016e9e8d48b | 148 | // TC LIST |
shreeshas95 | 0:f016e9e8d48b | 149 | Base_tc* gHEAD_NODE_TCL = NULL; |
shreeshas95 | 0:f016e9e8d48b | 150 | Base_tc* gLAST_NODE_TCL = NULL; |
shreeshas95 | 2:2caf2a9a13aa | 151 | uint8_t gMASTER_STATE = TCL_STATE_INCOMPLETE; |
shreeshas95 | 2:2caf2a9a13aa | 152 | uint16_t gFLAGS = 0x0000; |
shreeshas95 | 0:f016e9e8d48b | 153 | |
shreeshas95 | 0:f016e9e8d48b | 154 | // COM_MNG_TMTC THREAD |
shreeshas95 | 0:f016e9e8d48b | 155 | Thread* gCOM_MNG_TMTC_THREAD = NULL; |
shreeshas95 | 0:f016e9e8d48b | 156 | Timeout gRX_TIMEOUT; |
shreeshas95 | 0:f016e9e8d48b | 157 | Timeout gSESSION_TIMEOUT; |
shreeshas95 | 0:f016e9e8d48b | 158 | |
shreeshas95 | 0:f016e9e8d48b | 159 | // COM_MNG_TMTC |
shreeshas95 | 2:2caf2a9a13aa | 160 | |
shreeshas95 | 2:2caf2a9a13aa | 161 | // PA cooling timeout |
shreeshas95 | 4:104dd82c99b8 | 162 | Timeout gCOM_PA_COOLING_TIMEOUT; |
shreeshas95 | 2:2caf2a9a13aa | 163 | |
shreeshas95 | 2:2caf2a9a13aa | 164 | // GS code for verification |
aniruddhv | 37:c9a739750806 | 165 | const uint8_t gGSCODE[] = {0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; |
shreeshas95 | 2:2caf2a9a13aa | 166 | |
shreeshas95 | 0:f016e9e8d48b | 167 | uint8_t gTOTAL_VALID_TC = 0x00; |
shreeshas95 | 0:f016e9e8d48b | 168 | // USE LAST_L1_ACK FOR GENERATING REPORT |
shreeshas95 | 4:104dd82c99b8 | 169 | uint8_t gLAST_TM[TM_LONG_SIZE]; |
shreeshas95 | 4:104dd82c99b8 | 170 | uint8_t gLAST_TM_SHORT_OR_LONG = SHORT_TM_CODE; |
shreeshas95 | 3:6c81fc8834e2 | 171 | |
shreeshas95 | 101:bece931236a2 | 172 | // PAYLOAD OR SCIENCE_THREAD |
shreeshas95 | 3:6c81fc8834e2 | 173 | Thread* gSCIENCE_THREAD = NULL; |
shreeshas95 | 101:bece931236a2 | 174 | dmaSPISlave gPAY_SPI(PAY_SPI_MOSI, PAY_SPI_MISO, PAY_SPI_CLK, PAY_SPI_CS); |
shreeshas95 | 4:104dd82c99b8 | 175 | uint8_t gPAYLOAD_BUFFER[PAYLOAD_BUFFER_LENGTH]; |
shreeshas95 | 4:104dd82c99b8 | 176 | |
shreeshas95 | 4:104dd82c99b8 | 177 | // CALL SIGN TM |
shreeshas95 | 103:b55559925dc1 | 178 | const uint8_t gCALL_SIGN_STRING[TM_SHORT_SIZE] = {0xE0, 0x00, 0x00, 0x00, 0x56, 0x55, 0x32, 0x4E, 0x43, 0x46, 0x00, 0xAC, 0x11}; |
shreeshas95 | 103:b55559925dc1 | 179 | |
shreeshas95 | 103:b55559925dc1 | 180 | // CDMS HK |
shreeshas95 | 103:b55559925dc1 | 181 | CDMS_HK_actual actual_data; |
shreeshas95 | 103:b55559925dc1 | 182 | CDMS_HK_quant quant_data; |
shreeshas95 | 103:b55559925dc1 | 183 | CDMS_HK_min_max min_max_data; |
shreeshas95 | 103:b55559925dc1 | 184 | bool firstCount=true; |