Andrew SaLoutos / mbed-dev-STM-lean

From Ben Katz mbed-dev library. Removed unnecessary target files to reduce the overall size by a factor of 10 to make it easier to import into the online IDE.

Dependents:   motor_driver motor_driver_screaming_fix

targets/TARGET_STM/gpio_api.c@0:083111ae2a11, 2020-11-26 (annotated)

Committer:
saloutos
Date:
Thu Nov 26 04:08:56 2020 +0000
Revision:
0:083111ae2a11
first commit of leaned mbed dev lib

Who changed what in which revision?

UserRevisionLine numberNew contents of line
saloutos 0:083111ae2a11 1 /* mbed Microcontroller Library
saloutos 0:083111ae2a11 2 *******************************************************************************
saloutos 0:083111ae2a11 3 * Copyright (c) 2015, STMicroelectronics
saloutos 0:083111ae2a11 4 * All rights reserved.
saloutos 0:083111ae2a11 5 *
saloutos 0:083111ae2a11 6 * Redistribution and use in source and binary forms, with or without
saloutos 0:083111ae2a11 7 * modification, are permitted provided that the following conditions are met:
saloutos 0:083111ae2a11 8 *
saloutos 0:083111ae2a11 9 * 1. Redistributions of source code must retain the above copyright notice,
saloutos 0:083111ae2a11 10 * this list of conditions and the following disclaimer.
saloutos 0:083111ae2a11 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
saloutos 0:083111ae2a11 12 * this list of conditions and the following disclaimer in the documentation
saloutos 0:083111ae2a11 13 * and/or other materials provided with the distribution.
saloutos 0:083111ae2a11 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
saloutos 0:083111ae2a11 15 * may be used to endorse or promote products derived from this software
saloutos 0:083111ae2a11 16 * without specific prior written permission.
saloutos 0:083111ae2a11 17 *
saloutos 0:083111ae2a11 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
saloutos 0:083111ae2a11 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
saloutos 0:083111ae2a11 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
saloutos 0:083111ae2a11 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
saloutos 0:083111ae2a11 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
saloutos 0:083111ae2a11 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
saloutos 0:083111ae2a11 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
saloutos 0:083111ae2a11 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
saloutos 0:083111ae2a11 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
saloutos 0:083111ae2a11 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
saloutos 0:083111ae2a11 28 *******************************************************************************
saloutos 0:083111ae2a11 29 */
saloutos 0:083111ae2a11 30 #include "mbed_assert.h"
saloutos 0:083111ae2a11 31 #include "gpio_api.h"
saloutos 0:083111ae2a11 32 #include "pinmap.h"
saloutos 0:083111ae2a11 33 #include "mbed_error.h"
saloutos 0:083111ae2a11 34 #include "pin_device.h"
saloutos 0:083111ae2a11 35
saloutos 0:083111ae2a11 36 extern const uint32_t ll_pin_defines[16];
saloutos 0:083111ae2a11 37
saloutos 0:083111ae2a11 38 // Enable GPIO clock and return GPIO base address
saloutos 0:083111ae2a11 39 GPIO_TypeDef *Set_GPIO_Clock(uint32_t port_idx) {
saloutos 0:083111ae2a11 40 uint32_t gpio_add = 0;
saloutos 0:083111ae2a11 41 switch (port_idx) {
saloutos 0:083111ae2a11 42 case PortA:
saloutos 0:083111ae2a11 43 gpio_add = GPIOA_BASE;
saloutos 0:083111ae2a11 44 __HAL_RCC_GPIOA_CLK_ENABLE();
saloutos 0:083111ae2a11 45 break;
saloutos 0:083111ae2a11 46 case PortB:
saloutos 0:083111ae2a11 47 gpio_add = GPIOB_BASE;
saloutos 0:083111ae2a11 48 __HAL_RCC_GPIOB_CLK_ENABLE();
saloutos 0:083111ae2a11 49 break;
saloutos 0:083111ae2a11 50 #if defined(GPIOC_BASE)
saloutos 0:083111ae2a11 51 case PortC:
saloutos 0:083111ae2a11 52 gpio_add = GPIOC_BASE;
saloutos 0:083111ae2a11 53 __HAL_RCC_GPIOC_CLK_ENABLE();
saloutos 0:083111ae2a11 54 break;
saloutos 0:083111ae2a11 55 #endif
saloutos 0:083111ae2a11 56 #if defined GPIOD_BASE
saloutos 0:083111ae2a11 57 case PortD:
saloutos 0:083111ae2a11 58 gpio_add = GPIOD_BASE;
saloutos 0:083111ae2a11 59 __HAL_RCC_GPIOD_CLK_ENABLE();
saloutos 0:083111ae2a11 60 break;
saloutos 0:083111ae2a11 61 #endif
saloutos 0:083111ae2a11 62 #if defined GPIOE_BASE
saloutos 0:083111ae2a11 63 case PortE:
saloutos 0:083111ae2a11 64 gpio_add = GPIOE_BASE;
saloutos 0:083111ae2a11 65 __HAL_RCC_GPIOE_CLK_ENABLE();
saloutos 0:083111ae2a11 66 break;
saloutos 0:083111ae2a11 67 #endif
saloutos 0:083111ae2a11 68 #if defined GPIOF_BASE
saloutos 0:083111ae2a11 69 case PortF:
saloutos 0:083111ae2a11 70 gpio_add = GPIOF_BASE;
saloutos 0:083111ae2a11 71 __HAL_RCC_GPIOF_CLK_ENABLE();
saloutos 0:083111ae2a11 72 break;
saloutos 0:083111ae2a11 73 #endif
saloutos 0:083111ae2a11 74 #if defined GPIOG_BASE
saloutos 0:083111ae2a11 75 case PortG:
saloutos 0:083111ae2a11 76 #if defined TARGET_STM32L4
saloutos 0:083111ae2a11 77 __HAL_RCC_PWR_CLK_ENABLE();
saloutos 0:083111ae2a11 78 HAL_PWREx_EnableVddIO2();
saloutos 0:083111ae2a11 79 #endif
saloutos 0:083111ae2a11 80 gpio_add = GPIOG_BASE;
saloutos 0:083111ae2a11 81 __HAL_RCC_GPIOG_CLK_ENABLE();
saloutos 0:083111ae2a11 82 break;
saloutos 0:083111ae2a11 83 #endif
saloutos 0:083111ae2a11 84 #if defined GPIOH_BASE
saloutos 0:083111ae2a11 85 case PortH:
saloutos 0:083111ae2a11 86 gpio_add = GPIOH_BASE;
saloutos 0:083111ae2a11 87 __HAL_RCC_GPIOH_CLK_ENABLE();
saloutos 0:083111ae2a11 88 break;
saloutos 0:083111ae2a11 89 #endif
saloutos 0:083111ae2a11 90 #if defined GPIOI_BASE
saloutos 0:083111ae2a11 91 case PortI:
saloutos 0:083111ae2a11 92 gpio_add = GPIOI_BASE;
saloutos 0:083111ae2a11 93 __HAL_RCC_GPIOI_CLK_ENABLE();
saloutos 0:083111ae2a11 94 break;
saloutos 0:083111ae2a11 95 #endif
saloutos 0:083111ae2a11 96 #if defined GPIOJ_BASE
saloutos 0:083111ae2a11 97 case PortJ:
saloutos 0:083111ae2a11 98 gpio_add = GPIOJ_BASE;
saloutos 0:083111ae2a11 99 __HAL_RCC_GPIOJ_CLK_ENABLE();
saloutos 0:083111ae2a11 100 break;
saloutos 0:083111ae2a11 101 #endif
saloutos 0:083111ae2a11 102 #if defined GPIOK_BASE
saloutos 0:083111ae2a11 103 case PortK:
saloutos 0:083111ae2a11 104 gpio_add = GPIOK_BASE;
saloutos 0:083111ae2a11 105 __HAL_RCC_GPIOK_CLK_ENABLE();
saloutos 0:083111ae2a11 106 break;
saloutos 0:083111ae2a11 107 #endif
saloutos 0:083111ae2a11 108 default:
saloutos 0:083111ae2a11 109 error("Pinmap error: wrong port number.");
saloutos 0:083111ae2a11 110 break;
saloutos 0:083111ae2a11 111 }
saloutos 0:083111ae2a11 112 return (GPIO_TypeDef *) gpio_add;
saloutos 0:083111ae2a11 113 }
saloutos 0:083111ae2a11 114
saloutos 0:083111ae2a11 115 uint32_t gpio_set(PinName pin) {
saloutos 0:083111ae2a11 116 MBED_ASSERT(pin != (PinName)NC);
saloutos 0:083111ae2a11 117
saloutos 0:083111ae2a11 118 pin_function(pin, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
saloutos 0:083111ae2a11 119
saloutos 0:083111ae2a11 120 return (uint32_t)(1 << ((uint32_t)pin & 0xF)); // Return the pin mask
saloutos 0:083111ae2a11 121 }
saloutos 0:083111ae2a11 122
saloutos 0:083111ae2a11 123
saloutos 0:083111ae2a11 124 void gpio_init(gpio_t *obj, PinName pin) {
saloutos 0:083111ae2a11 125 obj->pin = pin;
saloutos 0:083111ae2a11 126 if (pin == (PinName)NC) {
saloutos 0:083111ae2a11 127 return;
saloutos 0:083111ae2a11 128 }
saloutos 0:083111ae2a11 129
saloutos 0:083111ae2a11 130 uint32_t port_index = STM_PORT(pin);
saloutos 0:083111ae2a11 131
saloutos 0:083111ae2a11 132 // Enable GPIO clock
saloutos 0:083111ae2a11 133 GPIO_TypeDef *gpio = Set_GPIO_Clock(port_index);
saloutos 0:083111ae2a11 134
saloutos 0:083111ae2a11 135 // Fill GPIO object structure for future use
saloutos 0:083111ae2a11 136 obj->mask = gpio_set(pin);
saloutos 0:083111ae2a11 137 obj->gpio = gpio;
saloutos 0:083111ae2a11 138 obj->ll_pin = ll_pin_defines[STM_PIN(obj->pin)];
saloutos 0:083111ae2a11 139 obj->reg_in = &gpio->IDR;
saloutos 0:083111ae2a11 140 obj->reg_set = &gpio->BSRR;
saloutos 0:083111ae2a11 141 #ifdef GPIO_IP_WITHOUT_BRR
saloutos 0:083111ae2a11 142 obj->reg_clr = &gpio->BSRR;
saloutos 0:083111ae2a11 143 #else
saloutos 0:083111ae2a11 144 obj->reg_clr = &gpio->BRR;
saloutos 0:083111ae2a11 145 #endif
saloutos 0:083111ae2a11 146 }
saloutos 0:083111ae2a11 147
saloutos 0:083111ae2a11 148 void gpio_mode(gpio_t *obj, PinMode mode) {
saloutos 0:083111ae2a11 149 pin_mode(obj->pin, mode);
saloutos 0:083111ae2a11 150 }
saloutos 0:083111ae2a11 151
saloutos 0:083111ae2a11 152 inline void gpio_dir(gpio_t *obj, PinDirection direction) {
saloutos 0:083111ae2a11 153 if (direction == PIN_INPUT) {
saloutos 0:083111ae2a11 154 LL_GPIO_SetPinMode(obj->gpio, obj->ll_pin, LL_GPIO_MODE_INPUT);
saloutos 0:083111ae2a11 155 } else {
saloutos 0:083111ae2a11 156 LL_GPIO_SetPinMode(obj->gpio, obj->ll_pin, LL_GPIO_MODE_OUTPUT);
saloutos 0:083111ae2a11 157 }
saloutos 0:083111ae2a11 158 }
saloutos 0:083111ae2a11 159