Andrew SaLoutos / mbed-dev-STM-lean

From Ben Katz mbed-dev library. Removed unnecessary target files to reduce the overall size by a factor of 10 to make it easier to import into the online IDE.

Dependents:   motor_driver motor_driver_screaming_fix

targets/TARGET_STM/TARGET_STM32F4/serial_device.c@0:083111ae2a11, 2020-11-26 (annotated)

Committer:
saloutos
Date:
Thu Nov 26 04:08:56 2020 +0000
Revision:
0:083111ae2a11
first commit of leaned mbed dev lib

Who changed what in which revision?

UserRevisionLine numberNew contents of line
saloutos 0:083111ae2a11 1 /* mbed Microcontroller Library
saloutos 0:083111ae2a11 2 *******************************************************************************
saloutos 0:083111ae2a11 3 * Copyright (c) 2015, STMicroelectronics
saloutos 0:083111ae2a11 4 * All rights reserved.
saloutos 0:083111ae2a11 5 *
saloutos 0:083111ae2a11 6 * Redistribution and use in source and binary forms, with or without
saloutos 0:083111ae2a11 7 * modification, are permitted provided that the following conditions are met:
saloutos 0:083111ae2a11 8 *
saloutos 0:083111ae2a11 9 * 1. Redistributions of source code must retain the above copyright notice,
saloutos 0:083111ae2a11 10 * this list of conditions and the following disclaimer.
saloutos 0:083111ae2a11 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
saloutos 0:083111ae2a11 12 * this list of conditions and the following disclaimer in the documentation
saloutos 0:083111ae2a11 13 * and/or other materials provided with the distribution.
saloutos 0:083111ae2a11 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
saloutos 0:083111ae2a11 15 * may be used to endorse or promote products derived from this software
saloutos 0:083111ae2a11 16 * without specific prior written permission.
saloutos 0:083111ae2a11 17 *
saloutos 0:083111ae2a11 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
saloutos 0:083111ae2a11 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
saloutos 0:083111ae2a11 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
saloutos 0:083111ae2a11 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
saloutos 0:083111ae2a11 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
saloutos 0:083111ae2a11 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
saloutos 0:083111ae2a11 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
saloutos 0:083111ae2a11 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
saloutos 0:083111ae2a11 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
saloutos 0:083111ae2a11 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
saloutos 0:083111ae2a11 28 *******************************************************************************
saloutos 0:083111ae2a11 29 */
saloutos 0:083111ae2a11 30
saloutos 0:083111ae2a11 31 #include "mbed_assert.h"
saloutos 0:083111ae2a11 32 #include "serial_api.h"
saloutos 0:083111ae2a11 33 #include "serial_api_hal.h"
saloutos 0:083111ae2a11 34
saloutos 0:083111ae2a11 35 #if DEVICE_SERIAL
saloutos 0:083111ae2a11 36
saloutos 0:083111ae2a11 37 #include "cmsis.h"
saloutos 0:083111ae2a11 38 #include "pinmap.h"
saloutos 0:083111ae2a11 39 #include <string.h>
saloutos 0:083111ae2a11 40 #include "PeripheralPins.h"
saloutos 0:083111ae2a11 41 #include "mbed_error.h"
saloutos 0:083111ae2a11 42
saloutos 0:083111ae2a11 43 #define UART_NUM (10)
saloutos 0:083111ae2a11 44 static uint32_t serial_irq_ids[UART_NUM] = {0};
saloutos 0:083111ae2a11 45 UART_HandleTypeDef uart_handlers[UART_NUM];
saloutos 0:083111ae2a11 46
saloutos 0:083111ae2a11 47 static uart_irq_handler irq_handler;
saloutos 0:083111ae2a11 48
saloutos 0:083111ae2a11 49 int stdio_uart_inited = 0;
saloutos 0:083111ae2a11 50 serial_t stdio_uart;
saloutos 0:083111ae2a11 51
saloutos 0:083111ae2a11 52 void serial_init(serial_t *obj, PinName tx, PinName rx)
saloutos 0:083111ae2a11 53 {
saloutos 0:083111ae2a11 54 struct serial_s *obj_s = SERIAL_S(obj);
saloutos 0:083111ae2a11 55
saloutos 0:083111ae2a11 56 // Determine the UART to use (UART_1, UART_2, ...)
saloutos 0:083111ae2a11 57 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
saloutos 0:083111ae2a11 58 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
saloutos 0:083111ae2a11 59
saloutos 0:083111ae2a11 60 // Get the peripheral name (UART_1, UART_2, ...) from the pin and assign it to the object
saloutos 0:083111ae2a11 61 obj_s->uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
saloutos 0:083111ae2a11 62 MBED_ASSERT(obj_s->uart != (UARTName)NC);
saloutos 0:083111ae2a11 63
saloutos 0:083111ae2a11 64 // Enable USART clock
saloutos 0:083111ae2a11 65 switch (obj_s->uart) {
saloutos 0:083111ae2a11 66 case UART_1:
saloutos 0:083111ae2a11 67 __HAL_RCC_USART1_FORCE_RESET();
saloutos 0:083111ae2a11 68 __HAL_RCC_USART1_RELEASE_RESET();
saloutos 0:083111ae2a11 69 __HAL_RCC_USART1_CLK_ENABLE();
saloutos 0:083111ae2a11 70 obj_s->index = 0;
saloutos 0:083111ae2a11 71 break;
saloutos 0:083111ae2a11 72
saloutos 0:083111ae2a11 73 case UART_2:
saloutos 0:083111ae2a11 74 __HAL_RCC_USART2_FORCE_RESET();
saloutos 0:083111ae2a11 75 __HAL_RCC_USART2_RELEASE_RESET();
saloutos 0:083111ae2a11 76 __HAL_RCC_USART2_CLK_ENABLE();
saloutos 0:083111ae2a11 77 obj_s->index = 1;
saloutos 0:083111ae2a11 78 break;
saloutos 0:083111ae2a11 79 #if defined(USART3_BASE)
saloutos 0:083111ae2a11 80 case UART_3:
saloutos 0:083111ae2a11 81 __HAL_RCC_USART3_FORCE_RESET();
saloutos 0:083111ae2a11 82 __HAL_RCC_USART3_RELEASE_RESET();
saloutos 0:083111ae2a11 83 __HAL_RCC_USART3_CLK_ENABLE();
saloutos 0:083111ae2a11 84 obj_s->index = 2;
saloutos 0:083111ae2a11 85 break;
saloutos 0:083111ae2a11 86 #endif
saloutos 0:083111ae2a11 87 #if defined(UART4_BASE)
saloutos 0:083111ae2a11 88 case UART_4:
saloutos 0:083111ae2a11 89 __HAL_RCC_UART4_FORCE_RESET();
saloutos 0:083111ae2a11 90 __HAL_RCC_UART4_RELEASE_RESET();
saloutos 0:083111ae2a11 91 __HAL_RCC_UART4_CLK_ENABLE();
saloutos 0:083111ae2a11 92 obj_s->index = 3;
saloutos 0:083111ae2a11 93 break;
saloutos 0:083111ae2a11 94 #endif
saloutos 0:083111ae2a11 95 #if defined(UART5_BASE)
saloutos 0:083111ae2a11 96 case UART_5:
saloutos 0:083111ae2a11 97 __HAL_RCC_UART5_FORCE_RESET();
saloutos 0:083111ae2a11 98 __HAL_RCC_UART5_RELEASE_RESET();
saloutos 0:083111ae2a11 99 __HAL_RCC_UART5_CLK_ENABLE();
saloutos 0:083111ae2a11 100 obj_s->index = 4;
saloutos 0:083111ae2a11 101 break;
saloutos 0:083111ae2a11 102 #endif
saloutos 0:083111ae2a11 103 #if defined(USART6_BASE)
saloutos 0:083111ae2a11 104 case UART_6:
saloutos 0:083111ae2a11 105 __HAL_RCC_USART6_FORCE_RESET();
saloutos 0:083111ae2a11 106 __HAL_RCC_USART6_RELEASE_RESET();
saloutos 0:083111ae2a11 107 __HAL_RCC_USART6_CLK_ENABLE();
saloutos 0:083111ae2a11 108 obj_s->index = 5;
saloutos 0:083111ae2a11 109 break;
saloutos 0:083111ae2a11 110 #endif
saloutos 0:083111ae2a11 111 #if defined(UART7_BASE)
saloutos 0:083111ae2a11 112 case UART_7:
saloutos 0:083111ae2a11 113 __HAL_RCC_UART7_FORCE_RESET();
saloutos 0:083111ae2a11 114 __HAL_RCC_UART7_RELEASE_RESET();
saloutos 0:083111ae2a11 115 __HAL_RCC_UART7_CLK_ENABLE();
saloutos 0:083111ae2a11 116 obj_s->index = 6;
saloutos 0:083111ae2a11 117 break;
saloutos 0:083111ae2a11 118 #endif
saloutos 0:083111ae2a11 119 #if defined(UART8_BASE)
saloutos 0:083111ae2a11 120 case UART_8:
saloutos 0:083111ae2a11 121 __HAL_RCC_UART8_FORCE_RESET();
saloutos 0:083111ae2a11 122 __HAL_RCC_UART8_RELEASE_RESET();
saloutos 0:083111ae2a11 123 __HAL_RCC_UART8_CLK_ENABLE();
saloutos 0:083111ae2a11 124 obj_s->index = 7;
saloutos 0:083111ae2a11 125 break;
saloutos 0:083111ae2a11 126 #endif
saloutos 0:083111ae2a11 127 #if defined(UART9_BASE)
saloutos 0:083111ae2a11 128 case UART_9:
saloutos 0:083111ae2a11 129 __HAL_RCC_UART9_FORCE_RESET();
saloutos 0:083111ae2a11 130 __HAL_RCC_UART9_RELEASE_RESET();
saloutos 0:083111ae2a11 131 __HAL_RCC_UART9_CLK_ENABLE();
saloutos 0:083111ae2a11 132 obj_s->index = 8;
saloutos 0:083111ae2a11 133 break;
saloutos 0:083111ae2a11 134 #endif
saloutos 0:083111ae2a11 135 #if defined(UART10_BASE)
saloutos 0:083111ae2a11 136 case UART_10:
saloutos 0:083111ae2a11 137 __HAL_RCC_UART10_FORCE_RESET();
saloutos 0:083111ae2a11 138 __HAL_RCC_UART10_RELEASE_RESET();
saloutos 0:083111ae2a11 139 __HAL_RCC_UART10_CLK_ENABLE();
saloutos 0:083111ae2a11 140 obj_s->index = 9;
saloutos 0:083111ae2a11 141 break;
saloutos 0:083111ae2a11 142 #endif
saloutos 0:083111ae2a11 143 }
saloutos 0:083111ae2a11 144
saloutos 0:083111ae2a11 145 // Configure the UART pins
saloutos 0:083111ae2a11 146 pinmap_pinout(tx, PinMap_UART_TX);
saloutos 0:083111ae2a11 147 pinmap_pinout(rx, PinMap_UART_RX);
saloutos 0:083111ae2a11 148
saloutos 0:083111ae2a11 149 if (tx != NC) {
saloutos 0:083111ae2a11 150 pin_mode(tx, PullUp);
saloutos 0:083111ae2a11 151 }
saloutos 0:083111ae2a11 152 if (rx != NC) {
saloutos 0:083111ae2a11 153 pin_mode(rx, PullUp);
saloutos 0:083111ae2a11 154 }
saloutos 0:083111ae2a11 155
saloutos 0:083111ae2a11 156 // Configure UART
saloutos 0:083111ae2a11 157 obj_s->baudrate = 9600;
saloutos 0:083111ae2a11 158 obj_s->databits = UART_WORDLENGTH_8B;
saloutos 0:083111ae2a11 159 obj_s->stopbits = UART_STOPBITS_1;
saloutos 0:083111ae2a11 160 obj_s->parity = UART_PARITY_NONE;
saloutos 0:083111ae2a11 161
saloutos 0:083111ae2a11 162 #if DEVICE_SERIAL_FC
saloutos 0:083111ae2a11 163 obj_s->hw_flow_ctl = UART_HWCONTROL_NONE;
saloutos 0:083111ae2a11 164 #endif
saloutos 0:083111ae2a11 165
saloutos 0:083111ae2a11 166 obj_s->pin_tx = tx;
saloutos 0:083111ae2a11 167 obj_s->pin_rx = rx;
saloutos 0:083111ae2a11 168
saloutos 0:083111ae2a11 169 init_uart(obj);
saloutos 0:083111ae2a11 170
saloutos 0:083111ae2a11 171 // For stdio management
saloutos 0:083111ae2a11 172 if (obj_s->uart == STDIO_UART) {
saloutos 0:083111ae2a11 173 stdio_uart_inited = 1;
saloutos 0:083111ae2a11 174 memcpy(&stdio_uart, obj, sizeof(serial_t));
saloutos 0:083111ae2a11 175 }
saloutos 0:083111ae2a11 176 }
saloutos 0:083111ae2a11 177
saloutos 0:083111ae2a11 178 void serial_free(serial_t *obj)
saloutos 0:083111ae2a11 179 {
saloutos 0:083111ae2a11 180 struct serial_s *obj_s = SERIAL_S(obj);
saloutos 0:083111ae2a11 181
saloutos 0:083111ae2a11 182 // Reset UART and disable clock
saloutos 0:083111ae2a11 183 switch (obj_s->index) {
saloutos 0:083111ae2a11 184 case 0:
saloutos 0:083111ae2a11 185 __HAL_RCC_USART1_FORCE_RESET();
saloutos 0:083111ae2a11 186 __HAL_RCC_USART1_RELEASE_RESET();
saloutos 0:083111ae2a11 187 __HAL_RCC_USART1_CLK_DISABLE();
saloutos 0:083111ae2a11 188 break;
saloutos 0:083111ae2a11 189 case 1:
saloutos 0:083111ae2a11 190 __HAL_RCC_USART2_FORCE_RESET();
saloutos 0:083111ae2a11 191 __HAL_RCC_USART2_RELEASE_RESET();
saloutos 0:083111ae2a11 192 __HAL_RCC_USART2_CLK_DISABLE();
saloutos 0:083111ae2a11 193 break;
saloutos 0:083111ae2a11 194 #if defined(USART3_BASE)
saloutos 0:083111ae2a11 195 case 2:
saloutos 0:083111ae2a11 196 __HAL_RCC_USART3_FORCE_RESET();
saloutos 0:083111ae2a11 197 __HAL_RCC_USART3_RELEASE_RESET();
saloutos 0:083111ae2a11 198 __HAL_RCC_USART3_CLK_DISABLE();
saloutos 0:083111ae2a11 199 break;
saloutos 0:083111ae2a11 200 #endif
saloutos 0:083111ae2a11 201 #if defined(UART4_BASE)
saloutos 0:083111ae2a11 202 case 3:
saloutos 0:083111ae2a11 203 __HAL_RCC_UART4_FORCE_RESET();
saloutos 0:083111ae2a11 204 __HAL_RCC_UART4_RELEASE_RESET();
saloutos 0:083111ae2a11 205 __HAL_RCC_UART4_CLK_DISABLE();
saloutos 0:083111ae2a11 206 break;
saloutos 0:083111ae2a11 207 #endif
saloutos 0:083111ae2a11 208 #if defined(UART5_BASE)
saloutos 0:083111ae2a11 209 case 4:
saloutos 0:083111ae2a11 210 __HAL_RCC_UART5_FORCE_RESET();
saloutos 0:083111ae2a11 211 __HAL_RCC_UART5_RELEASE_RESET();
saloutos 0:083111ae2a11 212 __HAL_RCC_UART5_CLK_DISABLE();
saloutos 0:083111ae2a11 213 break;
saloutos 0:083111ae2a11 214 #endif
saloutos 0:083111ae2a11 215 #if defined(USART6_BASE)
saloutos 0:083111ae2a11 216 case 5:
saloutos 0:083111ae2a11 217 __HAL_RCC_USART6_FORCE_RESET();
saloutos 0:083111ae2a11 218 __HAL_RCC_USART6_RELEASE_RESET();
saloutos 0:083111ae2a11 219 __HAL_RCC_USART6_CLK_DISABLE();
saloutos 0:083111ae2a11 220 break;
saloutos 0:083111ae2a11 221 #endif
saloutos 0:083111ae2a11 222 #if defined(UART7_BASE)
saloutos 0:083111ae2a11 223 case 6:
saloutos 0:083111ae2a11 224 __HAL_RCC_UART7_FORCE_RESET();
saloutos 0:083111ae2a11 225 __HAL_RCC_UART7_RELEASE_RESET();
saloutos 0:083111ae2a11 226 __HAL_RCC_UART7_CLK_DISABLE();
saloutos 0:083111ae2a11 227 break;
saloutos 0:083111ae2a11 228 #endif
saloutos 0:083111ae2a11 229 #if defined(UART8_BASE)
saloutos 0:083111ae2a11 230 case 7:
saloutos 0:083111ae2a11 231 __HAL_RCC_UART8_FORCE_RESET();
saloutos 0:083111ae2a11 232 __HAL_RCC_UART8_RELEASE_RESET();
saloutos 0:083111ae2a11 233 __HAL_RCC_UART8_CLK_DISABLE();
saloutos 0:083111ae2a11 234 break;
saloutos 0:083111ae2a11 235 #endif
saloutos 0:083111ae2a11 236 #if defined(UART9_BASE)
saloutos 0:083111ae2a11 237 case 8:
saloutos 0:083111ae2a11 238 __HAL_RCC_UART9_FORCE_RESET();
saloutos 0:083111ae2a11 239 __HAL_RCC_UART9_RELEASE_RESET();
saloutos 0:083111ae2a11 240 __HAL_RCC_UART9_CLK_DISABLE();
saloutos 0:083111ae2a11 241 break;
saloutos 0:083111ae2a11 242 #endif
saloutos 0:083111ae2a11 243 #if defined(UART10_BASE)
saloutos 0:083111ae2a11 244 case 9:
saloutos 0:083111ae2a11 245 __HAL_RCC_UART10_FORCE_RESET();
saloutos 0:083111ae2a11 246 __HAL_RCC_UART10_RELEASE_RESET();
saloutos 0:083111ae2a11 247 __HAL_RCC_UART10_CLK_DISABLE();
saloutos 0:083111ae2a11 248 break;
saloutos 0:083111ae2a11 249 #endif
saloutos 0:083111ae2a11 250 }
saloutos 0:083111ae2a11 251
saloutos 0:083111ae2a11 252 // Configure GPIOs
saloutos 0:083111ae2a11 253 pin_function(obj_s->pin_tx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
saloutos 0:083111ae2a11 254 pin_function(obj_s->pin_rx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
saloutos 0:083111ae2a11 255
saloutos 0:083111ae2a11 256 serial_irq_ids[obj_s->index] = 0;
saloutos 0:083111ae2a11 257 }
saloutos 0:083111ae2a11 258
saloutos 0:083111ae2a11 259 void serial_baud(serial_t *obj, int baudrate)
saloutos 0:083111ae2a11 260 {
saloutos 0:083111ae2a11 261 struct serial_s *obj_s = SERIAL_S(obj);
saloutos 0:083111ae2a11 262
saloutos 0:083111ae2a11 263 obj_s->baudrate = baudrate;
saloutos 0:083111ae2a11 264 init_uart(obj);
saloutos 0:083111ae2a11 265 }
saloutos 0:083111ae2a11 266
saloutos 0:083111ae2a11 267 /******************************************************************************
saloutos 0:083111ae2a11 268 * INTERRUPTS HANDLING
saloutos 0:083111ae2a11 269 ******************************************************************************/
saloutos 0:083111ae2a11 270
saloutos 0:083111ae2a11 271 static void uart_irq(int id)
saloutos 0:083111ae2a11 272 {
saloutos 0:083111ae2a11 273 UART_HandleTypeDef * huart = &uart_handlers[id];
saloutos 0:083111ae2a11 274
saloutos 0:083111ae2a11 275 if (serial_irq_ids[id] != 0) {
saloutos 0:083111ae2a11 276 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TXE) != RESET) {
saloutos 0:083111ae2a11 277 if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TXE) != RESET) {
saloutos 0:083111ae2a11 278 irq_handler(serial_irq_ids[id], TxIrq);
saloutos 0:083111ae2a11 279 }
saloutos 0:083111ae2a11 280 }
saloutos 0:083111ae2a11 281 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE) != RESET) {
saloutos 0:083111ae2a11 282 if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_RXNE) != RESET) {
saloutos 0:083111ae2a11 283 irq_handler(serial_irq_ids[id], RxIrq);
saloutos 0:083111ae2a11 284 /* Flag has been cleared when reading the content */
saloutos 0:083111ae2a11 285 }
saloutos 0:083111ae2a11 286 }
saloutos 0:083111ae2a11 287 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) {
saloutos 0:083111ae2a11 288 if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) {
saloutos 0:083111ae2a11 289 volatile uint32_t tmpval = huart->Instance->DR; // Clear ORE flag
saloutos 0:083111ae2a11 290 }
saloutos 0:083111ae2a11 291 }
saloutos 0:083111ae2a11 292 }
saloutos 0:083111ae2a11 293 }
saloutos 0:083111ae2a11 294
saloutos 0:083111ae2a11 295 static void uart1_irq(void)
saloutos 0:083111ae2a11 296 {
saloutos 0:083111ae2a11 297 uart_irq(0);
saloutos 0:083111ae2a11 298 }
saloutos 0:083111ae2a11 299
saloutos 0:083111ae2a11 300 static void uart2_irq(void)
saloutos 0:083111ae2a11 301 {
saloutos 0:083111ae2a11 302 uart_irq(1);
saloutos 0:083111ae2a11 303 }
saloutos 0:083111ae2a11 304
saloutos 0:083111ae2a11 305 #if defined(USART3_BASE)
saloutos 0:083111ae2a11 306 static void uart3_irq(void)
saloutos 0:083111ae2a11 307 {
saloutos 0:083111ae2a11 308 uart_irq(2);
saloutos 0:083111ae2a11 309 }
saloutos 0:083111ae2a11 310 #endif
saloutos 0:083111ae2a11 311
saloutos 0:083111ae2a11 312 #if defined(UART4_BASE)
saloutos 0:083111ae2a11 313 static void uart4_irq(void)
saloutos 0:083111ae2a11 314 {
saloutos 0:083111ae2a11 315 uart_irq(3);
saloutos 0:083111ae2a11 316 }
saloutos 0:083111ae2a11 317 #endif
saloutos 0:083111ae2a11 318
saloutos 0:083111ae2a11 319 #if defined(UART5_BASE)
saloutos 0:083111ae2a11 320 static void uart5_irq(void)
saloutos 0:083111ae2a11 321 {
saloutos 0:083111ae2a11 322 uart_irq(4);
saloutos 0:083111ae2a11 323 }
saloutos 0:083111ae2a11 324 #endif
saloutos 0:083111ae2a11 325
saloutos 0:083111ae2a11 326 #if defined(USART6_BASE)
saloutos 0:083111ae2a11 327 static void uart6_irq(void)
saloutos 0:083111ae2a11 328 {
saloutos 0:083111ae2a11 329 uart_irq(5);
saloutos 0:083111ae2a11 330 }
saloutos 0:083111ae2a11 331 #endif
saloutos 0:083111ae2a11 332
saloutos 0:083111ae2a11 333 #if defined(UART7_BASE)
saloutos 0:083111ae2a11 334 static void uart7_irq(void)
saloutos 0:083111ae2a11 335 {
saloutos 0:083111ae2a11 336 uart_irq(6);
saloutos 0:083111ae2a11 337 }
saloutos 0:083111ae2a11 338 #endif
saloutos 0:083111ae2a11 339
saloutos 0:083111ae2a11 340 #if defined(UART8_BASE)
saloutos 0:083111ae2a11 341 static void uart8_irq(void)
saloutos 0:083111ae2a11 342 {
saloutos 0:083111ae2a11 343 uart_irq(7);
saloutos 0:083111ae2a11 344 }
saloutos 0:083111ae2a11 345 #endif
saloutos 0:083111ae2a11 346
saloutos 0:083111ae2a11 347 #if defined(UART9_BASE)
saloutos 0:083111ae2a11 348 static void uart9_irq(void)
saloutos 0:083111ae2a11 349 {
saloutos 0:083111ae2a11 350 uart_irq(8);
saloutos 0:083111ae2a11 351 }
saloutos 0:083111ae2a11 352 #endif
saloutos 0:083111ae2a11 353
saloutos 0:083111ae2a11 354 #if defined(UART10_BASE)
saloutos 0:083111ae2a11 355 static void uart10_irq(void)
saloutos 0:083111ae2a11 356 {
saloutos 0:083111ae2a11 357 uart_irq(9);
saloutos 0:083111ae2a11 358 }
saloutos 0:083111ae2a11 359 #endif
saloutos 0:083111ae2a11 360
saloutos 0:083111ae2a11 361 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
saloutos 0:083111ae2a11 362 {
saloutos 0:083111ae2a11 363 struct serial_s *obj_s = SERIAL_S(obj);
saloutos 0:083111ae2a11 364
saloutos 0:083111ae2a11 365 irq_handler = handler;
saloutos 0:083111ae2a11 366 serial_irq_ids[obj_s->index] = id;
saloutos 0:083111ae2a11 367 }
saloutos 0:083111ae2a11 368
saloutos 0:083111ae2a11 369 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
saloutos 0:083111ae2a11 370 {
saloutos 0:083111ae2a11 371 struct serial_s *obj_s = SERIAL_S(obj);
saloutos 0:083111ae2a11 372 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
saloutos 0:083111ae2a11 373 IRQn_Type irq_n = (IRQn_Type)0;
saloutos 0:083111ae2a11 374 uint32_t vector = 0;
saloutos 0:083111ae2a11 375
saloutos 0:083111ae2a11 376 switch (obj_s->index) {
saloutos 0:083111ae2a11 377 case 0:
saloutos 0:083111ae2a11 378 irq_n = USART1_IRQn;
saloutos 0:083111ae2a11 379 vector = (uint32_t)&uart1_irq;
saloutos 0:083111ae2a11 380 break;
saloutos 0:083111ae2a11 381
saloutos 0:083111ae2a11 382 case 1:
saloutos 0:083111ae2a11 383 irq_n = USART2_IRQn;
saloutos 0:083111ae2a11 384 vector = (uint32_t)&uart2_irq;
saloutos 0:083111ae2a11 385 break;
saloutos 0:083111ae2a11 386 #if defined(USART3_BASE)
saloutos 0:083111ae2a11 387 case 2:
saloutos 0:083111ae2a11 388 irq_n = USART3_IRQn;
saloutos 0:083111ae2a11 389 vector = (uint32_t)&uart3_irq;
saloutos 0:083111ae2a11 390 break;
saloutos 0:083111ae2a11 391 #endif
saloutos 0:083111ae2a11 392 #if defined(UART4_BASE)
saloutos 0:083111ae2a11 393 case 3:
saloutos 0:083111ae2a11 394 irq_n = UART4_IRQn;
saloutos 0:083111ae2a11 395 vector = (uint32_t)&uart4_irq;
saloutos 0:083111ae2a11 396 break;
saloutos 0:083111ae2a11 397 #endif
saloutos 0:083111ae2a11 398 #if defined(UART5_BASE)
saloutos 0:083111ae2a11 399 case 4:
saloutos 0:083111ae2a11 400 irq_n = UART5_IRQn;
saloutos 0:083111ae2a11 401 vector = (uint32_t)&uart5_irq;
saloutos 0:083111ae2a11 402 break;
saloutos 0:083111ae2a11 403 #endif
saloutos 0:083111ae2a11 404 #if defined(USART6_BASE)
saloutos 0:083111ae2a11 405 case 5:
saloutos 0:083111ae2a11 406 irq_n = USART6_IRQn;
saloutos 0:083111ae2a11 407 vector = (uint32_t)&uart6_irq;
saloutos 0:083111ae2a11 408 break;
saloutos 0:083111ae2a11 409 #endif
saloutos 0:083111ae2a11 410 #if defined(UART7_BASE)
saloutos 0:083111ae2a11 411 case 6:
saloutos 0:083111ae2a11 412 irq_n = UART7_IRQn;
saloutos 0:083111ae2a11 413 vector = (uint32_t)&uart7_irq;
saloutos 0:083111ae2a11 414 break;
saloutos 0:083111ae2a11 415 #endif
saloutos 0:083111ae2a11 416 #if defined(UART8_BASE)
saloutos 0:083111ae2a11 417 case 7:
saloutos 0:083111ae2a11 418 irq_n = UART8_IRQn;
saloutos 0:083111ae2a11 419 vector = (uint32_t)&uart8_irq;
saloutos 0:083111ae2a11 420 break;
saloutos 0:083111ae2a11 421 #endif
saloutos 0:083111ae2a11 422 #if defined(UART9_BASE)
saloutos 0:083111ae2a11 423 case 8:
saloutos 0:083111ae2a11 424 irq_n = UART9_IRQn;
saloutos 0:083111ae2a11 425 vector = (uint32_t)&uart9_irq;
saloutos 0:083111ae2a11 426 break;
saloutos 0:083111ae2a11 427 #endif
saloutos 0:083111ae2a11 428 #if defined(UART10_BASE)
saloutos 0:083111ae2a11 429 case 9:
saloutos 0:083111ae2a11 430 irq_n = UART10_IRQn;
saloutos 0:083111ae2a11 431 vector = (uint32_t)&uart10_irq;
saloutos 0:083111ae2a11 432 break;
saloutos 0:083111ae2a11 433 #endif
saloutos 0:083111ae2a11 434 }
saloutos 0:083111ae2a11 435
saloutos 0:083111ae2a11 436 if (enable) {
saloutos 0:083111ae2a11 437 if (irq == RxIrq) {
saloutos 0:083111ae2a11 438 __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE);
saloutos 0:083111ae2a11 439 } else { // TxIrq
saloutos 0:083111ae2a11 440 __HAL_UART_ENABLE_IT(huart, UART_IT_TXE);
saloutos 0:083111ae2a11 441 }
saloutos 0:083111ae2a11 442 NVIC_SetVector(irq_n, vector);
saloutos 0:083111ae2a11 443 NVIC_EnableIRQ(irq_n);
saloutos 0:083111ae2a11 444
saloutos 0:083111ae2a11 445 } else { // disable
saloutos 0:083111ae2a11 446 int all_disabled = 0;
saloutos 0:083111ae2a11 447 if (irq == RxIrq) {
saloutos 0:083111ae2a11 448 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
saloutos 0:083111ae2a11 449 // Check if TxIrq is disabled too
saloutos 0:083111ae2a11 450 if ((huart->Instance->CR1 & USART_CR1_TXEIE) == 0) {
saloutos 0:083111ae2a11 451 all_disabled = 1;
saloutos 0:083111ae2a11 452 }
saloutos 0:083111ae2a11 453 } else { // TxIrq
saloutos 0:083111ae2a11 454 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
saloutos 0:083111ae2a11 455 // Check if RxIrq is disabled too
saloutos 0:083111ae2a11 456 if ((huart->Instance->CR1 & USART_CR1_RXNEIE) == 0) {
saloutos 0:083111ae2a11 457 all_disabled = 1;
saloutos 0:083111ae2a11 458 }
saloutos 0:083111ae2a11 459 }
saloutos 0:083111ae2a11 460
saloutos 0:083111ae2a11 461 if (all_disabled) {
saloutos 0:083111ae2a11 462 NVIC_DisableIRQ(irq_n);
saloutos 0:083111ae2a11 463 }
saloutos 0:083111ae2a11 464 }
saloutos 0:083111ae2a11 465 }
saloutos 0:083111ae2a11 466
saloutos 0:083111ae2a11 467 /******************************************************************************
saloutos 0:083111ae2a11 468 * READ/WRITE
saloutos 0:083111ae2a11 469 ******************************************************************************/
saloutos 0:083111ae2a11 470
saloutos 0:083111ae2a11 471 int serial_getc(serial_t *obj)
saloutos 0:083111ae2a11 472 {
saloutos 0:083111ae2a11 473 struct serial_s *obj_s = SERIAL_S(obj);
saloutos 0:083111ae2a11 474 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
saloutos 0:083111ae2a11 475
saloutos 0:083111ae2a11 476 while (!serial_readable(obj));
saloutos 0:083111ae2a11 477 return (int)(huart->Instance->DR & 0x1FF);
saloutos 0:083111ae2a11 478 }
saloutos 0:083111ae2a11 479
saloutos 0:083111ae2a11 480 void serial_putc(serial_t *obj, int c)
saloutos 0:083111ae2a11 481 {
saloutos 0:083111ae2a11 482 struct serial_s *obj_s = SERIAL_S(obj);
saloutos 0:083111ae2a11 483 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
saloutos 0:083111ae2a11 484
saloutos 0:083111ae2a11 485 while (!serial_writable(obj));
saloutos 0:083111ae2a11 486 huart->Instance->DR = (uint32_t)(c & 0x1FF);
saloutos 0:083111ae2a11 487 }
saloutos 0:083111ae2a11 488
saloutos 0:083111ae2a11 489 void serial_clear(serial_t *obj)
saloutos 0:083111ae2a11 490 {
saloutos 0:083111ae2a11 491 struct serial_s *obj_s = SERIAL_S(obj);
saloutos 0:083111ae2a11 492 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
saloutos 0:083111ae2a11 493
saloutos 0:083111ae2a11 494 huart->TxXferCount = 0;
saloutos 0:083111ae2a11 495 huart->RxXferCount = 0;
saloutos 0:083111ae2a11 496 }
saloutos 0:083111ae2a11 497
saloutos 0:083111ae2a11 498 void serial_break_set(serial_t *obj)
saloutos 0:083111ae2a11 499 {
saloutos 0:083111ae2a11 500 struct serial_s *obj_s = SERIAL_S(obj);
saloutos 0:083111ae2a11 501 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
saloutos 0:083111ae2a11 502
saloutos 0:083111ae2a11 503 HAL_LIN_SendBreak(huart);
saloutos 0:083111ae2a11 504 }
saloutos 0:083111ae2a11 505
saloutos 0:083111ae2a11 506 #if DEVICE_SERIAL_ASYNCH
saloutos 0:083111ae2a11 507
saloutos 0:083111ae2a11 508 /******************************************************************************
saloutos 0:083111ae2a11 509 * LOCAL HELPER FUNCTIONS
saloutos 0:083111ae2a11 510 ******************************************************************************/
saloutos 0:083111ae2a11 511
saloutos 0:083111ae2a11 512 /**
saloutos 0:083111ae2a11 513 * Configure the TX buffer for an asynchronous write serial transaction
saloutos 0:083111ae2a11 514 *
saloutos 0:083111ae2a11 515 * @param obj The serial object.
saloutos 0:083111ae2a11 516 * @param tx The buffer for sending.
saloutos 0:083111ae2a11 517 * @param tx_length The number of words to transmit.
saloutos 0:083111ae2a11 518 */
saloutos 0:083111ae2a11 519 static void serial_tx_buffer_set(serial_t *obj, void *tx, int tx_length, uint8_t width)
saloutos 0:083111ae2a11 520 {
saloutos 0:083111ae2a11 521 (void)width;
saloutos 0:083111ae2a11 522
saloutos 0:083111ae2a11 523 // Exit if a transmit is already on-going
saloutos 0:083111ae2a11 524 if (serial_tx_active(obj)) {
saloutos 0:083111ae2a11 525 return;
saloutos 0:083111ae2a11 526 }
saloutos 0:083111ae2a11 527
saloutos 0:083111ae2a11 528 obj->tx_buff.buffer = tx;
saloutos 0:083111ae2a11 529 obj->tx_buff.length = tx_length;
saloutos 0:083111ae2a11 530 obj->tx_buff.pos = 0;
saloutos 0:083111ae2a11 531 }
saloutos 0:083111ae2a11 532
saloutos 0:083111ae2a11 533 /**
saloutos 0:083111ae2a11 534 * Configure the RX buffer for an asynchronous write serial transaction
saloutos 0:083111ae2a11 535 *
saloutos 0:083111ae2a11 536 * @param obj The serial object.
saloutos 0:083111ae2a11 537 * @param tx The buffer for sending.
saloutos 0:083111ae2a11 538 * @param tx_length The number of words to transmit.
saloutos 0:083111ae2a11 539 */
saloutos 0:083111ae2a11 540 static void serial_rx_buffer_set(serial_t *obj, void *rx, int rx_length, uint8_t width)
saloutos 0:083111ae2a11 541 {
saloutos 0:083111ae2a11 542 (void)width;
saloutos 0:083111ae2a11 543
saloutos 0:083111ae2a11 544 // Exit if a reception is already on-going
saloutos 0:083111ae2a11 545 if (serial_rx_active(obj)) {
saloutos 0:083111ae2a11 546 return;
saloutos 0:083111ae2a11 547 }
saloutos 0:083111ae2a11 548
saloutos 0:083111ae2a11 549 obj->rx_buff.buffer = rx;
saloutos 0:083111ae2a11 550 obj->rx_buff.length = rx_length;
saloutos 0:083111ae2a11 551 obj->rx_buff.pos = 0;
saloutos 0:083111ae2a11 552 }
saloutos 0:083111ae2a11 553
saloutos 0:083111ae2a11 554 /**
saloutos 0:083111ae2a11 555 * Configure events
saloutos 0:083111ae2a11 556 *
saloutos 0:083111ae2a11 557 * @param obj The serial object
saloutos 0:083111ae2a11 558 * @param event The logical OR of the events to configure
saloutos 0:083111ae2a11 559 * @param enable Set to non-zero to enable events, or zero to disable them
saloutos 0:083111ae2a11 560 */
saloutos 0:083111ae2a11 561 static void serial_enable_event(serial_t *obj, int event, uint8_t enable)
saloutos 0:083111ae2a11 562 {
saloutos 0:083111ae2a11 563 struct serial_s *obj_s = SERIAL_S(obj);
saloutos 0:083111ae2a11 564
saloutos 0:083111ae2a11 565 // Shouldn't have to enable interrupt here, just need to keep track of the requested events.
saloutos 0:083111ae2a11 566 if (enable) {
saloutos 0:083111ae2a11 567 obj_s->events |= event;
saloutos 0:083111ae2a11 568 } else {
saloutos 0:083111ae2a11 569 obj_s->events &= ~event;
saloutos 0:083111ae2a11 570 }
saloutos 0:083111ae2a11 571 }
saloutos 0:083111ae2a11 572
saloutos 0:083111ae2a11 573
saloutos 0:083111ae2a11 574 /**
saloutos 0:083111ae2a11 575 * Get index of serial object TX IRQ, relating it to the physical peripheral.
saloutos 0:083111ae2a11 576 *
saloutos 0:083111ae2a11 577 * @param obj pointer to serial object
saloutos 0:083111ae2a11 578 * @return internal NVIC TX IRQ index of U(S)ART peripheral
saloutos 0:083111ae2a11 579 */
saloutos 0:083111ae2a11 580 static IRQn_Type serial_get_irq_n(serial_t *obj)
saloutos 0:083111ae2a11 581 {
saloutos 0:083111ae2a11 582 struct serial_s *obj_s = SERIAL_S(obj);
saloutos 0:083111ae2a11 583 IRQn_Type irq_n;
saloutos 0:083111ae2a11 584
saloutos 0:083111ae2a11 585 switch (obj_s->index) {
saloutos 0:083111ae2a11 586 #if defined(USART1_BASE)
saloutos 0:083111ae2a11 587 case 0:
saloutos 0:083111ae2a11 588 irq_n = USART1_IRQn;
saloutos 0:083111ae2a11 589 break;
saloutos 0:083111ae2a11 590 #endif
saloutos 0:083111ae2a11 591 #if defined(USART2_BASE)
saloutos 0:083111ae2a11 592 case 1:
saloutos 0:083111ae2a11 593 irq_n = USART2_IRQn;
saloutos 0:083111ae2a11 594 break;
saloutos 0:083111ae2a11 595 #endif
saloutos 0:083111ae2a11 596 #if defined(USART3_BASE)
saloutos 0:083111ae2a11 597 case 2:
saloutos 0:083111ae2a11 598 irq_n = USART3_IRQn;
saloutos 0:083111ae2a11 599 break;
saloutos 0:083111ae2a11 600 #endif
saloutos 0:083111ae2a11 601 #if defined(UART4_BASE)
saloutos 0:083111ae2a11 602 case 3:
saloutos 0:083111ae2a11 603 irq_n = UART4_IRQn;
saloutos 0:083111ae2a11 604 break;
saloutos 0:083111ae2a11 605 #endif
saloutos 0:083111ae2a11 606 #if defined(USART5_BASE)
saloutos 0:083111ae2a11 607 case 4:
saloutos 0:083111ae2a11 608 irq_n = UART5_IRQn;
saloutos 0:083111ae2a11 609 break;
saloutos 0:083111ae2a11 610 #endif
saloutos 0:083111ae2a11 611 #if defined(USART6_BASE)
saloutos 0:083111ae2a11 612 case 5:
saloutos 0:083111ae2a11 613 irq_n = USART6_IRQn;
saloutos 0:083111ae2a11 614 break;
saloutos 0:083111ae2a11 615 #endif
saloutos 0:083111ae2a11 616 #if defined(UART7_BASE)
saloutos 0:083111ae2a11 617 case 6:
saloutos 0:083111ae2a11 618 irq_n = UART7_IRQn;
saloutos 0:083111ae2a11 619 break;
saloutos 0:083111ae2a11 620 #endif
saloutos 0:083111ae2a11 621 #if defined(UART8_BASE)
saloutos 0:083111ae2a11 622 case 7:
saloutos 0:083111ae2a11 623 irq_n = UART8_IRQn;
saloutos 0:083111ae2a11 624 break;
saloutos 0:083111ae2a11 625 #endif
saloutos 0:083111ae2a11 626 #if defined(UART9_BASE)
saloutos 0:083111ae2a11 627 case 8:
saloutos 0:083111ae2a11 628 irq_n = UART9_IRQn;
saloutos 0:083111ae2a11 629 break;
saloutos 0:083111ae2a11 630 #endif
saloutos 0:083111ae2a11 631 #if defined(UART10_BASE)
saloutos 0:083111ae2a11 632 case 9:
saloutos 0:083111ae2a11 633 irq_n = UART10_IRQn;
saloutos 0:083111ae2a11 634 break;
saloutos 0:083111ae2a11 635 #endif
saloutos 0:083111ae2a11 636 default:
saloutos 0:083111ae2a11 637 irq_n = (IRQn_Type)0;
saloutos 0:083111ae2a11 638 }
saloutos 0:083111ae2a11 639
saloutos 0:083111ae2a11 640 return irq_n;
saloutos 0:083111ae2a11 641 }
saloutos 0:083111ae2a11 642
saloutos 0:083111ae2a11 643 /******************************************************************************
saloutos 0:083111ae2a11 644 * MBED API FUNCTIONS
saloutos 0:083111ae2a11 645 ******************************************************************************/
saloutos 0:083111ae2a11 646
saloutos 0:083111ae2a11 647 /**
saloutos 0:083111ae2a11 648 * Begin asynchronous TX transfer. The used buffer is specified in the serial
saloutos 0:083111ae2a11 649 * object, tx_buff
saloutos 0:083111ae2a11 650 *
saloutos 0:083111ae2a11 651 * @param obj The serial object
saloutos 0:083111ae2a11 652 * @param tx The buffer for sending
saloutos 0:083111ae2a11 653 * @param tx_length The number of words to transmit
saloutos 0:083111ae2a11 654 * @param tx_width The bit width of buffer word
saloutos 0:083111ae2a11 655 * @param handler The serial handler
saloutos 0:083111ae2a11 656 * @param event The logical OR of events to be registered
saloutos 0:083111ae2a11 657 * @param hint A suggestion for how to use DMA with this transfer
saloutos 0:083111ae2a11 658 * @return Returns number of data transfered, or 0 otherwise
saloutos 0:083111ae2a11 659 */
saloutos 0:083111ae2a11 660 int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx_width, uint32_t handler, uint32_t event, DMAUsage hint)
saloutos 0:083111ae2a11 661 {
saloutos 0:083111ae2a11 662 // TODO: DMA usage is currently ignored
saloutos 0:083111ae2a11 663 (void) hint;
saloutos 0:083111ae2a11 664
saloutos 0:083111ae2a11 665 // Check buffer is ok
saloutos 0:083111ae2a11 666 MBED_ASSERT(tx != (void*)0);
saloutos 0:083111ae2a11 667 MBED_ASSERT(tx_width == 8); // support only 8b width
saloutos 0:083111ae2a11 668
saloutos 0:083111ae2a11 669 struct serial_s *obj_s = SERIAL_S(obj);
saloutos 0:083111ae2a11 670 UART_HandleTypeDef * huart = &uart_handlers[obj_s->index];
saloutos 0:083111ae2a11 671
saloutos 0:083111ae2a11 672 if (tx_length == 0) {
saloutos 0:083111ae2a11 673 return 0;
saloutos 0:083111ae2a11 674 }
saloutos 0:083111ae2a11 675
saloutos 0:083111ae2a11 676 // Set up buffer
saloutos 0:083111ae2a11 677 serial_tx_buffer_set(obj, (void *)tx, tx_length, tx_width);
saloutos 0:083111ae2a11 678
saloutos 0:083111ae2a11 679 // Set up events
saloutos 0:083111ae2a11 680 serial_enable_event(obj, SERIAL_EVENT_TX_ALL, 0); // Clear all events
saloutos 0:083111ae2a11 681 serial_enable_event(obj, event, 1); // Set only the wanted events
saloutos 0:083111ae2a11 682
saloutos 0:083111ae2a11 683 // Enable interrupt
saloutos 0:083111ae2a11 684 IRQn_Type irq_n = serial_get_irq_n(obj);
saloutos 0:083111ae2a11 685 NVIC_ClearPendingIRQ(irq_n);
saloutos 0:083111ae2a11 686 NVIC_DisableIRQ(irq_n);
saloutos 0:083111ae2a11 687 NVIC_SetPriority(irq_n, 1);
saloutos 0:083111ae2a11 688 NVIC_SetVector(irq_n, (uint32_t)handler);
saloutos 0:083111ae2a11 689 NVIC_EnableIRQ(irq_n);
saloutos 0:083111ae2a11 690
saloutos 0:083111ae2a11 691 // the following function will enable UART_IT_TXE and error interrupts
saloutos 0:083111ae2a11 692 if (HAL_UART_Transmit_IT(huart, (uint8_t*)tx, tx_length) != HAL_OK) {
saloutos 0:083111ae2a11 693 return 0;
saloutos 0:083111ae2a11 694 }
saloutos 0:083111ae2a11 695
saloutos 0:083111ae2a11 696 return tx_length;
saloutos 0:083111ae2a11 697 }
saloutos 0:083111ae2a11 698
saloutos 0:083111ae2a11 699 /**
saloutos 0:083111ae2a11 700 * Begin asynchronous RX transfer (enable interrupt for data collecting)
saloutos 0:083111ae2a11 701 * The used buffer is specified in the serial object, rx_buff
saloutos 0:083111ae2a11 702 *
saloutos 0:083111ae2a11 703 * @param obj The serial object
saloutos 0:083111ae2a11 704 * @param rx The buffer for sending
saloutos 0:083111ae2a11 705 * @param rx_length The number of words to transmit
saloutos 0:083111ae2a11 706 * @param rx_width The bit width of buffer word
saloutos 0:083111ae2a11 707 * @param handler The serial handler
saloutos 0:083111ae2a11 708 * @param event The logical OR of events to be registered
saloutos 0:083111ae2a11 709 * @param handler The serial handler
saloutos 0:083111ae2a11 710 * @param char_match A character in range 0-254 to be matched
saloutos 0:083111ae2a11 711 * @param hint A suggestion for how to use DMA with this transfer
saloutos 0:083111ae2a11 712 */
saloutos 0:083111ae2a11 713 void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_width, uint32_t handler, uint32_t event, uint8_t char_match, DMAUsage hint)
saloutos 0:083111ae2a11 714 {
saloutos 0:083111ae2a11 715 // TODO: DMA usage is currently ignored
saloutos 0:083111ae2a11 716 (void) hint;
saloutos 0:083111ae2a11 717
saloutos 0:083111ae2a11 718 /* Sanity check arguments */
saloutos 0:083111ae2a11 719 MBED_ASSERT(obj);
saloutos 0:083111ae2a11 720 MBED_ASSERT(rx != (void*)0);
saloutos 0:083111ae2a11 721 MBED_ASSERT(rx_width == 8); // support only 8b width
saloutos 0:083111ae2a11 722
saloutos 0:083111ae2a11 723 struct serial_s *obj_s = SERIAL_S(obj);
saloutos 0:083111ae2a11 724 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
saloutos 0:083111ae2a11 725
saloutos 0:083111ae2a11 726 serial_enable_event(obj, SERIAL_EVENT_RX_ALL, 0);
saloutos 0:083111ae2a11 727 serial_enable_event(obj, event, 1);
saloutos 0:083111ae2a11 728
saloutos 0:083111ae2a11 729 // set CharMatch
saloutos 0:083111ae2a11 730 obj->char_match = char_match;
saloutos 0:083111ae2a11 731
saloutos 0:083111ae2a11 732 serial_rx_buffer_set(obj, rx, rx_length, rx_width);
saloutos 0:083111ae2a11 733
saloutos 0:083111ae2a11 734 IRQn_Type irq_n = serial_get_irq_n(obj);
saloutos 0:083111ae2a11 735 NVIC_ClearPendingIRQ(irq_n);
saloutos 0:083111ae2a11 736 NVIC_DisableIRQ(irq_n);
saloutos 0:083111ae2a11 737 NVIC_SetPriority(irq_n, 0);
saloutos 0:083111ae2a11 738 NVIC_SetVector(irq_n, (uint32_t)handler);
saloutos 0:083111ae2a11 739 NVIC_EnableIRQ(irq_n);
saloutos 0:083111ae2a11 740
saloutos 0:083111ae2a11 741 // following HAL function will enable the RXNE interrupt + error interrupts
saloutos 0:083111ae2a11 742 HAL_UART_Receive_IT(huart, (uint8_t*)rx, rx_length);
saloutos 0:083111ae2a11 743 }
saloutos 0:083111ae2a11 744
saloutos 0:083111ae2a11 745 /**
saloutos 0:083111ae2a11 746 * Attempts to determine if the serial peripheral is already in use for TX
saloutos 0:083111ae2a11 747 *
saloutos 0:083111ae2a11 748 * @param obj The serial object
saloutos 0:083111ae2a11 749 * @return Non-zero if the TX transaction is ongoing, 0 otherwise
saloutos 0:083111ae2a11 750 */
saloutos 0:083111ae2a11 751 uint8_t serial_tx_active(serial_t *obj)
saloutos 0:083111ae2a11 752 {
saloutos 0:083111ae2a11 753 MBED_ASSERT(obj);
saloutos 0:083111ae2a11 754
saloutos 0:083111ae2a11 755 struct serial_s *obj_s = SERIAL_S(obj);
saloutos 0:083111ae2a11 756 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
saloutos 0:083111ae2a11 757
saloutos 0:083111ae2a11 758 return ((HAL_UART_GetState(huart) == HAL_UART_STATE_BUSY_TX) ? 1 : 0);
saloutos 0:083111ae2a11 759 }
saloutos 0:083111ae2a11 760
saloutos 0:083111ae2a11 761 /**
saloutos 0:083111ae2a11 762 * Attempts to determine if the serial peripheral is already in use for RX
saloutos 0:083111ae2a11 763 *
saloutos 0:083111ae2a11 764 * @param obj The serial object
saloutos 0:083111ae2a11 765 * @return Non-zero if the RX transaction is ongoing, 0 otherwise
saloutos 0:083111ae2a11 766 */
saloutos 0:083111ae2a11 767 uint8_t serial_rx_active(serial_t *obj)
saloutos 0:083111ae2a11 768 {
saloutos 0:083111ae2a11 769 MBED_ASSERT(obj);
saloutos 0:083111ae2a11 770
saloutos 0:083111ae2a11 771 struct serial_s *obj_s = SERIAL_S(obj);
saloutos 0:083111ae2a11 772 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
saloutos 0:083111ae2a11 773
saloutos 0:083111ae2a11 774 return ((HAL_UART_GetState(huart) == HAL_UART_STATE_BUSY_RX) ? 1 : 0);
saloutos 0:083111ae2a11 775 }
saloutos 0:083111ae2a11 776
saloutos 0:083111ae2a11 777 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) {
saloutos 0:083111ae2a11 778 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) {
saloutos 0:083111ae2a11 779 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
saloutos 0:083111ae2a11 780 }
saloutos 0:083111ae2a11 781 }
saloutos 0:083111ae2a11 782
saloutos 0:083111ae2a11 783 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) {
saloutos 0:083111ae2a11 784 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_PE) != RESET) {
saloutos 0:083111ae2a11 785 volatile uint32_t tmpval = huart->Instance->DR; // Clear PE flag
saloutos 0:083111ae2a11 786 } else if (__HAL_UART_GET_FLAG(huart, UART_FLAG_FE) != RESET) {
saloutos 0:083111ae2a11 787 volatile uint32_t tmpval = huart->Instance->DR; // Clear FE flag
saloutos 0:083111ae2a11 788 } else if (__HAL_UART_GET_FLAG(huart, UART_FLAG_NE) != RESET) {
saloutos 0:083111ae2a11 789 volatile uint32_t tmpval = huart->Instance->DR; // Clear NE flag
saloutos 0:083111ae2a11 790 } else if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) {
saloutos 0:083111ae2a11 791 volatile uint32_t tmpval = huart->Instance->DR; // Clear ORE flag
saloutos 0:083111ae2a11 792 }
saloutos 0:083111ae2a11 793 }
saloutos 0:083111ae2a11 794
saloutos 0:083111ae2a11 795 /**
saloutos 0:083111ae2a11 796 * The asynchronous TX and RX handler.
saloutos 0:083111ae2a11 797 *
saloutos 0:083111ae2a11 798 * @param obj The serial object
saloutos 0:083111ae2a11 799 * @return Returns event flags if a TX/RX transfer termination condition was met or 0 otherwise
saloutos 0:083111ae2a11 800 */
saloutos 0:083111ae2a11 801 int serial_irq_handler_asynch(serial_t *obj)
saloutos 0:083111ae2a11 802 {
saloutos 0:083111ae2a11 803 struct serial_s *obj_s = SERIAL_S(obj);
saloutos 0:083111ae2a11 804 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
saloutos 0:083111ae2a11 805
saloutos 0:083111ae2a11 806 volatile int return_event = 0;
saloutos 0:083111ae2a11 807 uint8_t *buf = (uint8_t*)(obj->rx_buff.buffer);
saloutos 0:083111ae2a11 808 uint8_t i = 0;
saloutos 0:083111ae2a11 809
saloutos 0:083111ae2a11 810 // TX PART:
saloutos 0:083111ae2a11 811 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) {
saloutos 0:083111ae2a11 812 if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TC) != RESET) {
saloutos 0:083111ae2a11 813 // Return event SERIAL_EVENT_TX_COMPLETE if requested
saloutos 0:083111ae2a11 814 if ((obj_s->events & SERIAL_EVENT_TX_COMPLETE ) != 0) {
saloutos 0:083111ae2a11 815 return_event |= (SERIAL_EVENT_TX_COMPLETE & obj_s->events);
saloutos 0:083111ae2a11 816 }
saloutos 0:083111ae2a11 817 }
saloutos 0:083111ae2a11 818 }
saloutos 0:083111ae2a11 819
saloutos 0:083111ae2a11 820 // Handle error events
saloutos 0:083111ae2a11 821 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_PE) != RESET) {
saloutos 0:083111ae2a11 822 if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) {
saloutos 0:083111ae2a11 823 return_event |= (SERIAL_EVENT_RX_PARITY_ERROR & obj_s->events);
saloutos 0:083111ae2a11 824 }
saloutos 0:083111ae2a11 825 }
saloutos 0:083111ae2a11 826
saloutos 0:083111ae2a11 827 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_FE) != RESET) {
saloutos 0:083111ae2a11 828 if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) {
saloutos 0:083111ae2a11 829 return_event |= (SERIAL_EVENT_RX_FRAMING_ERROR & obj_s->events);
saloutos 0:083111ae2a11 830 }
saloutos 0:083111ae2a11 831 }
saloutos 0:083111ae2a11 832
saloutos 0:083111ae2a11 833 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) {
saloutos 0:083111ae2a11 834 if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) {
saloutos 0:083111ae2a11 835 return_event |= (SERIAL_EVENT_RX_OVERRUN_ERROR & obj_s->events);
saloutos 0:083111ae2a11 836 }
saloutos 0:083111ae2a11 837 }
saloutos 0:083111ae2a11 838
saloutos 0:083111ae2a11 839 HAL_UART_IRQHandler(huart);
saloutos 0:083111ae2a11 840
saloutos 0:083111ae2a11 841 // Abort if an error occurs
saloutos 0:083111ae2a11 842 if (return_event & SERIAL_EVENT_RX_PARITY_ERROR ||
saloutos 0:083111ae2a11 843 return_event & SERIAL_EVENT_RX_FRAMING_ERROR ||
saloutos 0:083111ae2a11 844 return_event & SERIAL_EVENT_RX_OVERRUN_ERROR) {
saloutos 0:083111ae2a11 845 return return_event;
saloutos 0:083111ae2a11 846 }
saloutos 0:083111ae2a11 847
saloutos 0:083111ae2a11 848 //RX PART
saloutos 0:083111ae2a11 849 if (huart->RxXferSize != 0) {
saloutos 0:083111ae2a11 850 obj->rx_buff.pos = huart->RxXferSize - huart->RxXferCount;
saloutos 0:083111ae2a11 851 }
saloutos 0:083111ae2a11 852 if ((huart->RxXferCount == 0) && (obj->rx_buff.pos >= (obj->rx_buff.length - 1))) {
saloutos 0:083111ae2a11 853 return_event |= (SERIAL_EVENT_RX_COMPLETE & obj_s->events);
saloutos 0:083111ae2a11 854 }
saloutos 0:083111ae2a11 855
saloutos 0:083111ae2a11 856 // Check if char_match is present
saloutos 0:083111ae2a11 857 if (obj_s->events & SERIAL_EVENT_RX_CHARACTER_MATCH) {
saloutos 0:083111ae2a11 858 if (buf != NULL) {
saloutos 0:083111ae2a11 859 for (i = 0; i < obj->rx_buff.pos; i++) {
saloutos 0:083111ae2a11 860 if (buf[i] == obj->char_match) {
saloutos 0:083111ae2a11 861 obj->rx_buff.pos = i;
saloutos 0:083111ae2a11 862 return_event |= (SERIAL_EVENT_RX_CHARACTER_MATCH & obj_s->events);
saloutos 0:083111ae2a11 863 serial_rx_abort_asynch(obj);
saloutos 0:083111ae2a11 864 break;
saloutos 0:083111ae2a11 865 }
saloutos 0:083111ae2a11 866 }
saloutos 0:083111ae2a11 867 }
saloutos 0:083111ae2a11 868 }
saloutos 0:083111ae2a11 869
saloutos 0:083111ae2a11 870 return return_event;
saloutos 0:083111ae2a11 871 }
saloutos 0:083111ae2a11 872
saloutos 0:083111ae2a11 873 /**
saloutos 0:083111ae2a11 874 * Abort the ongoing TX transaction. It disables the enabled interupt for TX and
saloutos 0:083111ae2a11 875 * flush TX hardware buffer if TX FIFO is used
saloutos 0:083111ae2a11 876 *
saloutos 0:083111ae2a11 877 * @param obj The serial object
saloutos 0:083111ae2a11 878 */
saloutos 0:083111ae2a11 879 void serial_tx_abort_asynch(serial_t *obj)
saloutos 0:083111ae2a11 880 {
saloutos 0:083111ae2a11 881 struct serial_s *obj_s = SERIAL_S(obj);
saloutos 0:083111ae2a11 882 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
saloutos 0:083111ae2a11 883
saloutos 0:083111ae2a11 884 __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
saloutos 0:083111ae2a11 885 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
saloutos 0:083111ae2a11 886
saloutos 0:083111ae2a11 887 // clear flags
saloutos 0:083111ae2a11 888 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
saloutos 0:083111ae2a11 889
saloutos 0:083111ae2a11 890 // reset states
saloutos 0:083111ae2a11 891 huart->TxXferCount = 0;
saloutos 0:083111ae2a11 892 // update handle state
saloutos 0:083111ae2a11 893 if(huart->gState == HAL_UART_STATE_BUSY_TX_RX) {
saloutos 0:083111ae2a11 894 huart->gState = HAL_UART_STATE_BUSY_RX;
saloutos 0:083111ae2a11 895 } else {
saloutos 0:083111ae2a11 896 huart->gState = HAL_UART_STATE_READY;
saloutos 0:083111ae2a11 897 }
saloutos 0:083111ae2a11 898 }
saloutos 0:083111ae2a11 899
saloutos 0:083111ae2a11 900 /**
saloutos 0:083111ae2a11 901 * Abort the ongoing RX transaction It disables the enabled interrupt for RX and
saloutos 0:083111ae2a11 902 * flush RX hardware buffer if RX FIFO is used
saloutos 0:083111ae2a11 903 *
saloutos 0:083111ae2a11 904 * @param obj The serial object
saloutos 0:083111ae2a11 905 */
saloutos 0:083111ae2a11 906 void serial_rx_abort_asynch(serial_t *obj)
saloutos 0:083111ae2a11 907 {
saloutos 0:083111ae2a11 908 struct serial_s *obj_s = SERIAL_S(obj);
saloutos 0:083111ae2a11 909 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
saloutos 0:083111ae2a11 910
saloutos 0:083111ae2a11 911 // disable interrupts
saloutos 0:083111ae2a11 912 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
saloutos 0:083111ae2a11 913 __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
saloutos 0:083111ae2a11 914 __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
saloutos 0:083111ae2a11 915
saloutos 0:083111ae2a11 916 // clear flags
saloutos 0:083111ae2a11 917 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_RXNE);
saloutos 0:083111ae2a11 918 volatile uint32_t tmpval = huart->Instance->DR; // Clear errors flag
saloutos 0:083111ae2a11 919
saloutos 0:083111ae2a11 920 // reset states
saloutos 0:083111ae2a11 921 huart->RxXferCount = 0;
saloutos 0:083111ae2a11 922 // update handle state
saloutos 0:083111ae2a11 923 if(huart->RxState == HAL_UART_STATE_BUSY_TX_RX) {
saloutos 0:083111ae2a11 924 huart->RxState = HAL_UART_STATE_BUSY_TX;
saloutos 0:083111ae2a11 925 } else {
saloutos 0:083111ae2a11 926 huart->RxState = HAL_UART_STATE_READY;
saloutos 0:083111ae2a11 927 }
saloutos 0:083111ae2a11 928 }
saloutos 0:083111ae2a11 929
saloutos 0:083111ae2a11 930 #endif
saloutos 0:083111ae2a11 931
saloutos 0:083111ae2a11 932 #if DEVICE_SERIAL_FC
saloutos 0:083111ae2a11 933
saloutos 0:083111ae2a11 934 /**
saloutos 0:083111ae2a11 935 * Set HW Control Flow
saloutos 0:083111ae2a11 936 * @param obj The serial object
saloutos 0:083111ae2a11 937 * @param type The Control Flow type (FlowControlNone, FlowControlRTS, FlowControlCTS, FlowControlRTSCTS)
saloutos 0:083111ae2a11 938 * @param rxflow Pin for the rxflow
saloutos 0:083111ae2a11 939 * @param txflow Pin for the txflow
saloutos 0:083111ae2a11 940 */
saloutos 0:083111ae2a11 941 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
saloutos 0:083111ae2a11 942 {
saloutos 0:083111ae2a11 943 struct serial_s *obj_s = SERIAL_S(obj);
saloutos 0:083111ae2a11 944
saloutos 0:083111ae2a11 945 // Determine the UART to use (UART_1, UART_2, ...)
saloutos 0:083111ae2a11 946 UARTName uart_rts = (UARTName)pinmap_peripheral(rxflow, PinMap_UART_RTS);
saloutos 0:083111ae2a11 947 UARTName uart_cts = (UARTName)pinmap_peripheral(txflow, PinMap_UART_CTS);
saloutos 0:083111ae2a11 948
saloutos 0:083111ae2a11 949 // Get the peripheral name (UART_1, UART_2, ...) from the pin and assign it to the object
saloutos 0:083111ae2a11 950 obj_s->uart = (UARTName)pinmap_merge(uart_cts, uart_rts);
saloutos 0:083111ae2a11 951 MBED_ASSERT(obj_s->uart != (UARTName)NC);
saloutos 0:083111ae2a11 952
saloutos 0:083111ae2a11 953 if(type == FlowControlNone) {
saloutos 0:083111ae2a11 954 // Disable hardware flow control
saloutos 0:083111ae2a11 955 obj_s->hw_flow_ctl = UART_HWCONTROL_NONE;
saloutos 0:083111ae2a11 956 }
saloutos 0:083111ae2a11 957 if (type == FlowControlRTS) {
saloutos 0:083111ae2a11 958 // Enable RTS
saloutos 0:083111ae2a11 959 MBED_ASSERT(uart_rts != (UARTName)NC);
saloutos 0:083111ae2a11 960 obj_s->hw_flow_ctl = UART_HWCONTROL_RTS;
saloutos 0:083111ae2a11 961 obj_s->pin_rts = rxflow;
saloutos 0:083111ae2a11 962 // Enable the pin for RTS function
saloutos 0:083111ae2a11 963 pinmap_pinout(rxflow, PinMap_UART_RTS);
saloutos 0:083111ae2a11 964 }
saloutos 0:083111ae2a11 965 if (type == FlowControlCTS) {
saloutos 0:083111ae2a11 966 // Enable CTS
saloutos 0:083111ae2a11 967 MBED_ASSERT(uart_cts != (UARTName)NC);
saloutos 0:083111ae2a11 968 obj_s->hw_flow_ctl = UART_HWCONTROL_CTS;
saloutos 0:083111ae2a11 969 obj_s->pin_cts = txflow;
saloutos 0:083111ae2a11 970 // Enable the pin for CTS function
saloutos 0:083111ae2a11 971 pinmap_pinout(txflow, PinMap_UART_CTS);
saloutos 0:083111ae2a11 972 }
saloutos 0:083111ae2a11 973 if (type == FlowControlRTSCTS) {
saloutos 0:083111ae2a11 974 // Enable CTS & RTS
saloutos 0:083111ae2a11 975 MBED_ASSERT(uart_rts != (UARTName)NC);
saloutos 0:083111ae2a11 976 MBED_ASSERT(uart_cts != (UARTName)NC);
saloutos 0:083111ae2a11 977 obj_s->hw_flow_ctl = UART_HWCONTROL_RTS_CTS;
saloutos 0:083111ae2a11 978 obj_s->pin_rts = rxflow;
saloutos 0:083111ae2a11 979 obj_s->pin_cts = txflow;
saloutos 0:083111ae2a11 980 // Enable the pin for CTS function
saloutos 0:083111ae2a11 981 pinmap_pinout(txflow, PinMap_UART_CTS);
saloutos 0:083111ae2a11 982 // Enable the pin for RTS function
saloutos 0:083111ae2a11 983 pinmap_pinout(rxflow, PinMap_UART_RTS);
saloutos 0:083111ae2a11 984 }
saloutos 0:083111ae2a11 985
saloutos 0:083111ae2a11 986 init_uart(obj);
saloutos 0:083111ae2a11 987 }
saloutos 0:083111ae2a11 988
saloutos 0:083111ae2a11 989 #endif
saloutos 0:083111ae2a11 990
saloutos 0:083111ae2a11 991 #endif