Andrew SaLoutos / ICM_20948

Modified Arduino library for ICM_20948 IMU for Nucleo boards

util/ICM_20948_REGISTERS.h@0:894b603d32ee, 2022-01-31 (annotated)

Committer:
saloutos
Date:
Mon Jan 31 03:25:31 2022 +0000
Revision:
0:894b603d32ee
modified ICM_20948 Arduino library for Nucleo boards

Who changed what in which revision?

UserRevisionLine numberNew contents of line
saloutos 0:894b603d32ee 1 /*
saloutos 0:894b603d32ee 2
saloutos 0:894b603d32ee 3 This file contains a useful c translation of the datasheet register map
saloutos 0:894b603d32ee 4
saloutos 0:894b603d32ee 5 */
saloutos 0:894b603d32ee 6
saloutos 0:894b603d32ee 7 #ifndef _ICM_20948_REGISTERS_H_
saloutos 0:894b603d32ee 8 #define _ICM_20948_REGISTERS_H_
saloutos 0:894b603d32ee 9
saloutos 0:894b603d32ee 10 #include <stdint.h>
saloutos 0:894b603d32ee 11
saloutos 0:894b603d32ee 12 #ifdef __cplusplus
saloutos 0:894b603d32ee 13 extern "C"
saloutos 0:894b603d32ee 14 {
saloutos 0:894b603d32ee 15 #endif /* __cplusplus */
saloutos 0:894b603d32ee 16
saloutos 0:894b603d32ee 17 typedef enum
saloutos 0:894b603d32ee 18 {
saloutos 0:894b603d32ee 19 // Generalized
saloutos 0:894b603d32ee 20 REG_BANK_SEL = 0x7F,
saloutos 0:894b603d32ee 21
saloutos 0:894b603d32ee 22 // Gyroscope and Accelerometer
saloutos 0:894b603d32ee 23 // User Bank 0
saloutos 0:894b603d32ee 24 AGB0_REG_WHO_AM_I = 0x00,
saloutos 0:894b603d32ee 25 AGB0_REG_LPF,
saloutos 0:894b603d32ee 26 // Break
saloutos 0:894b603d32ee 27 AGB0_REG_USER_CTRL = 0x03,
saloutos 0:894b603d32ee 28 // Break
saloutos 0:894b603d32ee 29 AGB0_REG_LP_CONFIG = 0x05,
saloutos 0:894b603d32ee 30 AGB0_REG_PWR_MGMT_1,
saloutos 0:894b603d32ee 31 AGB0_REG_PWR_MGMT_2,
saloutos 0:894b603d32ee 32 // Break
saloutos 0:894b603d32ee 33 AGB0_REG_INT_PIN_CONFIG = 0x0F,
saloutos 0:894b603d32ee 34 AGB0_REG_INT_ENABLE,
saloutos 0:894b603d32ee 35 AGB0_REG_INT_ENABLE_1,
saloutos 0:894b603d32ee 36 AGB0_REG_INT_ENABLE_2,
saloutos 0:894b603d32ee 37 AGB0_REG_INT_ENABLE_3,
saloutos 0:894b603d32ee 38 // Break
saloutos 0:894b603d32ee 39 AGB0_REG_I2C_MST_STATUS = 0x17,
saloutos 0:894b603d32ee 40 AGB0_REG_DMP_INT_STATUS,
saloutos 0:894b603d32ee 41 AGB0_REG_INT_STATUS,
saloutos 0:894b603d32ee 42 AGB0_REG_INT_STATUS_1,
saloutos 0:894b603d32ee 43 AGB0_REG_INT_STATUS_2,
saloutos 0:894b603d32ee 44 AGB0_REG_INT_STATUS_3,
saloutos 0:894b603d32ee 45 // Break
saloutos 0:894b603d32ee 46 AGB0_REG_SINGLE_FIFO_PRIORITY_SEL = 0x26,
saloutos 0:894b603d32ee 47 // Break
saloutos 0:894b603d32ee 48 AGB0_REG_DELAY_TIMEH = 0x28,
saloutos 0:894b603d32ee 49 AGB0_REG_DELAY_TIMEL,
saloutos 0:894b603d32ee 50 // Break
saloutos 0:894b603d32ee 51 AGB0_REG_ACCEL_XOUT_H = 0x2D,
saloutos 0:894b603d32ee 52 AGB0_REG_ACCEL_XOUT_L,
saloutos 0:894b603d32ee 53 AGB0_REG_ACCEL_YOUT_H,
saloutos 0:894b603d32ee 54 AGB0_REG_ACCEL_YOUT_L,
saloutos 0:894b603d32ee 55 AGB0_REG_ACCEL_ZOUT_H,
saloutos 0:894b603d32ee 56 AGB0_REG_ACCEL_ZOUT_L,
saloutos 0:894b603d32ee 57 AGB0_REG_GYRO_XOUT_H,
saloutos 0:894b603d32ee 58 AGB0_REG_GYRO_XOUT_L,
saloutos 0:894b603d32ee 59 AGB0_REG_GYRO_YOUT_H,
saloutos 0:894b603d32ee 60 AGB0_REG_GYRO_YOUT_L,
saloutos 0:894b603d32ee 61 AGB0_REG_GYRO_ZOUT_H,
saloutos 0:894b603d32ee 62 AGB0_REG_GYRO_ZOUT_L,
saloutos 0:894b603d32ee 63 AGB0_REG_TEMP_OUT_H,
saloutos 0:894b603d32ee 64 AGB0_REG_TEMP_OUT_L,
saloutos 0:894b603d32ee 65 AGB0_REG_EXT_PERIPH_SENS_DATA_00,
saloutos 0:894b603d32ee 66 AGB0_REG_EXT_PERIPH_SENS_DATA_01,
saloutos 0:894b603d32ee 67 AGB0_REG_EXT_PERIPH_SENS_DATA_02,
saloutos 0:894b603d32ee 68 AGB0_REG_EXT_PERIPH_SENS_DATA_03,
saloutos 0:894b603d32ee 69 AGB0_REG_EXT_PERIPH_SENS_DATA_04,
saloutos 0:894b603d32ee 70 AGB0_REG_EXT_PERIPH_SENS_DATA_05,
saloutos 0:894b603d32ee 71 AGB0_REG_EXT_PERIPH_SENS_DATA_06,
saloutos 0:894b603d32ee 72 AGB0_REG_EXT_PERIPH_SENS_DATA_07,
saloutos 0:894b603d32ee 73 AGB0_REG_EXT_PERIPH_SENS_DATA_08,
saloutos 0:894b603d32ee 74 AGB0_REG_EXT_PERIPH_SENS_DATA_09,
saloutos 0:894b603d32ee 75 AGB0_REG_EXT_PERIPH_SENS_DATA_10,
saloutos 0:894b603d32ee 76 AGB0_REG_EXT_PERIPH_SENS_DATA_11,
saloutos 0:894b603d32ee 77 AGB0_REG_EXT_PERIPH_SENS_DATA_12,
saloutos 0:894b603d32ee 78 AGB0_REG_EXT_PERIPH_SENS_DATA_13,
saloutos 0:894b603d32ee 79 AGB0_REG_EXT_PERIPH_SENS_DATA_14,
saloutos 0:894b603d32ee 80 AGB0_REG_EXT_PERIPH_SENS_DATA_15,
saloutos 0:894b603d32ee 81 AGB0_REG_EXT_PERIPH_SENS_DATA_16,
saloutos 0:894b603d32ee 82 AGB0_REG_EXT_PERIPH_SENS_DATA_17,
saloutos 0:894b603d32ee 83 AGB0_REG_EXT_PERIPH_SENS_DATA_18,
saloutos 0:894b603d32ee 84 AGB0_REG_EXT_PERIPH_SENS_DATA_19,
saloutos 0:894b603d32ee 85 AGB0_REG_EXT_PERIPH_SENS_DATA_20,
saloutos 0:894b603d32ee 86 AGB0_REG_EXT_PERIPH_SENS_DATA_21,
saloutos 0:894b603d32ee 87 AGB0_REG_EXT_PERIPH_SENS_DATA_22,
saloutos 0:894b603d32ee 88 AGB0_REG_EXT_PERIPH_SENS_DATA_23,
saloutos 0:894b603d32ee 89 // Break
saloutos 0:894b603d32ee 90 AGB0_REG_TEMP_CONFIG = 0x53,
saloutos 0:894b603d32ee 91 // Break
saloutos 0:894b603d32ee 92 AGB0_REG_FIFO_EN_1 = 0x66,
saloutos 0:894b603d32ee 93 AGB0_REG_FIFO_EN_2,
saloutos 0:894b603d32ee 94 AGB0_REG_FIFO_RST,
saloutos 0:894b603d32ee 95 AGB0_REG_FIFO_MODE,
saloutos 0:894b603d32ee 96 // Break
saloutos 0:894b603d32ee 97 AGB0_REG_FIFO_COUNT_H = 0x70,
saloutos 0:894b603d32ee 98 AGB0_REG_FIFO_COUNT_L,
saloutos 0:894b603d32ee 99 AGB0_REG_FIFO_R_W,
saloutos 0:894b603d32ee 100 // Break
saloutos 0:894b603d32ee 101 AGB0_REG_DATA_RDY_STATUS = 0x74,
saloutos 0:894b603d32ee 102 AGB0_REG_HW_FIX_DISABLE,
saloutos 0:894b603d32ee 103 AGB0_REG_FIFO_CFG,
saloutos 0:894b603d32ee 104 // Break
saloutos 0:894b603d32ee 105 AGB0_REG_MEM_START_ADDR = 0x7C, // Hmm, Invensense thought they were sneaky not listing these locations on the datasheet...
saloutos 0:894b603d32ee 106 AGB0_REG_MEM_R_W = 0x7D, // These three locations seem to be able to access some memory within the device
saloutos 0:894b603d32ee 107 AGB0_REG_MEM_BANK_SEL = 0x7E, // And that location is also where the DMP image gets loaded
saloutos 0:894b603d32ee 108 AGB0_REG_REG_BANK_SEL = 0x7F,
saloutos 0:894b603d32ee 109
saloutos 0:894b603d32ee 110 // Bank 1
saloutos 0:894b603d32ee 111 AGB1_REG_SELF_TEST_X_GYRO = 0x02,
saloutos 0:894b603d32ee 112 AGB1_REG_SELF_TEST_Y_GYRO,
saloutos 0:894b603d32ee 113 AGB1_REG_SELF_TEST_Z_GYRO,
saloutos 0:894b603d32ee 114 // Break
saloutos 0:894b603d32ee 115 AGB1_REG_SELF_TEST_X_ACCEL = 0x0E,
saloutos 0:894b603d32ee 116 AGB1_REG_SELF_TEST_Y_ACCEL,
saloutos 0:894b603d32ee 117 AGB1_REG_SELF_TEST_Z_ACCEL,
saloutos 0:894b603d32ee 118 // Break
saloutos 0:894b603d32ee 119 AGB1_REG_XA_OFFS_H = 0x14,
saloutos 0:894b603d32ee 120 AGB1_REG_XA_OFFS_L,
saloutos 0:894b603d32ee 121 // Break
saloutos 0:894b603d32ee 122 AGB1_REG_YA_OFFS_H = 0x17,
saloutos 0:894b603d32ee 123 AGB1_REG_YA_OFFS_L,
saloutos 0:894b603d32ee 124 // Break
saloutos 0:894b603d32ee 125 AGB1_REG_ZA_OFFS_H = 0x1A,
saloutos 0:894b603d32ee 126 AGB1_REG_ZA_OFFS_L,
saloutos 0:894b603d32ee 127 // Break
saloutos 0:894b603d32ee 128 AGB1_REG_TIMEBASE_CORRECTION_PLL = 0x28,
saloutos 0:894b603d32ee 129 // Break
saloutos 0:894b603d32ee 130 AGB1_REG_REG_BANK_SEL = 0x7F,
saloutos 0:894b603d32ee 131
saloutos 0:894b603d32ee 132 // Bank 2
saloutos 0:894b603d32ee 133 AGB2_REG_GYRO_SMPLRT_DIV = 0x00,
saloutos 0:894b603d32ee 134 AGB2_REG_GYRO_CONFIG_1,
saloutos 0:894b603d32ee 135 AGB2_REG_GYRO_CONFIG_2,
saloutos 0:894b603d32ee 136 AGB2_REG_XG_OFFS_USRH,
saloutos 0:894b603d32ee 137 AGB2_REG_XG_OFFS_USRL,
saloutos 0:894b603d32ee 138 AGB2_REG_YG_OFFS_USRH,
saloutos 0:894b603d32ee 139 AGB2_REG_YG_OFFS_USRL,
saloutos 0:894b603d32ee 140 AGB2_REG_ZG_OFFS_USRH,
saloutos 0:894b603d32ee 141 AGB2_REG_ZG_OFFS_USRL,
saloutos 0:894b603d32ee 142 AGB2_REG_ODR_ALIGN_EN,
saloutos 0:894b603d32ee 143 // Break
saloutos 0:894b603d32ee 144 AGB2_REG_ACCEL_SMPLRT_DIV_1 = 0x10,
saloutos 0:894b603d32ee 145 AGB2_REG_ACCEL_SMPLRT_DIV_2,
saloutos 0:894b603d32ee 146 AGB2_REG_ACCEL_INTEL_CTRL,
saloutos 0:894b603d32ee 147 AGB2_REG_ACCEL_WOM_THR,
saloutos 0:894b603d32ee 148 AGB2_REG_ACCEL_CONFIG,
saloutos 0:894b603d32ee 149 AGB2_REG_ACCEL_CONFIG_2,
saloutos 0:894b603d32ee 150 // Break
saloutos 0:894b603d32ee 151 AGB2_REG_PRS_ODR_CONFIG = 0x20,
saloutos 0:894b603d32ee 152 // Break
saloutos 0:894b603d32ee 153 AGB2_REG_PRGM_START_ADDRH = 0x50,
saloutos 0:894b603d32ee 154 AGB2_REG_PRGM_START_ADDRL,
saloutos 0:894b603d32ee 155 AGB2_REG_FSYNC_CONFIG,
saloutos 0:894b603d32ee 156 AGB2_REG_TEMP_CONFIG,
saloutos 0:894b603d32ee 157 AGB2_REG_MOD_CTRL_USR,
saloutos 0:894b603d32ee 158 // Break
saloutos 0:894b603d32ee 159 AGB2_REG_REG_BANK_SEL = 0x7F,
saloutos 0:894b603d32ee 160
saloutos 0:894b603d32ee 161 // Bank 3
saloutos 0:894b603d32ee 162 AGB3_REG_I2C_MST_ODR_CONFIG = 0x00,
saloutos 0:894b603d32ee 163 AGB3_REG_I2C_MST_CTRL,
saloutos 0:894b603d32ee 164 AGB3_REG_I2C_MST_DELAY_CTRL,
saloutos 0:894b603d32ee 165 AGB3_REG_I2C_PERIPH0_ADDR,
saloutos 0:894b603d32ee 166 AGB3_REG_I2C_PERIPH0_REG,
saloutos 0:894b603d32ee 167 AGB3_REG_I2C_PERIPH0_CTRL,
saloutos 0:894b603d32ee 168 AGB3_REG_I2C_PERIPH0_DO,
saloutos 0:894b603d32ee 169 AGB3_REG_I2C_PERIPH1_ADDR,
saloutos 0:894b603d32ee 170 AGB3_REG_I2C_PERIPH1_REG,
saloutos 0:894b603d32ee 171 AGB3_REG_I2C_PERIPH1_CTRL,
saloutos 0:894b603d32ee 172 AGB3_REG_I2C_PERIPH1_DO,
saloutos 0:894b603d32ee 173 AGB3_REG_I2C_PERIPH2_ADDR,
saloutos 0:894b603d32ee 174 AGB3_REG_I2C_PERIPH2_REG,
saloutos 0:894b603d32ee 175 AGB3_REG_I2C_PERIPH2_CTRL,
saloutos 0:894b603d32ee 176 AGB3_REG_I2C_PERIPH2_DO,
saloutos 0:894b603d32ee 177 AGB3_REG_I2C_PERIPH3_ADDR,
saloutos 0:894b603d32ee 178 AGB3_REG_I2C_PERIPH3_REG,
saloutos 0:894b603d32ee 179 AGB3_REG_I2C_PERIPH3_CTRL,
saloutos 0:894b603d32ee 180 AGB3_REG_I2C_PERIPH3_DO,
saloutos 0:894b603d32ee 181 AGB3_REG_I2C_PERIPH4_ADDR,
saloutos 0:894b603d32ee 182 AGB3_REG_I2C_PERIPH4_REG,
saloutos 0:894b603d32ee 183 AGB3_REG_I2C_PERIPH4_CTRL,
saloutos 0:894b603d32ee 184 AGB3_REG_I2C_PERIPH4_DO,
saloutos 0:894b603d32ee 185 AGB3_REG_I2C_PERIPH4_DI,
saloutos 0:894b603d32ee 186 // Break
saloutos 0:894b603d32ee 187 AGB3_REG_REG_BANK_SEL = 0x7F,
saloutos 0:894b603d32ee 188
saloutos 0:894b603d32ee 189 // Magnetometer
saloutos 0:894b603d32ee 190 M_REG_WIA2 = 0x01,
saloutos 0:894b603d32ee 191 // Break
saloutos 0:894b603d32ee 192 M_REG_ST1 = 0x10,
saloutos 0:894b603d32ee 193 M_REG_HXL,
saloutos 0:894b603d32ee 194 M_REG_HXH,
saloutos 0:894b603d32ee 195 M_REG_HYL,
saloutos 0:894b603d32ee 196 M_REG_HYH,
saloutos 0:894b603d32ee 197 M_REG_HZL,
saloutos 0:894b603d32ee 198 M_REG_HZH,
saloutos 0:894b603d32ee 199 M_REG_ST2,
saloutos 0:894b603d32ee 200 // Break
saloutos 0:894b603d32ee 201 M_REG_CNTL2 = 0x31,
saloutos 0:894b603d32ee 202 M_REG_CNTL3,
saloutos 0:894b603d32ee 203 M_REG_TS1,
saloutos 0:894b603d32ee 204 M_REG_TS2,
saloutos 0:894b603d32ee 205 } ICM_20948_Reg_Addr_e; // These enums are not needed for the user, so they stay in this scope (simplifies naming among other things)
saloutos 0:894b603d32ee 206
saloutos 0:894b603d32ee 207 // Type definitions for the registers
saloutos 0:894b603d32ee 208 typedef struct
saloutos 0:894b603d32ee 209 {
saloutos 0:894b603d32ee 210 uint8_t WHO_AM_I;
saloutos 0:894b603d32ee 211 } ICM_20948_WHO_AM_I_t;
saloutos 0:894b603d32ee 212
saloutos 0:894b603d32ee 213 typedef struct
saloutos 0:894b603d32ee 214 {
saloutos 0:894b603d32ee 215 uint8_t reserved_0 : 1;
saloutos 0:894b603d32ee 216 uint8_t I2C_MST_RST : 1;
saloutos 0:894b603d32ee 217 uint8_t SRAM_RST : 1;
saloutos 0:894b603d32ee 218 uint8_t DMP_RST : 1;
saloutos 0:894b603d32ee 219 uint8_t I2C_IF_DIS : 1;
saloutos 0:894b603d32ee 220 uint8_t I2C_MST_EN : 1;
saloutos 0:894b603d32ee 221 uint8_t FIFO_EN : 1;
saloutos 0:894b603d32ee 222 uint8_t DMP_EN : 1;
saloutos 0:894b603d32ee 223 } ICM_20948_USER_CTRL_t;
saloutos 0:894b603d32ee 224
saloutos 0:894b603d32ee 225 typedef struct
saloutos 0:894b603d32ee 226 {
saloutos 0:894b603d32ee 227 uint8_t reserved_0 : 4;
saloutos 0:894b603d32ee 228 uint8_t GYRO_CYCLE : 1;
saloutos 0:894b603d32ee 229 uint8_t ACCEL_CYCLE : 1;
saloutos 0:894b603d32ee 230 uint8_t I2C_MST_CYCLE : 1;
saloutos 0:894b603d32ee 231 uint8_t reserved_1 : 1;
saloutos 0:894b603d32ee 232 } ICM_20948_LP_CONFIG_t;
saloutos 0:894b603d32ee 233
saloutos 0:894b603d32ee 234 typedef struct
saloutos 0:894b603d32ee 235 {
saloutos 0:894b603d32ee 236 uint8_t CLKSEL : 3;
saloutos 0:894b603d32ee 237 uint8_t TEMP_DIS : 1;
saloutos 0:894b603d32ee 238 uint8_t reserved_0 : 1;
saloutos 0:894b603d32ee 239 uint8_t LP_EN : 1;
saloutos 0:894b603d32ee 240 uint8_t SLEEP : 1;
saloutos 0:894b603d32ee 241 uint8_t DEVICE_RESET : 1;
saloutos 0:894b603d32ee 242 } ICM_20948_PWR_MGMT_1_t;
saloutos 0:894b603d32ee 243
saloutos 0:894b603d32ee 244 typedef struct
saloutos 0:894b603d32ee 245 {
saloutos 0:894b603d32ee 246 uint8_t DISABLE_GYRO : 3;
saloutos 0:894b603d32ee 247 uint8_t DIABLE_ACCEL : 3;
saloutos 0:894b603d32ee 248 uint8_t reserved_0 : 2;
saloutos 0:894b603d32ee 249 } ICM_20948_PWR_MGMT_2_t;
saloutos 0:894b603d32ee 250
saloutos 0:894b603d32ee 251 typedef struct
saloutos 0:894b603d32ee 252 {
saloutos 0:894b603d32ee 253 uint8_t reserved_0 : 1;
saloutos 0:894b603d32ee 254 uint8_t BYPASS_EN : 1;
saloutos 0:894b603d32ee 255 uint8_t FSYNC_INT_MODE_EN : 1;
saloutos 0:894b603d32ee 256 uint8_t ACTL_FSYNC : 1;
saloutos 0:894b603d32ee 257 uint8_t INT_ANYRD_2CLEAR : 1;
saloutos 0:894b603d32ee 258 uint8_t INT1_LATCH_EN : 1;
saloutos 0:894b603d32ee 259 uint8_t INT1_OPEN : 1;
saloutos 0:894b603d32ee 260 uint8_t INT1_ACTL : 1;
saloutos 0:894b603d32ee 261 } ICM_20948_INT_PIN_CFG_t;
saloutos 0:894b603d32ee 262
saloutos 0:894b603d32ee 263 typedef struct
saloutos 0:894b603d32ee 264 {
saloutos 0:894b603d32ee 265 uint8_t I2C_MST_INT_EN : 1;
saloutos 0:894b603d32ee 266 uint8_t DMP_INT1_EN : 1;
saloutos 0:894b603d32ee 267 uint8_t PLL_READY_EN : 1;
saloutos 0:894b603d32ee 268 uint8_t WOM_INT_EN : 1;
saloutos 0:894b603d32ee 269 uint8_t reserved_0 : 3;
saloutos 0:894b603d32ee 270 uint8_t REG_WOF_EN : 1;
saloutos 0:894b603d32ee 271 } ICM_20948_INT_ENABLE_t;
saloutos 0:894b603d32ee 272
saloutos 0:894b603d32ee 273 typedef struct
saloutos 0:894b603d32ee 274 {
saloutos 0:894b603d32ee 275 uint8_t RAW_DATA_0_RDY_EN : 1;
saloutos 0:894b603d32ee 276 uint8_t reserved_0 : 7;
saloutos 0:894b603d32ee 277 } ICM_20948_INT_ENABLE_1_t;
saloutos 0:894b603d32ee 278
saloutos 0:894b603d32ee 279 typedef union
saloutos 0:894b603d32ee 280 {
saloutos 0:894b603d32ee 281 struct
saloutos 0:894b603d32ee 282 {
saloutos 0:894b603d32ee 283 uint8_t FIFO_OVERFLOW_EN_40 : 5;
saloutos 0:894b603d32ee 284 uint8_t reserved_0 : 3;
saloutos 0:894b603d32ee 285 } grouped;
saloutos 0:894b603d32ee 286 struct
saloutos 0:894b603d32ee 287 {
saloutos 0:894b603d32ee 288 uint8_t FIFO_OVERFLOW_EN_0 : 1;
saloutos 0:894b603d32ee 289 uint8_t FIFO_OVERFLOW_EN_1 : 1;
saloutos 0:894b603d32ee 290 uint8_t FIFO_OVERFLOW_EN_2 : 1;
saloutos 0:894b603d32ee 291 uint8_t FIFO_OVERFLOW_EN_3 : 1;
saloutos 0:894b603d32ee 292 uint8_t FIFO_OVERFLOW_EN_4 : 1;
saloutos 0:894b603d32ee 293 uint8_t reserved_0 : 3;
saloutos 0:894b603d32ee 294 } individual;
saloutos 0:894b603d32ee 295 } ICM_20948_INT_ENABLE_2_t;
saloutos 0:894b603d32ee 296
saloutos 0:894b603d32ee 297 // typedef struct{
saloutos 0:894b603d32ee 298 // uint8_t FIFO_OVERFLOW_EN_40 : 5;
saloutos 0:894b603d32ee 299 // uint8_t reserved_0 : 3;
saloutos 0:894b603d32ee 300 // }ICM_20948_INT_ENABLE_2_t;
saloutos 0:894b603d32ee 301
saloutos 0:894b603d32ee 302 typedef union
saloutos 0:894b603d32ee 303 {
saloutos 0:894b603d32ee 304 struct
saloutos 0:894b603d32ee 305 {
saloutos 0:894b603d32ee 306 uint8_t FIFO_WM_EN_40 : 5;
saloutos 0:894b603d32ee 307 uint8_t reserved_0 : 3;
saloutos 0:894b603d32ee 308 } grouped;
saloutos 0:894b603d32ee 309 struct
saloutos 0:894b603d32ee 310 {
saloutos 0:894b603d32ee 311 uint8_t FIFO_WM_EN_0 : 1;
saloutos 0:894b603d32ee 312 uint8_t FIFO_WM_EN_1 : 1;
saloutos 0:894b603d32ee 313 uint8_t FIFO_WM_EN_2 : 1;
saloutos 0:894b603d32ee 314 uint8_t FIFO_WM_EN_3 : 1;
saloutos 0:894b603d32ee 315 uint8_t FIFO_WM_EN_4 : 1;
saloutos 0:894b603d32ee 316 uint8_t reserved_0 : 3;
saloutos 0:894b603d32ee 317 } individual;
saloutos 0:894b603d32ee 318 } ICM_20948_INT_ENABLE_3_t;
saloutos 0:894b603d32ee 319
saloutos 0:894b603d32ee 320 // typedef struct{
saloutos 0:894b603d32ee 321 // uint8_t FIFO_WM_EN_40 : 5;
saloutos 0:894b603d32ee 322 // uint8_t reserved_0 : 3;
saloutos 0:894b603d32ee 323 // }ICM_20948_INT_ENABLE_3_t;
saloutos 0:894b603d32ee 324
saloutos 0:894b603d32ee 325 typedef struct
saloutos 0:894b603d32ee 326 {
saloutos 0:894b603d32ee 327 uint8_t I2C_PERIPH0_NACK : 1;
saloutos 0:894b603d32ee 328 uint8_t I2C_PERIPH1_NACK : 1;
saloutos 0:894b603d32ee 329 uint8_t I2C_PERIPH2_NACK : 1;
saloutos 0:894b603d32ee 330 uint8_t I2C_PERIPH3_NACK : 1;
saloutos 0:894b603d32ee 331 uint8_t I2C_PERIPH4_NACK : 1;
saloutos 0:894b603d32ee 332 uint8_t I2C_LOST_ARB : 1;
saloutos 0:894b603d32ee 333 uint8_t I2C_PERIPH4_DONE : 1;
saloutos 0:894b603d32ee 334 uint8_t PASS_THROUGH : 1;
saloutos 0:894b603d32ee 335 } ICM_20948_I2C_MST_STATUS_t;
saloutos 0:894b603d32ee 336
saloutos 0:894b603d32ee 337 typedef struct
saloutos 0:894b603d32ee 338 {
saloutos 0:894b603d32ee 339 uint8_t reserved0 : 1;
saloutos 0:894b603d32ee 340 uint8_t DMP_INT_Motion_Detect_SMD : 1;
saloutos 0:894b603d32ee 341 uint8_t reserved1 : 1;
saloutos 0:894b603d32ee 342 uint8_t DMP_INT_Tilt_Event : 1;
saloutos 0:894b603d32ee 343 uint8_t reserved2 : 4;
saloutos 0:894b603d32ee 344 } ICM_20948_DMP_INT_STATUS_t; // Mostly guesswork from InvenSense App Note
saloutos 0:894b603d32ee 345
saloutos 0:894b603d32ee 346 typedef struct
saloutos 0:894b603d32ee 347 {
saloutos 0:894b603d32ee 348 uint8_t I2C_MST_INT : 1;
saloutos 0:894b603d32ee 349 uint8_t DMP_INT1 : 1;
saloutos 0:894b603d32ee 350 uint8_t PLL_RDY_INT : 1;
saloutos 0:894b603d32ee 351 uint8_t WOM_INT : 1;
saloutos 0:894b603d32ee 352 uint8_t reserved_0 : 4;
saloutos 0:894b603d32ee 353 } ICM_20948_INT_STATUS_t;
saloutos 0:894b603d32ee 354
saloutos 0:894b603d32ee 355 typedef struct
saloutos 0:894b603d32ee 356 {
saloutos 0:894b603d32ee 357 uint8_t RAW_DATA_0_RDY_INT : 1;
saloutos 0:894b603d32ee 358 uint8_t reserved_0 : 7;
saloutos 0:894b603d32ee 359 } ICM_20948_INT_STATUS_1_t;
saloutos 0:894b603d32ee 360
saloutos 0:894b603d32ee 361 // typedef union{
saloutos 0:894b603d32ee 362 // struct{
saloutos 0:894b603d32ee 363 // uint8_t FIFO_OVERFLOW_INT_40 : 5;
saloutos 0:894b603d32ee 364 // uint8_t reserved_0 : 3;
saloutos 0:894b603d32ee 365 // }grouped;
saloutos 0:894b603d32ee 366 // struct{
saloutos 0:894b603d32ee 367 // uint8_t FIFO_OVERFLOW_INT_0 : 1;
saloutos 0:894b603d32ee 368 // uint8_t FIFO_OVERFLOW_INT_1 : 1;
saloutos 0:894b603d32ee 369 // uint8_t FIFO_OVERFLOW_INT_2 : 1;
saloutos 0:894b603d32ee 370 // uint8_t FIFO_OVERFLOW_INT_3 : 1;
saloutos 0:894b603d32ee 371 // uint8_t FIFO_OVERFLOW_INT_4 : 1;
saloutos 0:894b603d32ee 372 // uint8_t reserved_0 : 3;
saloutos 0:894b603d32ee 373 // }individual;
saloutos 0:894b603d32ee 374 // }ICM_20948_INT_STATUS_2_t;
saloutos 0:894b603d32ee 375
saloutos 0:894b603d32ee 376 typedef struct
saloutos 0:894b603d32ee 377 {
saloutos 0:894b603d32ee 378 uint8_t FIFO_OVERFLOW_INT_40 : 5;
saloutos 0:894b603d32ee 379 uint8_t reserved_0 : 3;
saloutos 0:894b603d32ee 380 } ICM_20948_INT_STATUS_2_t;
saloutos 0:894b603d32ee 381
saloutos 0:894b603d32ee 382 // typedef union{
saloutos 0:894b603d32ee 383 // struct{
saloutos 0:894b603d32ee 384 // uint8_t FIFO_WM_INT_40 : 5;
saloutos 0:894b603d32ee 385 // uint8_t reserved_0 : 3;
saloutos 0:894b603d32ee 386 // }grouped;
saloutos 0:894b603d32ee 387 // struct{
saloutos 0:894b603d32ee 388 // uint8_t FIFO_WM_INT_0 : 1;
saloutos 0:894b603d32ee 389 // uint8_t FIFO_WM_INT_1 : 1;
saloutos 0:894b603d32ee 390 // uint8_t FIFO_WM_INT_2 : 1;
saloutos 0:894b603d32ee 391 // uint8_t FIFO_WM_INT_3 : 1;
saloutos 0:894b603d32ee 392 // uint8_t FIFO_WM_INT_4 : 1;
saloutos 0:894b603d32ee 393 // uint8_t reserved_0 : 3;
saloutos 0:894b603d32ee 394 // }individual;
saloutos 0:894b603d32ee 395 // }ICM_20948_INT_STATUS_3_t;
saloutos 0:894b603d32ee 396
saloutos 0:894b603d32ee 397 typedef struct
saloutos 0:894b603d32ee 398 {
saloutos 0:894b603d32ee 399 uint8_t FIFO_WM_INT40 : 5;
saloutos 0:894b603d32ee 400 uint8_t reserved_0 : 3;
saloutos 0:894b603d32ee 401 } ICM_20948_INT_STATUS_3_t;
saloutos 0:894b603d32ee 402
saloutos 0:894b603d32ee 403 typedef struct
saloutos 0:894b603d32ee 404 {
saloutos 0:894b603d32ee 405 uint8_t DELAY_TIMEH;
saloutos 0:894b603d32ee 406 } ICM_20948_DELAY_TIMEH_t;
saloutos 0:894b603d32ee 407
saloutos 0:894b603d32ee 408 typedef struct
saloutos 0:894b603d32ee 409 {
saloutos 0:894b603d32ee 410 uint8_t DELAY_TIMEL;
saloutos 0:894b603d32ee 411 } ICM_20948_DELAY_TIMEL_t;
saloutos 0:894b603d32ee 412
saloutos 0:894b603d32ee 413 typedef struct
saloutos 0:894b603d32ee 414 {
saloutos 0:894b603d32ee 415 uint8_t ACCEL_XOUT_H;
saloutos 0:894b603d32ee 416 } ICM_20948_ACCEL_XOUT_H_t;
saloutos 0:894b603d32ee 417
saloutos 0:894b603d32ee 418 typedef struct
saloutos 0:894b603d32ee 419 {
saloutos 0:894b603d32ee 420 uint8_t ACCEL_XOUT_L;
saloutos 0:894b603d32ee 421 } ICM_20948_ACCEL_XOUT_L_t;
saloutos 0:894b603d32ee 422
saloutos 0:894b603d32ee 423 typedef struct
saloutos 0:894b603d32ee 424 {
saloutos 0:894b603d32ee 425 uint8_t ACCEL_YOUT_H;
saloutos 0:894b603d32ee 426 } ICM_20948_ACCEL_YOUT_H_t;
saloutos 0:894b603d32ee 427
saloutos 0:894b603d32ee 428 typedef struct
saloutos 0:894b603d32ee 429 {
saloutos 0:894b603d32ee 430 uint8_t ACCEL_YOUT_L;
saloutos 0:894b603d32ee 431 } ICM_20948_ACCEL_YOUT_L_t;
saloutos 0:894b603d32ee 432
saloutos 0:894b603d32ee 433 typedef struct
saloutos 0:894b603d32ee 434 {
saloutos 0:894b603d32ee 435 uint8_t ACCEL_ZOUT_H;
saloutos 0:894b603d32ee 436 } ICM_20948_ACCEL_ZOUT_H_t;
saloutos 0:894b603d32ee 437
saloutos 0:894b603d32ee 438 typedef struct
saloutos 0:894b603d32ee 439 {
saloutos 0:894b603d32ee 440 uint8_t ACCEL_ZOUT_L;
saloutos 0:894b603d32ee 441 } ICM_20948_ACCEL_ZOUT_L_t;
saloutos 0:894b603d32ee 442
saloutos 0:894b603d32ee 443 typedef struct
saloutos 0:894b603d32ee 444 {
saloutos 0:894b603d32ee 445 uint8_t GYRO_XOUT_H;
saloutos 0:894b603d32ee 446 } ICM_20948_GYRO_XOUT_H_t;
saloutos 0:894b603d32ee 447
saloutos 0:894b603d32ee 448 typedef struct
saloutos 0:894b603d32ee 449 {
saloutos 0:894b603d32ee 450 uint8_t GYRO_XOUT_L;
saloutos 0:894b603d32ee 451 } ICM_20948_GYRO_XOUT_L_t;
saloutos 0:894b603d32ee 452
saloutos 0:894b603d32ee 453 typedef struct
saloutos 0:894b603d32ee 454 {
saloutos 0:894b603d32ee 455 uint8_t GYRO_YOUT_H;
saloutos 0:894b603d32ee 456 } ICM_20948_GYRO_YOUT_H_t;
saloutos 0:894b603d32ee 457
saloutos 0:894b603d32ee 458 typedef struct
saloutos 0:894b603d32ee 459 {
saloutos 0:894b603d32ee 460 uint8_t GYRO_YOUT_L;
saloutos 0:894b603d32ee 461 } ICM_20948_GYRO_YOUT_L_t;
saloutos 0:894b603d32ee 462
saloutos 0:894b603d32ee 463 typedef struct
saloutos 0:894b603d32ee 464 {
saloutos 0:894b603d32ee 465 uint8_t GYRO_ZOUT_H;
saloutos 0:894b603d32ee 466 } ICM_20948_GYRO_ZOUT_H_t;
saloutos 0:894b603d32ee 467
saloutos 0:894b603d32ee 468 typedef struct
saloutos 0:894b603d32ee 469 {
saloutos 0:894b603d32ee 470 uint8_t GYRO_ZOUT_L;
saloutos 0:894b603d32ee 471 } ICM_20948_GYRO_ZOUT_L_t;
saloutos 0:894b603d32ee 472
saloutos 0:894b603d32ee 473 typedef struct
saloutos 0:894b603d32ee 474 {
saloutos 0:894b603d32ee 475 uint8_t TEMP_OUT_H;
saloutos 0:894b603d32ee 476 } ICM_20948_TEMP_OUT_H_t;
saloutos 0:894b603d32ee 477
saloutos 0:894b603d32ee 478 typedef struct
saloutos 0:894b603d32ee 479 {
saloutos 0:894b603d32ee 480 uint8_t TEMP_OUT_L;
saloutos 0:894b603d32ee 481 } ICM_20948_TEMP_OUT_L_t;
saloutos 0:894b603d32ee 482
saloutos 0:894b603d32ee 483 typedef struct
saloutos 0:894b603d32ee 484 {
saloutos 0:894b603d32ee 485 uint8_t DATA; // Note: this is not worth copying 24 times, despite there being 24 registers like this one
saloutos 0:894b603d32ee 486 } ICM_20948_EXT_PERIPH_SENS_DATA_t;
saloutos 0:894b603d32ee 487
saloutos 0:894b603d32ee 488 typedef struct
saloutos 0:894b603d32ee 489 {
saloutos 0:894b603d32ee 490 uint8_t PERIPH_0_FIFO_EN : 1;
saloutos 0:894b603d32ee 491 uint8_t PERIPH_1_FIFO_EN : 1;
saloutos 0:894b603d32ee 492 uint8_t PERIPH_2_FIFO_EN : 1;
saloutos 0:894b603d32ee 493 uint8_t PERIPH_3_FIFO_EN : 1;
saloutos 0:894b603d32ee 494 uint8_t reserved_0 : 4;
saloutos 0:894b603d32ee 495 } ICM_20948_FIFO_EN_1_t;
saloutos 0:894b603d32ee 496
saloutos 0:894b603d32ee 497 typedef struct
saloutos 0:894b603d32ee 498 {
saloutos 0:894b603d32ee 499 uint8_t TEMP_FIFO_EN : 1;
saloutos 0:894b603d32ee 500 uint8_t GYRO_X_FIFO_EN : 1;
saloutos 0:894b603d32ee 501 uint8_t GYRO_Y_FIFO_EN : 1;
saloutos 0:894b603d32ee 502 uint8_t GYRO_Z_FIFO_EN : 1;
saloutos 0:894b603d32ee 503 uint8_t ACCEL_FIFO_EN : 1;
saloutos 0:894b603d32ee 504 uint8_t reserved_0 : 3;
saloutos 0:894b603d32ee 505 } ICM_20948_FIFO_EN_2_t;
saloutos 0:894b603d32ee 506
saloutos 0:894b603d32ee 507 typedef struct
saloutos 0:894b603d32ee 508 {
saloutos 0:894b603d32ee 509 uint8_t FIFO_RESET : 5;
saloutos 0:894b603d32ee 510 uint8_t reserved_0 : 3;
saloutos 0:894b603d32ee 511 } ICM_20948_FIFO_RST_t;
saloutos 0:894b603d32ee 512
saloutos 0:894b603d32ee 513 typedef struct
saloutos 0:894b603d32ee 514 {
saloutos 0:894b603d32ee 515 uint8_t FIFO_MODE : 5;
saloutos 0:894b603d32ee 516 uint8_t reserved_0 : 3;
saloutos 0:894b603d32ee 517 } ICM_20948_FIFO_MODE_t;
saloutos 0:894b603d32ee 518
saloutos 0:894b603d32ee 519 typedef struct
saloutos 0:894b603d32ee 520 {
saloutos 0:894b603d32ee 521 uint8_t FIFO_COUNTH;
saloutos 0:894b603d32ee 522 } ICM_20948_FIFO_COUNTH_t;
saloutos 0:894b603d32ee 523
saloutos 0:894b603d32ee 524 typedef struct
saloutos 0:894b603d32ee 525 {
saloutos 0:894b603d32ee 526 uint8_t FIFO_COUNTL;
saloutos 0:894b603d32ee 527 } ICM_20948_FIFO_COUNTL_t;
saloutos 0:894b603d32ee 528
saloutos 0:894b603d32ee 529 typedef struct
saloutos 0:894b603d32ee 530 {
saloutos 0:894b603d32ee 531 uint8_t RAW_DATA_RDY : 4;
saloutos 0:894b603d32ee 532 uint8_t reserved_0 : 3;
saloutos 0:894b603d32ee 533 uint8_t WOF_STATUS : 1;
saloutos 0:894b603d32ee 534 } ICM_20948_DATA_RDY_STATUS_t;
saloutos 0:894b603d32ee 535
saloutos 0:894b603d32ee 536 typedef struct
saloutos 0:894b603d32ee 537 {
saloutos 0:894b603d32ee 538 uint8_t FIFO_CFG : 1;
saloutos 0:894b603d32ee 539 uint8_t reserved_0 : 7;
saloutos 0:894b603d32ee 540 } ICM_20948_FIFO_CFG_t;
saloutos 0:894b603d32ee 541
saloutos 0:894b603d32ee 542 // User bank 1 Types
saloutos 0:894b603d32ee 543
saloutos 0:894b603d32ee 544 typedef struct
saloutos 0:894b603d32ee 545 {
saloutos 0:894b603d32ee 546 uint8_t XG_ST_DATA;
saloutos 0:894b603d32ee 547 } ICM_20948_SELF_TEST_X_GYRO_t;
saloutos 0:894b603d32ee 548
saloutos 0:894b603d32ee 549 typedef struct
saloutos 0:894b603d32ee 550 {
saloutos 0:894b603d32ee 551 uint8_t YG_ST_DATA;
saloutos 0:894b603d32ee 552 } ICM_20948_SELF_TEST_Y_GYRO_t;
saloutos 0:894b603d32ee 553
saloutos 0:894b603d32ee 554 typedef struct
saloutos 0:894b603d32ee 555 {
saloutos 0:894b603d32ee 556 uint8_t ZG_ST_DATA;
saloutos 0:894b603d32ee 557 } ICM_20948_SELF_TEST_Z_GYRO_t;
saloutos 0:894b603d32ee 558
saloutos 0:894b603d32ee 559 typedef struct
saloutos 0:894b603d32ee 560 {
saloutos 0:894b603d32ee 561 uint8_t XA_ST_DATA;
saloutos 0:894b603d32ee 562 } ICM_20948_SELF_TEST_X_ACCEL_t;
saloutos 0:894b603d32ee 563
saloutos 0:894b603d32ee 564 typedef struct
saloutos 0:894b603d32ee 565 {
saloutos 0:894b603d32ee 566 uint8_t YA_ST_DATA;
saloutos 0:894b603d32ee 567 } ICM_20948_SELF_TEST_Y_ACCEL_t;
saloutos 0:894b603d32ee 568
saloutos 0:894b603d32ee 569 typedef struct
saloutos 0:894b603d32ee 570 {
saloutos 0:894b603d32ee 571 uint8_t ZA_ST_DATA;
saloutos 0:894b603d32ee 572 } ICM_20948_SELF_TEST_Z_ACCEL_t;
saloutos 0:894b603d32ee 573
saloutos 0:894b603d32ee 574 typedef struct
saloutos 0:894b603d32ee 575 {
saloutos 0:894b603d32ee 576 uint8_t XA_OFFS_14_7;
saloutos 0:894b603d32ee 577 } ICM_20948_XA_OFFS_H_t;
saloutos 0:894b603d32ee 578
saloutos 0:894b603d32ee 579 typedef struct
saloutos 0:894b603d32ee 580 {
saloutos 0:894b603d32ee 581 uint8_t reserved_0 : 1;
saloutos 0:894b603d32ee 582 uint8_t XA_OFFS_6_0 : 7;
saloutos 0:894b603d32ee 583 } ICM_20948_XA_OFFS_L_t;
saloutos 0:894b603d32ee 584
saloutos 0:894b603d32ee 585 typedef struct
saloutos 0:894b603d32ee 586 {
saloutos 0:894b603d32ee 587 uint8_t YA_OFFS_14_7;
saloutos 0:894b603d32ee 588 } ICM_20948_YA_OFFS_H_t;
saloutos 0:894b603d32ee 589
saloutos 0:894b603d32ee 590 typedef struct
saloutos 0:894b603d32ee 591 {
saloutos 0:894b603d32ee 592 uint8_t reserved_0 : 1;
saloutos 0:894b603d32ee 593 uint8_t YA_OFFS_6_0 : 7;
saloutos 0:894b603d32ee 594 } ICM_20948_YA_OFFS_L_t;
saloutos 0:894b603d32ee 595
saloutos 0:894b603d32ee 596 typedef struct
saloutos 0:894b603d32ee 597 {
saloutos 0:894b603d32ee 598 uint8_t ZA_OFFS_14_7;
saloutos 0:894b603d32ee 599 } ICM_20948_ZA_OFFS_H_t;
saloutos 0:894b603d32ee 600
saloutos 0:894b603d32ee 601 typedef struct
saloutos 0:894b603d32ee 602 {
saloutos 0:894b603d32ee 603 uint8_t reserved_0 : 1;
saloutos 0:894b603d32ee 604 uint8_t ZA_OFFS_6_0 : 7;
saloutos 0:894b603d32ee 605 } ICM_20948_ZA_OFFS_L_t;
saloutos 0:894b603d32ee 606
saloutos 0:894b603d32ee 607 typedef struct
saloutos 0:894b603d32ee 608 {
saloutos 0:894b603d32ee 609 uint8_t TBC_PLL;
saloutos 0:894b603d32ee 610 } ICM_20948_TIMEBASE_CORRECTION_PLL_t;
saloutos 0:894b603d32ee 611
saloutos 0:894b603d32ee 612 // User Bank 2 Types
saloutos 0:894b603d32ee 613 typedef struct
saloutos 0:894b603d32ee 614 {
saloutos 0:894b603d32ee 615 uint8_t GYRO_SMPLRT_DIV;
saloutos 0:894b603d32ee 616 } ICM_20948_GYRO_SMPLRT_DIV_t;
saloutos 0:894b603d32ee 617
saloutos 0:894b603d32ee 618 typedef struct
saloutos 0:894b603d32ee 619 {
saloutos 0:894b603d32ee 620 uint8_t GYRO_FCHOICE : 1;
saloutos 0:894b603d32ee 621 uint8_t GYRO_FS_SEL : 2;
saloutos 0:894b603d32ee 622 uint8_t GYRO_DLPFCFG : 3;
saloutos 0:894b603d32ee 623 uint8_t reserved_0 : 2;
saloutos 0:894b603d32ee 624 } ICM_20948_GYRO_CONFIG_1_t;
saloutos 0:894b603d32ee 625
saloutos 0:894b603d32ee 626 typedef struct
saloutos 0:894b603d32ee 627 {
saloutos 0:894b603d32ee 628 uint8_t GYRO_AVGCFG : 3;
saloutos 0:894b603d32ee 629 uint8_t ZGYRO_CTEN : 1;
saloutos 0:894b603d32ee 630 uint8_t YGYRO_CTEN : 1;
saloutos 0:894b603d32ee 631 uint8_t XGYRO_CTEN : 1;
saloutos 0:894b603d32ee 632 uint8_t reserved_0 : 2;
saloutos 0:894b603d32ee 633 } ICM_20948_GYRO_CONFIG_2_t;
saloutos 0:894b603d32ee 634
saloutos 0:894b603d32ee 635 typedef struct
saloutos 0:894b603d32ee 636 {
saloutos 0:894b603d32ee 637 uint8_t XG_OFFS_USER_H;
saloutos 0:894b603d32ee 638 } ICM_20948_XG_OFFS_USRH_t;
saloutos 0:894b603d32ee 639
saloutos 0:894b603d32ee 640 typedef struct
saloutos 0:894b603d32ee 641 {
saloutos 0:894b603d32ee 642 uint8_t XG_OFFS_USER_L;
saloutos 0:894b603d32ee 643 } ICM_20948_XG_OFFS_USRL_t;
saloutos 0:894b603d32ee 644
saloutos 0:894b603d32ee 645 typedef struct
saloutos 0:894b603d32ee 646 {
saloutos 0:894b603d32ee 647 uint8_t YG_OFFS_USER_H;
saloutos 0:894b603d32ee 648 } ICM_20948_YG_OFFS_USRH_t;
saloutos 0:894b603d32ee 649
saloutos 0:894b603d32ee 650 typedef struct
saloutos 0:894b603d32ee 651 {
saloutos 0:894b603d32ee 652 uint8_t YG_OFFS_USER_L;
saloutos 0:894b603d32ee 653 } ICM_20948_YG_OFFS_USRL_t;
saloutos 0:894b603d32ee 654
saloutos 0:894b603d32ee 655 typedef struct
saloutos 0:894b603d32ee 656 {
saloutos 0:894b603d32ee 657 uint8_t ZG_OFFS_USER_H;
saloutos 0:894b603d32ee 658 } ICM_20948_ZG_OFFS_USRH_t;
saloutos 0:894b603d32ee 659
saloutos 0:894b603d32ee 660 typedef struct
saloutos 0:894b603d32ee 661 {
saloutos 0:894b603d32ee 662 uint8_t ZG_OFFS_USER_L;
saloutos 0:894b603d32ee 663 } ICM_20948_ZG_OFFS_USRL_t;
saloutos 0:894b603d32ee 664
saloutos 0:894b603d32ee 665 typedef struct
saloutos 0:894b603d32ee 666 {
saloutos 0:894b603d32ee 667 uint8_t ODR_ALIGN_EN : 1;
saloutos 0:894b603d32ee 668 uint8_t reserved_0 : 7;
saloutos 0:894b603d32ee 669 } ICM_20948_ODR_ALIGN_EN_t;
saloutos 0:894b603d32ee 670
saloutos 0:894b603d32ee 671 typedef struct
saloutos 0:894b603d32ee 672 {
saloutos 0:894b603d32ee 673 uint8_t ACCEL_SMPLRT_DIV_11_8 : 4;
saloutos 0:894b603d32ee 674 uint8_t reserved_0 : 4;
saloutos 0:894b603d32ee 675 } ICM_20948_ACCEL_SMPLRT_DIV_1_t;
saloutos 0:894b603d32ee 676
saloutos 0:894b603d32ee 677 typedef struct
saloutos 0:894b603d32ee 678 {
saloutos 0:894b603d32ee 679 uint8_t ACCEL_SMPLRT_DIV_7_0;
saloutos 0:894b603d32ee 680 } ICM_20948_ACCEL_SMPLRT_DIV_2_t;
saloutos 0:894b603d32ee 681
saloutos 0:894b603d32ee 682 typedef struct
saloutos 0:894b603d32ee 683 {
saloutos 0:894b603d32ee 684 uint8_t ACCEL_INTEL_MODE_INT : 1;
saloutos 0:894b603d32ee 685 uint8_t ACCEL_INTEL_EN : 1;
saloutos 0:894b603d32ee 686 uint8_t reserved_0 : 6;
saloutos 0:894b603d32ee 687 } ICM_20948_ACCEL_INTEL_CTRL_t;
saloutos 0:894b603d32ee 688
saloutos 0:894b603d32ee 689 typedef struct
saloutos 0:894b603d32ee 690 {
saloutos 0:894b603d32ee 691 uint8_t WOM_THRESHOLD;
saloutos 0:894b603d32ee 692 } ICM_20948_ACCEL_WOM_THR_t;
saloutos 0:894b603d32ee 693
saloutos 0:894b603d32ee 694 typedef struct
saloutos 0:894b603d32ee 695 {
saloutos 0:894b603d32ee 696 uint8_t ACCEL_FCHOICE : 1;
saloutos 0:894b603d32ee 697 uint8_t ACCEL_FS_SEL : 2;
saloutos 0:894b603d32ee 698 uint8_t ACCEL_DLPFCFG : 3;
saloutos 0:894b603d32ee 699 uint8_t reserved_0 : 2;
saloutos 0:894b603d32ee 700 } ICM_20948_ACCEL_CONFIG_t;
saloutos 0:894b603d32ee 701
saloutos 0:894b603d32ee 702 typedef struct
saloutos 0:894b603d32ee 703 {
saloutos 0:894b603d32ee 704 uint8_t DEC3_CFG : 2;
saloutos 0:894b603d32ee 705 uint8_t AZ_ST_EN : 1;
saloutos 0:894b603d32ee 706 uint8_t AY_ST_EN : 1;
saloutos 0:894b603d32ee 707 uint8_t AX_ST_EN : 1;
saloutos 0:894b603d32ee 708 uint8_t reserved_0 : 3;
saloutos 0:894b603d32ee 709 } ICM_20948_ACCEL_CONFIG_2_t;
saloutos 0:894b603d32ee 710
saloutos 0:894b603d32ee 711 typedef struct
saloutos 0:894b603d32ee 712 {
saloutos 0:894b603d32ee 713 uint8_t EXT_SYNC_SET : 4;
saloutos 0:894b603d32ee 714 uint8_t WOF_EDGE_INT : 1;
saloutos 0:894b603d32ee 715 uint8_t WOF_DEGLITCH_EN : 1;
saloutos 0:894b603d32ee 716 uint8_t reserved_0 : 1;
saloutos 0:894b603d32ee 717 uint8_t DELAY_TIME_EN : 1;
saloutos 0:894b603d32ee 718 } ICM_20948_FSYNC_CONFIG_t;
saloutos 0:894b603d32ee 719
saloutos 0:894b603d32ee 720 typedef struct
saloutos 0:894b603d32ee 721 {
saloutos 0:894b603d32ee 722 uint8_t TEMP_DLPFCFG : 3;
saloutos 0:894b603d32ee 723 uint8_t reserved_0 : 5;
saloutos 0:894b603d32ee 724 } ICM_20948_TEMP_CONFIG_t;
saloutos 0:894b603d32ee 725
saloutos 0:894b603d32ee 726 typedef struct
saloutos 0:894b603d32ee 727 {
saloutos 0:894b603d32ee 728 uint8_t REG_LP_DMP_EN : 1;
saloutos 0:894b603d32ee 729 uint8_t reserved_0 : 7;
saloutos 0:894b603d32ee 730 } ICM_20948_MOD_CTRL_USR_t;
saloutos 0:894b603d32ee 731
saloutos 0:894b603d32ee 732 // Bank 3 Types
saloutos 0:894b603d32ee 733
saloutos 0:894b603d32ee 734 typedef struct
saloutos 0:894b603d32ee 735 {
saloutos 0:894b603d32ee 736 uint8_t I2C_MST_ODR_CONFIG : 4;
saloutos 0:894b603d32ee 737 uint8_t reserved_0 : 4;
saloutos 0:894b603d32ee 738 } ICM_20948_I2C_MST_ODR_CONFIG_t;
saloutos 0:894b603d32ee 739
saloutos 0:894b603d32ee 740 typedef struct
saloutos 0:894b603d32ee 741 {
saloutos 0:894b603d32ee 742 uint8_t I2C_MST_CLK : 4;
saloutos 0:894b603d32ee 743 uint8_t I2C_MST_P_NSR : 1;
saloutos 0:894b603d32ee 744 uint8_t reserved_0 : 2;
saloutos 0:894b603d32ee 745 uint8_t MULT_MST_EN : 1;
saloutos 0:894b603d32ee 746 } ICM_20948_I2C_MST_CTRL_t;
saloutos 0:894b603d32ee 747
saloutos 0:894b603d32ee 748 typedef struct
saloutos 0:894b603d32ee 749 {
saloutos 0:894b603d32ee 750 uint8_t I2C_PERIPH0_DELAY_EN : 1;
saloutos 0:894b603d32ee 751 uint8_t I2C_PERIPH1_DELAY_EN : 1;
saloutos 0:894b603d32ee 752 uint8_t I2C_PERIPH2_DELAY_EN : 1;
saloutos 0:894b603d32ee 753 uint8_t I2C_PERIPH3_DELAY_EN : 1;
saloutos 0:894b603d32ee 754 uint8_t I2C_PERIPH4_DELAY_EN : 1;
saloutos 0:894b603d32ee 755 uint8_t reserved_0 : 2;
saloutos 0:894b603d32ee 756 uint8_t DELAY_ES_SHADOW : 1;
saloutos 0:894b603d32ee 757 } ICM_20948_I2C_MST_DELAY_CTRL_t;
saloutos 0:894b603d32ee 758
saloutos 0:894b603d32ee 759 typedef struct
saloutos 0:894b603d32ee 760 {
saloutos 0:894b603d32ee 761 uint8_t ID : 7;
saloutos 0:894b603d32ee 762 uint8_t RNW : 1;
saloutos 0:894b603d32ee 763 } ICM_20948_I2C_PERIPHX_ADDR_t;
saloutos 0:894b603d32ee 764
saloutos 0:894b603d32ee 765 typedef struct
saloutos 0:894b603d32ee 766 {
saloutos 0:894b603d32ee 767 uint8_t REG;
saloutos 0:894b603d32ee 768 } ICM_20948_I2C_PERIPHX_REG_t;
saloutos 0:894b603d32ee 769
saloutos 0:894b603d32ee 770 typedef struct
saloutos 0:894b603d32ee 771 {
saloutos 0:894b603d32ee 772 uint8_t LENG : 4;
saloutos 0:894b603d32ee 773 uint8_t GRP : 1;
saloutos 0:894b603d32ee 774 uint8_t REG_DIS : 1;
saloutos 0:894b603d32ee 775 uint8_t BYTE_SW : 1;
saloutos 0:894b603d32ee 776 uint8_t EN : 1;
saloutos 0:894b603d32ee 777 } ICM_20948_I2C_PERIPHX_CTRL_t;
saloutos 0:894b603d32ee 778
saloutos 0:894b603d32ee 779 typedef struct
saloutos 0:894b603d32ee 780 {
saloutos 0:894b603d32ee 781 uint8_t DO;
saloutos 0:894b603d32ee 782 } ICM_20948_I2C_PERIPHX_DO_t;
saloutos 0:894b603d32ee 783
saloutos 0:894b603d32ee 784 typedef struct
saloutos 0:894b603d32ee 785 {
saloutos 0:894b603d32ee 786 uint8_t DLY : 5;
saloutos 0:894b603d32ee 787 uint8_t REG_DIS : 1;
saloutos 0:894b603d32ee 788 uint8_t INT_EN : 1;
saloutos 0:894b603d32ee 789 uint8_t EN : 1;
saloutos 0:894b603d32ee 790 } ICM_20948_I2C_PERIPH4_CTRL_t;
saloutos 0:894b603d32ee 791
saloutos 0:894b603d32ee 792 typedef struct
saloutos 0:894b603d32ee 793 {
saloutos 0:894b603d32ee 794 uint8_t DI;
saloutos 0:894b603d32ee 795 } ICM_20948_I2C_PERIPH4_DI_t;
saloutos 0:894b603d32ee 796
saloutos 0:894b603d32ee 797 // Bank select register!
saloutos 0:894b603d32ee 798
saloutos 0:894b603d32ee 799 typedef struct
saloutos 0:894b603d32ee 800 {
saloutos 0:894b603d32ee 801 uint8_t reserved_0 : 4;
saloutos 0:894b603d32ee 802 uint8_t USER_BANK : 2;
saloutos 0:894b603d32ee 803 uint8_t reserved_1 : 2;
saloutos 0:894b603d32ee 804 } ICM_20948_REG_BANK_SEL_t;
saloutos 0:894b603d32ee 805
saloutos 0:894b603d32ee 806 #ifdef __cplusplus
saloutos 0:894b603d32ee 807 }
saloutos 0:894b603d32ee 808 #endif /* __cplusplus */
saloutos 0:894b603d32ee 809
saloutos 0:894b603d32ee 810 #endif /* _ICM_20948_REGISTERS_H_ */