beacon on/off implemented and working

Dependencies:   mbed-rtos mbed

Fork of i2c_configuring by sakthi priya amirtharaj

Committer:
sakthipriya
Date:
Wed May 13 06:19:25 2015 +0000
Revision:
3:0931a8800543
Parent:
0:e91ee0e99213
end of integration v.1.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sakthipriya 0:e91ee0e99213 1 #include "mbed.h"
sakthipriya 0:e91ee0e99213 2
sakthipriya 3:0931a8800543 3
sakthipriya 3:0931a8800543 4
sakthipriya 3:0931a8800543 5 #define TIMES 20
sakthipriya 3:0931a8800543 6 #define RX_DATA 240 //in bytes
sakthipriya 3:0931a8800543 7 #define TX_DATA 240 //in bytes
sakthipriya 3:0931a8800543 8
sakthipriya 0:e91ee0e99213 9 void writereg(uint8_t reg,uint8_t val);
sakthipriya 0:e91ee0e99213 10 uint8_t readreg(uint8_t reg);
sakthipriya 3:0931a8800543 11 void clearTxBuf();
sakthipriya 3:0931a8800543 12 void clearRxBuf();
sakthipriya 3:0931a8800543 13 int setFrequency(float,float);
sakthipriya 3:0931a8800543 14 void init_beacon();
sakthipriya 0:e91ee0e99213 15 void FUNC_BEA();
sakthipriya 3:0931a8800543 16
sakthipriya 3:0931a8800543 17 #define RF22_MAX_MESSAGE_LEN 255
sakthipriya 3:0931a8800543 18 // These values we set for FIFO thresholds
sakthipriya 3:0931a8800543 19 #define RF22_TXFFAEM_THRESHOLD 4
sakthipriya 3:0931a8800543 20 #define RF22_RXFFAFULL_THRESHOLD 55
sakthipriya 3:0931a8800543 21
sakthipriya 3:0931a8800543 22 // Register names
sakthipriya 3:0931a8800543 23 #define RF22_REG_00_DEVICE_TYPE 0x00
sakthipriya 3:0931a8800543 24 #define RF22_REG_02_DEVICE_STATUS 0x02
sakthipriya 3:0931a8800543 25 #define RF22_REG_03_INTERRUPT_STATUS1 0x03
sakthipriya 3:0931a8800543 26 #define RF22_REG_04_INTERRUPT_STATUS2 0x04
sakthipriya 3:0931a8800543 27 #define RF22_REG_07_OPERATING_MODE1 0x07
sakthipriya 3:0931a8800543 28 #define RF22_REG_08_OPERATING_MODE2 0x08
sakthipriya 3:0931a8800543 29 #define RF22_REG_09_OSCILLATOR_LOAD_CAPACITANCE 0x09
sakthipriya 3:0931a8800543 30 #define RF22_REG_0B_GPIO_CONFIGURATION0 0x0b
sakthipriya 3:0931a8800543 31 #define RF22_REG_0C_GPIO_CONFIGURATION1 0x0c
sakthipriya 3:0931a8800543 32 #define RF22_REG_0D_GPIO_CONFIGURATION2 0x0d
sakthipriya 3:0931a8800543 33 #define RF22_REG_1C_IF_FILTER_BANDWIDTH 0x1c
sakthipriya 3:0931a8800543 34 #define RF22_REG_1F_CLOCK_RECOVERY_GEARSHIFT_OVERRIDE 0x1f
sakthipriya 3:0931a8800543 35 #define RF22_REG_20_CLOCK_RECOVERY_OVERSAMPLING_RATE 0x20
sakthipriya 3:0931a8800543 36 #define RF22_REG_21_CLOCK_RECOVERY_OFFSET2 0x21
sakthipriya 3:0931a8800543 37 #define RF22_REG_22_CLOCK_RECOVERY_OFFSET1 0x22
sakthipriya 3:0931a8800543 38 #define RF22_REG_23_CLOCK_RECOVERY_OFFSET0 0x23
sakthipriya 3:0931a8800543 39 #define RF22_REG_24_CLOCK_RECOVERY_TIMING_LOOP_GAIN1 0x24
sakthipriya 3:0931a8800543 40 #define RF22_REG_25_CLOCK_RECOVERY_TIMING_LOOP_GAIN0 0x25
sakthipriya 3:0931a8800543 41 #define RF22_REG_26_RSSI 0x26
sakthipriya 3:0931a8800543 42 #define RF22_REG_27_RSSI_THRESHOLD 0x27
sakthipriya 3:0931a8800543 43 #define RF22_REG_28_ANTENNA_DIVERSITY1 0x28
sakthipriya 3:0931a8800543 44 #define RF22_REG_29_ANTENNA_DIVERSITY2 0x29
sakthipriya 3:0931a8800543 45 #define RF22_REG_2A_AFC_LIMITER 0x2a
sakthipriya 3:0931a8800543 46 #define RF22_REG_2B_AFC_CORRECTION_READ 0x2b
sakthipriya 3:0931a8800543 47 #define RF22_REG_2C_OOK_COUNTER_VALUE_1 0x2c
sakthipriya 3:0931a8800543 48 #define RF22_REG_2D_OOK_COUNTER_VALUE_2 0x2d
sakthipriya 3:0931a8800543 49 #define RF22_REG_2E_SLICER_PEAK_HOLD 0x2e
sakthipriya 3:0931a8800543 50 #define RF22_REG_30_DATA_ACCESS_CONTROL 0x30
sakthipriya 3:0931a8800543 51 #define RF22_REG_31_EZMAC_STATUS 0x31
sakthipriya 3:0931a8800543 52 #define RF22_REG_32_HEADER_CONTROL1 0x32
sakthipriya 3:0931a8800543 53 #define RF22_REG_33_HEADER_CONTROL2 0x33
sakthipriya 3:0931a8800543 54 #define RF22_REG_34_PREAMBLE_LENGTH 0x34
sakthipriya 3:0931a8800543 55 #define RF22_REG_35_PREAMBLE_DETECTION_CONTROL1 0x35
sakthipriya 3:0931a8800543 56 #define RF22_REG_36_SYNC_WORD3 0x36
sakthipriya 3:0931a8800543 57 #define RF22_REG_37_SYNC_WORD2 0x37
sakthipriya 3:0931a8800543 58 #define RF22_REG_38_SYNC_WORD1 0x38
sakthipriya 3:0931a8800543 59 #define RF22_REG_39_SYNC_WORD0 0x39
sakthipriya 3:0931a8800543 60 #define RF22_REG_3A_TRANSMIT_HEADER3 0x3a
sakthipriya 3:0931a8800543 61 #define RF22_REG_3B_TRANSMIT_HEADER2 0x3b
sakthipriya 3:0931a8800543 62 #define RF22_REG_3C_TRANSMIT_HEADER1 0x3c
sakthipriya 3:0931a8800543 63 #define RF22_REG_3D_TRANSMIT_HEADER0 0x3d
sakthipriya 3:0931a8800543 64 #define RF22_REG_3E_PACKET_LENGTH 0x3e
sakthipriya 3:0931a8800543 65 #define RF22_REG_3F_CHECK_HEADER3 0x3f
sakthipriya 3:0931a8800543 66 #define RF22_REG_40_CHECK_HEADER2 0x40
sakthipriya 3:0931a8800543 67 #define RF22_REG_41_CHECK_HEADER1 0x41
sakthipriya 3:0931a8800543 68 #define RF22_REG_42_CHECK_HEADER0 0x42
sakthipriya 3:0931a8800543 69 #define RF22_REG_43_HEADER_ENABLE3 0x43
sakthipriya 3:0931a8800543 70 #define RF22_REG_44_HEADER_ENABLE2 0x44
sakthipriya 3:0931a8800543 71 #define RF22_REG_45_HEADER_ENABLE1 0x45
sakthipriya 3:0931a8800543 72 #define RF22_REG_46_HEADER_ENABLE0 0x46
sakthipriya 3:0931a8800543 73 #define RF22_REG_47_RECEIVED_HEADER3 0x47
sakthipriya 3:0931a8800543 74 #define RF22_REG_48_RECEIVED_HEADER2 0x48
sakthipriya 3:0931a8800543 75 #define RF22_REG_49_RECEIVED_HEADER1 0x49
sakthipriya 3:0931a8800543 76 #define RF22_REG_4A_RECEIVED_HEADER0 0x4a
sakthipriya 3:0931a8800543 77 #define RF22_REG_4B_RECEIVED_PACKET_LENGTH 0x4b
sakthipriya 3:0931a8800543 78 #define RF22_REG_58 0x58
sakthipriya 3:0931a8800543 79 #define RF22_REG_60_CHANNEL_FILTER_COEFFICIENT_ADDRESS 0x60
sakthipriya 3:0931a8800543 80 #define RF22_REG_61_CHANNEL_FILTER_COEFFICIENT_VALUE 0x61
sakthipriya 3:0931a8800543 81 #define RF22_REG_62_CRYSTAL_OSCILLATOR_POR_CONTROL 0x62
sakthipriya 3:0931a8800543 82 #define RF22_REG_63_RC_OSCILLATOR_COARSE_CALIBRATION 0x63
sakthipriya 3:0931a8800543 83 #define RF22_REG_64_RC_OSCILLATOR_FINE_CALIBRATION 0x64
sakthipriya 3:0931a8800543 84 #define RF22_REG_65_LDO_CONTROL_OVERRIDE 0x65
sakthipriya 3:0931a8800543 85 #define RF22_REG_66_LDO_LEVEL_SETTINGS 0x66
sakthipriya 3:0931a8800543 86 #define RF22_REG_67_DELTA_SIGMA_ADC_TUNING1 0x67
sakthipriya 3:0931a8800543 87 #define RF22_REG_68_DELTA_SIGMA_ADC_TUNING2 0x68
sakthipriya 3:0931a8800543 88 #define RF22_REG_69_AGC_OVERRIDE1 0x69
sakthipriya 3:0931a8800543 89 #define RF22_REG_6A_AGC_OVERRIDE2 0x6a
sakthipriya 3:0931a8800543 90 #define RF22_REG_6B_GFSK_FIR_FILTER_COEFFICIENT_ADDRESS 0x6b
sakthipriya 3:0931a8800543 91 #define RF22_REG_6C_GFSK_FIR_FILTER_COEFFICIENT_VALUE 0x6c
sakthipriya 3:0931a8800543 92 #define RF22_REG_6D_TX_POWER 0x6d
sakthipriya 3:0931a8800543 93 #define RF22_REG_6E_TX_DATA_RATE1 0x6e
sakthipriya 3:0931a8800543 94 #define RF22_REG_6F_TX_DATA_RATE0 0x6f
sakthipriya 3:0931a8800543 95 #define RF22_REG_70_MODULATION_CONTROL1 0x70
sakthipriya 3:0931a8800543 96 #define RF22_REG_71_MODULATION_CONTROL2 0x71
sakthipriya 3:0931a8800543 97 #define RF22_REG_72_FREQUENCY_DEVIATION 0x72
sakthipriya 3:0931a8800543 98 #define RF22_REG_73_FREQUENCY_OFFSET1 0x73
sakthipriya 3:0931a8800543 99 #define RF22_REG_74_FREQUENCY_OFFSET2 0x74
sakthipriya 3:0931a8800543 100 #define RF22_REG_75_FREQUENCY_BAND_SELECT 0x75
sakthipriya 3:0931a8800543 101 #define RF22_REG_76_NOMINAL_CARRIER_FREQUENCY1 0x76
sakthipriya 3:0931a8800543 102 #define RF22_REG_77_NOMINAL_CARRIER_FREQUENCY0 0x77
sakthipriya 3:0931a8800543 103 #define RF22_REG_79_FREQUENCY_HOPPING_CHANNEL_SELECT 0x79
sakthipriya 3:0931a8800543 104 #define RF22_REG_7A_FREQUENCY_HOPPING_STEP_SIZE 0x7a
sakthipriya 3:0931a8800543 105 #define RF22_REG_7C_TX_FIFO_CONTROL1 0x7c
sakthipriya 3:0931a8800543 106 #define RF22_REG_7D_TX_FIFO_CONTROL2 0x7d
sakthipriya 3:0931a8800543 107 #define RF22_REG_7E_RX_FIFO_CONTROL 0x7e
sakthipriya 3:0931a8800543 108 #define RF22_REG_7F_FIFO_ACCESS 0x7f