sakthi priya amirtharaj / Mbed 2 deprecated pcb_bae_v2_0

acs beacon and hk integrated

Dependencies:   mbed-rtos mbed

beacon.cpp@0:1a04c0beef21, 2015-05-16 (annotated)

Committer:
sakthipriya
Date:
Sat May 16 07:07:56 2015 +0000
Revision:
0:1a04c0beef21
acs beacon and hk integrated

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sakthipriya 0:1a04c0beef21 1 //switch off the sync!!!!!!!
sakthipriya 0:1a04c0beef21 2 //switch off the preamble!!!!!!!
sakthipriya 0:1a04c0beef21 3 /*for crc in tx:
sakthipriya 0:1a04c0beef21 4 regIrq2(0x28) :
sakthipriya 0:1a04c0beef21 5
sakthipriya 0:1a04c0beef21 6 regpacketconfig 1(0x37) :
sakthipriya 0:1a04c0beef21 7 set crc detection/calc. on : | 0x10
sakthipriya 0:1a04c0beef21 8 crcautoclearoff : | 0x08
sakthipriya 0:1a04c0beef21 9
sakthipriya 0:1a04c0beef21 10 for data whitening : regpacketconfig 1(0x37) :| 0x40
sakthipriya 0:1a04c0beef21 11 for
sakthipriya 0:1a04c0beef21 12
sakthipriya 0:1a04c0beef21 13
sakthipriya 0:1a04c0beef21 14
sakthipriya 0:1a04c0beef21 15 */
sakthipriya 0:1a04c0beef21 16 // 6CC000 for 435 MHz
sakthipriya 0:1a04c0beef21 17 //set all values as FF for checking on spectrum analyzer
sakthipriya 0:1a04c0beef21 18 #include "beacon.h"
sakthipriya 0:1a04c0beef21 19 #include "HK.h"
sakthipriya 0:1a04c0beef21 20 #include "pin_config.h"
sakthipriya 0:1a04c0beef21 21 Serial chavan(USBTX, USBRX); // tx, rx
sakthipriya 0:1a04c0beef21 22 //SPI spi(PIN2,PIN1,PIN3); // mosi, miso, sclk
sakthipriya 0:1a04c0beef21 23 DigitalOut cs(PIN6); //slave select or chip select
sakthipriya 0:1a04c0beef21 24 //SPI spi(PTD6,PTD7,PTD5); // mosi, miso, sclk
sakthipriya 0:1a04c0beef21 25 SPI spi(PIN16,PIN17,PIN15);
sakthipriya 0:1a04c0beef21 26 //DigitalOut cs_bar(PTC11); //slave select or chip select
sakthipriya 0:1a04c0beef21 27 //InterruptIn button(p9);
sakthipriya 0:1a04c0beef21 28 //#define TIMES 16
sakthipriya 0:1a04c0beef21 29 //Timer t;
sakthipriya 0:1a04c0beef21 30
sakthipriya 0:1a04c0beef21 31 /*void interrupt_func()
sakthipriya 0:1a04c0beef21 32 {
sakthipriya 0:1a04c0beef21 33 chavan.printf("INTERRUPT_FUNC TRIGGERED\n wait for 3 secs\n");
sakthipriya 0:1a04c0beef21 34 wait(3);
sakthipriya 0:1a04c0beef21 35
sakthipriya 0:1a04c0beef21 36 }*/
sakthipriya 0:1a04c0beef21 37
sakthipriya 0:1a04c0beef21 38
sakthipriya 0:1a04c0beef21 39
sakthipriya 0:1a04c0beef21 40 extern ShortBeacy Shortbeacon;
sakthipriya 0:1a04c0beef21 41
sakthipriya 0:1a04c0beef21 42 void writereg(uint8_t reg,uint8_t val)
sakthipriya 0:1a04c0beef21 43 {
sakthipriya 0:1a04c0beef21 44 cs = 0;__disable_irq();spi.write(reg | 0x80);spi.write(val);__enable_irq();cs = 1;
sakthipriya 0:1a04c0beef21 45 }
sakthipriya 0:1a04c0beef21 46 uint8_t readreg(uint8_t reg)
sakthipriya 0:1a04c0beef21 47 {
sakthipriya 0:1a04c0beef21 48 int val;cs = 0;__disable_irq();spi.write(reg & ~0x80);val = spi.write(0);__enable_irq();cs = 1;return val;
sakthipriya 0:1a04c0beef21 49 }
sakthipriya 0:1a04c0beef21 50 void clearTxBuf()
sakthipriya 0:1a04c0beef21 51 {
sakthipriya 0:1a04c0beef21 52 writereg(RF22_REG_08_OPERATING_MODE2,0x01);
sakthipriya 0:1a04c0beef21 53 writereg(RF22_REG_08_OPERATING_MODE2,0x00);
sakthipriya 0:1a04c0beef21 54 }
sakthipriya 0:1a04c0beef21 55 void clearRxBuf()
sakthipriya 0:1a04c0beef21 56 {
sakthipriya 0:1a04c0beef21 57 writereg(RF22_REG_08_OPERATING_MODE2,0x02);
sakthipriya 0:1a04c0beef21 58 writereg(RF22_REG_08_OPERATING_MODE2,0x00);
sakthipriya 0:1a04c0beef21 59 }
sakthipriya 0:1a04c0beef21 60 int setFrequency(float centre,float afcPullInRange)
sakthipriya 0:1a04c0beef21 61 {
sakthipriya 0:1a04c0beef21 62 //freq setting begins
sakthipriya 0:1a04c0beef21 63 uint8_t fbsel = 0x40;
sakthipriya 0:1a04c0beef21 64 uint8_t afclimiter;
sakthipriya 0:1a04c0beef21 65 if (centre >= 480.0) {
sakthipriya 0:1a04c0beef21 66 centre /= 2;
sakthipriya 0:1a04c0beef21 67 fbsel |= 0x20;
sakthipriya 0:1a04c0beef21 68 afclimiter = afcPullInRange * 1000000.0 / 1250.0;
sakthipriya 0:1a04c0beef21 69 } else {
sakthipriya 0:1a04c0beef21 70 if (afcPullInRange < 0.0 || afcPullInRange > 0.159375)
sakthipriya 0:1a04c0beef21 71 return false;
sakthipriya 0:1a04c0beef21 72 afclimiter = afcPullInRange * 1000000.0 / 625.0;
sakthipriya 0:1a04c0beef21 73 }
sakthipriya 0:1a04c0beef21 74 centre /= 10.0;
sakthipriya 0:1a04c0beef21 75 float integerPart = floor(centre);
sakthipriya 0:1a04c0beef21 76 float fractionalPart = centre - integerPart;
sakthipriya 0:1a04c0beef21 77
sakthipriya 0:1a04c0beef21 78 uint8_t fb = (uint8_t)integerPart - 24; // Range 0 to 23
sakthipriya 0:1a04c0beef21 79 fbsel |= fb;
sakthipriya 0:1a04c0beef21 80 uint16_t fc = fractionalPart * 64000;
sakthipriya 0:1a04c0beef21 81 writereg(RF22_REG_73_FREQUENCY_OFFSET1, 0); // REVISIT
sakthipriya 0:1a04c0beef21 82 writereg(RF22_REG_74_FREQUENCY_OFFSET2, 0);
sakthipriya 0:1a04c0beef21 83 writereg(RF22_REG_75_FREQUENCY_BAND_SELECT, fbsel);
sakthipriya 0:1a04c0beef21 84 writereg(RF22_REG_76_NOMINAL_CARRIER_FREQUENCY1, fc >> 8);
sakthipriya 0:1a04c0beef21 85 writereg(RF22_REG_77_NOMINAL_CARRIER_FREQUENCY0, fc & 0xff);
sakthipriya 0:1a04c0beef21 86 writereg(RF22_REG_2A_AFC_LIMITER, afclimiter);
sakthipriya 0:1a04c0beef21 87 return 0;
sakthipriya 0:1a04c0beef21 88 }
sakthipriya 0:1a04c0beef21 89
sakthipriya 0:1a04c0beef21 90
sakthipriya 0:1a04c0beef21 91
sakthipriya 0:1a04c0beef21 92 void init_beacon()
sakthipriya 0:1a04c0beef21 93 {
sakthipriya 0:1a04c0beef21 94 //reset()
sakthipriya 0:1a04c0beef21 95 writereg(RF22_REG_07_OPERATING_MODE1,0x80); //sw_reset
sakthipriya 0:1a04c0beef21 96 wait(1); //takes time to reset
sakthipriya 0:1a04c0beef21 97
sakthipriya 0:1a04c0beef21 98 clearTxBuf();
sakthipriya 0:1a04c0beef21 99 clearRxBuf();
sakthipriya 0:1a04c0beef21 100 //txfifoalmostempty
sakthipriya 0:1a04c0beef21 101 writereg(RF22_REG_7D_TX_FIFO_CONTROL2,5);
sakthipriya 0:1a04c0beef21 102 //rxfifoalmostfull
sakthipriya 0:1a04c0beef21 103 writereg(RF22_REG_7E_RX_FIFO_CONTROL,20);
sakthipriya 0:1a04c0beef21 104 //Packet-engine registers
sakthipriya 0:1a04c0beef21 105 writereg(RF22_REG_30_DATA_ACCESS_CONTROL,0x8E); //RF22_REG_30_DATA_ACCESS_CONTROL, RF22_ENPACRX | RF22_ENPACTX | RF22_ENCRC | RF22_CRC_CRC_16_IBM
sakthipriya 0:1a04c0beef21 106 //&0x77 = diasable packet rx-tx handling
sakthipriya 0:1a04c0beef21 107 writereg(RF22_REG_32_HEADER_CONTROL1,0x88); //RF22_REG_32_HEADER_CONTROL1, RF22_BCEN_HEADER3 | RF22_HDCH_HEADER3
sakthipriya 0:1a04c0beef21 108 writereg(RF22_REG_33_HEADER_CONTROL2,0x42); //RF22_REG_33_HEADER_CONTROL2, RF22_HDLEN_4 | RF22_SYNCLEN_2
sakthipriya 0:1a04c0beef21 109 writereg(RF22_REG_34_PREAMBLE_LENGTH,8); //RF22_REG_34_PREAMBLE_LENGTH, nibbles); preamble length = 8;
sakthipriya 0:1a04c0beef21 110 writereg(RF22_REG_36_SYNC_WORD3,0x2D); //syncword3=2D
sakthipriya 0:1a04c0beef21 111 writereg(RF22_REG_37_SYNC_WORD2,0xD4); //syncword2=D4
sakthipriya 0:1a04c0beef21 112 writereg(RF22_REG_3F_CHECK_HEADER3,0); //RF22_REG_3F_CHECK_HEADER3, RF22_DEFAULT_NODE_ADDRESS
sakthipriya 0:1a04c0beef21 113 writereg(RF22_REG_3A_TRANSMIT_HEADER3,0xab); //header_to
sakthipriya 0:1a04c0beef21 114 writereg(RF22_REG_3B_TRANSMIT_HEADER2,0xbc); //header_from
sakthipriya 0:1a04c0beef21 115 writereg(RF22_REG_3C_TRANSMIT_HEADER1,0xcd); //header_ids
sakthipriya 0:1a04c0beef21 116 writereg(RF22_REG_3D_TRANSMIT_HEADER0,0xde); //header_flags
sakthipriya 0:1a04c0beef21 117 writereg(RF22_REG_3F_CHECK_HEADER3,0xab);
sakthipriya 0:1a04c0beef21 118 writereg(RF22_REG_40_CHECK_HEADER2,0xbc);
sakthipriya 0:1a04c0beef21 119 writereg(RF22_REG_41_CHECK_HEADER1,0xcd);
sakthipriya 0:1a04c0beef21 120 writereg(RF22_REG_42_CHECK_HEADER0,0xde);
sakthipriya 0:1a04c0beef21 121
sakthipriya 0:1a04c0beef21 122 //RSSI threshold for clear channel indicator
sakthipriya 0:1a04c0beef21 123 writereg(RF22_REG_27_RSSI_THRESHOLD,0xA5); //55 for -80dBm, 2D for -100dBm, 7D for -60dBm, A5 for -40dBm, CD for -20 dBm
sakthipriya 0:1a04c0beef21 124
sakthipriya 0:1a04c0beef21 125 writereg(RF22_REG_0B_GPIO_CONFIGURATION0,0x15); // TX state ??
sakthipriya 0:1a04c0beef21 126 writereg(RF22_REG_0C_GPIO_CONFIGURATION1,0x12); // RX state ??
sakthipriya 0:1a04c0beef21 127
sakthipriya 0:1a04c0beef21 128 //interrupts
sakthipriya 0:1a04c0beef21 129 // spiWrite(RF22_REG_05_INTERRUPT_ENABLE1, RF22_ENTXFFAEM |RF22_ENRXFFAFULL | RF22_ENPKSENT |RF22_ENPKVALID| RF22_ENCRCERROR);
sakthipriya 0:1a04c0beef21 130 // spiWrite(RF22_REG_06_INTERRUPT_ENABLE2, RF22_ENPREAVAL);
sakthipriya 0:1a04c0beef21 131
sakthipriya 0:1a04c0beef21 132 setFrequency(435.0, 0.05);
sakthipriya 0:1a04c0beef21 133
sakthipriya 0:1a04c0beef21 134 //return !(statusRead() & RF22_FREQERR);
sakthipriya 0:1a04c0beef21 135 if((readreg(RF22_REG_02_DEVICE_STATUS)& 0x08)!= 0x00)
sakthipriya 0:1a04c0beef21 136 printf("frequency not set properly\n");
sakthipriya 0:1a04c0beef21 137 //frequency set
sakthipriya 0:1a04c0beef21 138
sakthipriya 0:1a04c0beef21 139 //setModemConfig(FSK_Rb2_4Fd36); FSK_Rb2_4Fd36, ///< FSK, No Manchester, Rb = 2.4kbs, Fd = 36kHz
sakthipriya 0:1a04c0beef21 140 //setmodemregisters
sakthipriya 0:1a04c0beef21 141 //0x1b, 0x03, 0x41, 0x60, 0x27, 0x52, 0x00, 0x07, 0x40, 0x0a, 0x1e, 0x80, 0x60, 0x13, 0xa9, 0x2c, 0x22, 0x3a = FSK_RB2_4FD36
sakthipriya 0:1a04c0beef21 142 //0xc8, 0x03, 0x39, 0x20, 0x68, 0xdc, 0x00, 0x6b, 0x2a, 0x08, 0x2a, 0x80, 0x60, 0x13, 0xa9, 0x2c, 0x21, 0x08 = OOK,2.4, 335
sakthipriya 0:1a04c0beef21 143 writereg(RF22_REG_1C_IF_FILTER_BANDWIDTH,0x2B);
sakthipriya 0:1a04c0beef21 144 writereg(RF22_REG_1F_CLOCK_RECOVERY_GEARSHIFT_OVERRIDE,0x03);
sakthipriya 0:1a04c0beef21 145 writereg(RF22_REG_20_CLOCK_RECOVERY_OVERSAMPLING_RATE,0x41);
sakthipriya 0:1a04c0beef21 146 writereg(RF22_REG_21_CLOCK_RECOVERY_OFFSET2,0x60);
sakthipriya 0:1a04c0beef21 147 writereg(RF22_REG_22_CLOCK_RECOVERY_OFFSET1,0x27); //updated 20 to 25 reg values from excel sheet for 1.2 Khz freq. deviation,fsk
sakthipriya 0:1a04c0beef21 148 writereg(RF22_REG_23_CLOCK_RECOVERY_OFFSET0,0x52);
sakthipriya 0:1a04c0beef21 149 writereg(RF22_REG_24_CLOCK_RECOVERY_TIMING_LOOP_GAIN1,0x00);
sakthipriya 0:1a04c0beef21 150 writereg(RF22_REG_25_CLOCK_RECOVERY_TIMING_LOOP_GAIN0,0x51);
sakthipriya 0:1a04c0beef21 151 /*writereg(RF22_REG_2C_OOK_COUNTER_VALUE_1,0x2a);
sakthipriya 0:1a04c0beef21 152 writereg(RF22_REG_2D_OOK_COUNTER_VALUE_2,0x08);*/ //not required for fsk (OOK counter value)
sakthipriya 0:1a04c0beef21 153 writereg(RF22_REG_2E_SLICER_PEAK_HOLD,0x1e); //??
sakthipriya 0:1a04c0beef21 154 writereg(RF22_REG_58,0x80);
sakthipriya 0:1a04c0beef21 155 writereg(RF22_REG_69_AGC_OVERRIDE1,0x60);
sakthipriya 0:1a04c0beef21 156 writereg(RF22_REG_6E_TX_DATA_RATE1,0x09);
sakthipriya 0:1a04c0beef21 157 writereg(RF22_REG_6F_TX_DATA_RATE0,0xd5);
sakthipriya 0:1a04c0beef21 158 writereg(RF22_REG_70_MODULATION_CONTROL1,0x2c);
sakthipriya 0:1a04c0beef21 159 writereg(RF22_REG_71_MODULATION_CONTROL2,0x22);//ook = 0x21 //fsk = 0x22
sakthipriya 0:1a04c0beef21 160 writereg(RF22_REG_72_FREQUENCY_DEVIATION,0x02);
sakthipriya 0:1a04c0beef21 161 //set tx power
sakthipriya 0:1a04c0beef21 162 writereg(RF22_REG_6D_TX_POWER,0x07); //20dbm
sakthipriya 0:1a04c0beef21 163 writereg(RF22_REG_3E_PACKET_LENGTH,TX_DATA); //packet length
sakthipriya 0:1a04c0beef21 164 }
sakthipriya 0:1a04c0beef21 165
sakthipriya 0:1a04c0beef21 166 void FUNC_BEA()
sakthipriya 0:1a04c0beef21 167 {
sakthipriya 0:1a04c0beef21 168 init_beacon();
sakthipriya 0:1a04c0beef21 169 printf("\nBeacon function entered\n");
sakthipriya 0:1a04c0beef21 170 wait(1); // wait for POR to complete //change the timing later
sakthipriya 0:1a04c0beef21 171 cs=1; // chip must be deselected
sakthipriya 0:1a04c0beef21 172 wait(1); //change the time later
sakthipriya 0:1a04c0beef21 173 spi.format(8,0);
sakthipriya 0:1a04c0beef21 174 spi.frequency(10000000); //10MHz SCLK
sakthipriya 0:1a04c0beef21 175 if (readreg(RF22_REG_00_DEVICE_TYPE) == 0x08) printf("spi connection valid\n");
sakthipriya 0:1a04c0beef21 176 else printf("error in spi connection\n");
sakthipriya 0:1a04c0beef21 177
sakthipriya 0:1a04c0beef21 178
sakthipriya 0:1a04c0beef21 179
sakthipriya 0:1a04c0beef21 180 //********
sakthipriya 0:1a04c0beef21 181 //button.rise(&interrupt_func); //interrupt enabled ( rising edge of pin 9)
sakthipriya 0:1a04c0beef21 182 wait(0.02); // pl. update this value or even avoid it!!!
sakthipriya 0:1a04c0beef21 183 //extract values from short_beacon[]
sakthipriya 0:1a04c0beef21 184 uint8_t byte_counter = 0;
sakthipriya 0:1a04c0beef21 185 /*struct Short_beacon{
sakthipriya 0:1a04c0beef21 186 uint8_t Voltage[1];
sakthipriya 0:1a04c0beef21 187 uint8_t AngularSpeed[2];
sakthipriya 0:1a04c0beef21 188 uint8_t SubsystemStatus[1];
sakthipriya 0:1a04c0beef21 189 uint8_t Temp[3];
sakthipriya 0:1a04c0beef21 190 uint8_t ErrorFlag[1];
sakthipriya 0:1a04c0beef21 191 }Shortbeacon = { {0x88}, {0x99, 0xAA} , {0xAA},{0xAA,0xDD,0xEE}, {0x00} };
sakthipriya 0:1a04c0beef21 192 */
sakthipriya 0:1a04c0beef21 193 //filling hk data
sakthipriya 0:1a04c0beef21 194 uint8_t short_beacon[] = { 0xAB, 0x8A, 0xE2, 0xBB, 0xB8, 0xA2, 0x8E,Shortbeacon.Voltage[0],Shortbeacon.AngularSpeed[0], Shortbeacon.AngularSpeed[1],Shortbeacon.SubsystemStatus[0],Shortbeacon.Temp[0],Shortbeacon.Temp[1],Shortbeacon.Temp[2],Shortbeacon.ErrorFlag[0]};
sakthipriya 0:1a04c0beef21 195
sakthipriya 0:1a04c0beef21 196 for(int i = 0; i < 15 ; i++)
sakthipriya 0:1a04c0beef21 197 {
sakthipriya 0:1a04c0beef21 198 printf("0x%X\n",(short_beacon[i]));
sakthipriya 0:1a04c0beef21 199 }
sakthipriya 0:1a04c0beef21 200 //tx settings begin
sakthipriya 0:1a04c0beef21 201 //setModeIdle();
sakthipriya 0:1a04c0beef21 202 writereg(RF22_REG_07_OPERATING_MODE1,0x01); //ready mode
sakthipriya 0:1a04c0beef21 203 //fillTxBuf(data, len);
sakthipriya 0:1a04c0beef21 204 clearTxBuf();
sakthipriya 0:1a04c0beef21 205
sakthipriya 0:1a04c0beef21 206 //Set to Tx mode
sakthipriya 0:1a04c0beef21 207 writereg(RF22_REG_07_OPERATING_MODE1,0x09);
sakthipriya 0:1a04c0beef21 208
sakthipriya 0:1a04c0beef21 209 while(byte_counter!=15){
sakthipriya 0:1a04c0beef21 210 //Check for fifoThresh
sakthipriya 0:1a04c0beef21 211 while((readreg(RF22_REG_03_INTERRUPT_STATUS1) & 0x20) != 0x20);
sakthipriya 0:1a04c0beef21 212 //writing again
sakthipriya 0:1a04c0beef21 213 cs = 0;
sakthipriya 0:1a04c0beef21 214 spi.write(0xFF);
sakthipriya 0:1a04c0beef21 215 for(int i=7; i>=0 ;i--)
sakthipriya 0:1a04c0beef21 216 {
sakthipriya 0:1a04c0beef21 217 //pc.printf("%d\n",byte_counter);
sakthipriya 0:1a04c0beef21 218 if((short_beacon[byte_counter] & (uint8_t) pow(2.0,i))!=0)
sakthipriya 0:1a04c0beef21 219 {
sakthipriya 0:1a04c0beef21 220 spi.write(0xFF);
sakthipriya 0:1a04c0beef21 221 spi.write(0xFF);
sakthipriya 0:1a04c0beef21 222 }
sakthipriya 0:1a04c0beef21 223 else
sakthipriya 0:1a04c0beef21 224 {
sakthipriya 0:1a04c0beef21 225 spi.write(0x00);
sakthipriya 0:1a04c0beef21 226 spi.write(0x00);
sakthipriya 0:1a04c0beef21 227
sakthipriya 0:1a04c0beef21 228 }
sakthipriya 0:1a04c0beef21 229 }
sakthipriya 0:1a04c0beef21 230 cs = 1;
sakthipriya 0:1a04c0beef21 231 byte_counter++;
sakthipriya 0:1a04c0beef21 232
sakthipriya 0:1a04c0beef21 233 }
sakthipriya 0:1a04c0beef21 234 //rf22.waitPacketSent();
sakthipriya 0:1a04c0beef21 235 while((readreg(RF22_REG_03_INTERRUPT_STATUS1) & 0x04) != 0x04);//pc.printf(" chck pkt sent!\n");
sakthipriya 0:1a04c0beef21 236 printf("\nBeacon function exiting\n");
sakthipriya 0:1a04c0beef21 237
sakthipriya 0:1a04c0beef21 238 }