reset prob solved n cdms reforms the structure from hk data

Dependencies:   mbed-rtos mbed

Committer:
sakthipriya
Date:
Thu Dec 18 12:20:47 2014 +0000
Revision:
0:93514bd41116
reset prob solved n cdms reforms the structure from hk data

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sakthipriya 0:93514bd41116 1 //switch off the sync!!!!!!!
sakthipriya 0:93514bd41116 2 //switch off the preamble!!!!!!!
sakthipriya 0:93514bd41116 3 /*for crc in tx:
sakthipriya 0:93514bd41116 4 regIrq2(0x28) :
sakthipriya 0:93514bd41116 5
sakthipriya 0:93514bd41116 6 regpacketconfig 1(0x37) :
sakthipriya 0:93514bd41116 7 set crc detection/calc. on : | 0x10
sakthipriya 0:93514bd41116 8 crcautoclearoff : | 0x08
sakthipriya 0:93514bd41116 9
sakthipriya 0:93514bd41116 10 for data whitening : regpacketconfig 1(0x37) :| 0x40
sakthipriya 0:93514bd41116 11 for
sakthipriya 0:93514bd41116 12
sakthipriya 0:93514bd41116 13
sakthipriya 0:93514bd41116 14
sakthipriya 0:93514bd41116 15 */
sakthipriya 0:93514bd41116 16 // 6CC000 for 435 MHz
sakthipriya 0:93514bd41116 17 //set all values as FF for checking on spectrum analyzer
sakthipriya 0:93514bd41116 18 #include "beacon.h"
sakthipriya 0:93514bd41116 19 #include "HK.h"
sakthipriya 0:93514bd41116 20 Serial chavan(USBTX, USBRX); // tx, rx
sakthipriya 0:93514bd41116 21 SPI spi(PTD6,PTD7,PTD5); // mosi, miso, sclk
sakthipriya 0:93514bd41116 22 DigitalOut cs_bar(PTC11); //slave select or chip select
sakthipriya 0:93514bd41116 23 //InterruptIn button(p9);
sakthipriya 0:93514bd41116 24 //#define TIMES 16
sakthipriya 0:93514bd41116 25 //Timer t;
sakthipriya 0:93514bd41116 26
sakthipriya 0:93514bd41116 27 /*void interrupt_func()
sakthipriya 0:93514bd41116 28 {
sakthipriya 0:93514bd41116 29 chavan.printf("INTERRUPT_FUNC TRIGGERED\n wait for 3 secs\n");
sakthipriya 0:93514bd41116 30 wait(3);
sakthipriya 0:93514bd41116 31
sakthipriya 0:93514bd41116 32 }*/
sakthipriya 0:93514bd41116 33
sakthipriya 0:93514bd41116 34 extern ShortBeacy Shortbeacon;
sakthipriya 0:93514bd41116 35 void writereg(uint8_t reg,uint8_t val)
sakthipriya 0:93514bd41116 36 {
sakthipriya 0:93514bd41116 37 cs_bar = 0;
sakthipriya 0:93514bd41116 38 spi.write(reg | 0x80);
sakthipriya 0:93514bd41116 39 spi.write(val);
sakthipriya 0:93514bd41116 40 cs_bar = 1;
sakthipriya 0:93514bd41116 41 }
sakthipriya 0:93514bd41116 42 uint8_t readreg(uint8_t reg)
sakthipriya 0:93514bd41116 43 {
sakthipriya 0:93514bd41116 44 uint8_t val;
sakthipriya 0:93514bd41116 45 cs_bar = 0;
sakthipriya 0:93514bd41116 46 spi.write(reg & ~0x80);
sakthipriya 0:93514bd41116 47 val = spi.write(0);
sakthipriya 0:93514bd41116 48 cs_bar = 1;
sakthipriya 0:93514bd41116 49 return val;
sakthipriya 0:93514bd41116 50 }
sakthipriya 0:93514bd41116 51
sakthipriya 0:93514bd41116 52 void FUNC_BEA() {
sakthipriya 0:93514bd41116 53
sakthipriya 0:93514bd41116 54 //button.rise(&interrupt_func); //interrupt enabled ( rising edge of pin 9)
sakthipriya 0:93514bd41116 55 printf("\nBeacon function entered\n");
sakthipriya 0:93514bd41116 56 wait(0.02); //takes 10 ms for POR event + 10ms for safety
sakthipriya 0:93514bd41116 57
sakthipriya 0:93514bd41116 58 uint8_t byte_counter = 0;
sakthipriya 0:93514bd41116 59
sakthipriya 0:93514bd41116 60 /*struct Short_beacon{
sakthipriya 0:93514bd41116 61 uint8_t Voltage[1];
sakthipriya 0:93514bd41116 62 uint8_t AngularSpeed[2];
sakthipriya 0:93514bd41116 63 uint8_t SubsystemStatus[1];
sakthipriya 0:93514bd41116 64 uint8_t Temp[3];
sakthipriya 0:93514bd41116 65 uint8_t ErrorFlag[1];
sakthipriya 0:93514bd41116 66 }Shortbeacon = { {0x22}, {0x22, 0x33} , {0x00},{0x00,0x00,0x00}, {0xFE} };
sakthipriya 0:93514bd41116 67 */
sakthipriya 0:93514bd41116 68 //filling hk data
sakthipriya 0:93514bd41116 69 //ShortBeacon Shortbeacon;
sakthipriya 0:93514bd41116 70 uint8_t short_beacon[] = { 0xAB, 0x8A, 0xE2, 0xBB, 0xB8, 0xA2, 0x8E,Shortbeacon.Voltage[0],Shortbeacon.AngularSpeed[0], Shortbeacon.AngularSpeed[1],Shortbeacon.SubsystemStatus[0],Shortbeacon.Temp[0],Shortbeacon.Temp[1],Shortbeacon.Temp[2],Shortbeacon.ErrorFlag[0]};
sakthipriya 0:93514bd41116 71
sakthipriya 0:93514bd41116 72 //mask
sakthipriya 0:93514bd41116 73 //uint8_t mask[] = {0x80, 0x40, 0x20,0x10,0x8,0x4,0x2,0x1};
sakthipriya 0:93514bd41116 74
sakthipriya 0:93514bd41116 75 for(int i = 0; i < 15 ; i++)
sakthipriya 0:93514bd41116 76 {
sakthipriya 0:93514bd41116 77 chavan.printf("0x%X\n",(short_beacon[i]));
sakthipriya 0:93514bd41116 78 }
sakthipriya 0:93514bd41116 79
sakthipriya 0:93514bd41116 80 spi.format(8,0);
sakthipriya 0:93514bd41116 81 spi.frequency(10000000); //10MHz SCLK frequency(its max for rfm69hcw)
sakthipriya 0:93514bd41116 82 cs_bar = 1; // Chip must be deselected
sakthipriya 0:93514bd41116 83
sakthipriya 0:93514bd41116 84 //initialization
sakthipriya 0:93514bd41116 85 //Common configuration registers
sakthipriya 0:93514bd41116 86 writereg(0x01,0x04); //sequencer on,standby mode
sakthipriya 0:93514bd41116 87 writereg(0x02,0x08); //packet-mode used , ook modultion , no dc-shaping
sakthipriya 0:93514bd41116 88 writereg(0x03,0x68); //1200bps datarate
sakthipriya 0:93514bd41116 89 writereg(0x04,0x2B); //1200bps datarate
sakthipriya 0:93514bd41116 90 writereg(0x07,0x6C); //Frequency MSB
sakthipriya 0:93514bd41116 91 writereg(0x08,0xC0); //Frequency MID
sakthipriya 0:93514bd41116 92 writereg(0x09,0x00); //Frequency LSB ....6C C0 00 for 435 MHZ
sakthipriya 0:93514bd41116 93
sakthipriya 0:93514bd41116 94 //Transmitter registers
sakthipriya 0:93514bd41116 95 // RegPaLevel(default +13 dBm)
sakthipriya 0:93514bd41116 96
sakthipriya 0:93514bd41116 97 //IRQ and Pin Mapping Registers
sakthipriya 0:93514bd41116 98 //no DIO mapped yet
sakthipriya 0:93514bd41116 99 //regirq1(0x27): modeready (8th bit) will be checked for interrupts
sakthipriya 0:93514bd41116 100 //regIrq2(0x28): fifothresh (5th bit) ,packetsent(3rd bit) will be checked for interrupts
sakthipriya 0:93514bd41116 101
sakthipriya 0:93514bd41116 102 //Packet Engine Registers
sakthipriya 0:93514bd41116 103 writereg(0x2C,0x00); //set preamble
sakthipriya 0:93514bd41116 104 writereg(0x2D,0x0A); //set preamble
sakthipriya 0:93514bd41116 105 writereg(0x2E,0x80); //sync off
sakthipriya 0:93514bd41116 106 writereg(0x2F,0x5E); //sync word 1
sakthipriya 0:93514bd41116 107 writereg(0x37,0x08 | 0x40);// | 0x10); //packetconfig1, 0x40 for data whitening (only for testing)
sakthipriya 0:93514bd41116 108 writereg(0x38,0x00); //payload length = 0 ... unlimited payload mode
sakthipriya 0:93514bd41116 109 writereg(0x3C,0xB0); //fifothresh = 48 because we want it cleared once its 40!!!!
sakthipriya 0:93514bd41116 110 //Initialization complete
sakthipriya 0:93514bd41116 111
sakthipriya 0:93514bd41116 112 //while(chavan.getc() == 't'){
sakthipriya 0:93514bd41116 113 //t.start();
sakthipriya 0:93514bd41116 114 //Filling Data into FIFO 64 BYTES : eff.32 bits = 4bytes //fread
sakthipriya 0:93514bd41116 115 cs_bar = 0;
sakthipriya 0:93514bd41116 116 spi.write(0x80);//fifo write access
sakthipriya 0:93514bd41116 117 for(byte_counter=0 ; byte_counter<4; byte_counter++)
sakthipriya 0:93514bd41116 118 {
sakthipriya 0:93514bd41116 119 for(int i=7; i>=0 ; i--)
sakthipriya 0:93514bd41116 120 {
sakthipriya 0:93514bd41116 121 if((short_beacon[byte_counter] & (uint8_t) pow(2.0,i))!=0)
sakthipriya 0:93514bd41116 122 //if((short_beacon[byte_counter] & mask[i]) != 0)
sakthipriya 0:93514bd41116 123 {
sakthipriya 0:93514bd41116 124 spi.write(0xFF);
sakthipriya 0:93514bd41116 125 spi.write(0xFF);
sakthipriya 0:93514bd41116 126 }
sakthipriya 0:93514bd41116 127 else
sakthipriya 0:93514bd41116 128 {
sakthipriya 0:93514bd41116 129 spi.write(0x00);
sakthipriya 0:93514bd41116 130 spi.write(0x00);
sakthipriya 0:93514bd41116 131 }
sakthipriya 0:93514bd41116 132 }
sakthipriya 0:93514bd41116 133 }
sakthipriya 0:93514bd41116 134 cs_bar = 1; //cs_bar
sakthipriya 0:93514bd41116 135
sakthipriya 0:93514bd41116 136 //Check for fifoThresh
sakthipriya 0:93514bd41116 137 printf("\nfor loop executed\n");
sakthipriya 0:93514bd41116 138 while((readreg(0x28) & 0x20) != 0x20);
sakthipriya 0:93514bd41116 139 printf("\nwhile loop executed\n");
sakthipriya 0:93514bd41116 140 //Highpower settings
sakthipriya 0:93514bd41116 141 writereg(0x11,0x7F); //RegPalevel (20db) //~
sakthipriya 0:93514bd41116 142 writereg(0x13,0x0F); //RegOCP
sakthipriya 0:93514bd41116 143 writereg(0x5A,0x5D); //RegTestPa1
sakthipriya 0:93514bd41116 144 writereg(0x5C,0x7C); //RegTestPa2
sakthipriya 0:93514bd41116 145
sakthipriya 0:93514bd41116 146 //Set to Tx mode
sakthipriya 0:93514bd41116 147 writereg(0x01,0x0C);
sakthipriya 0:93514bd41116 148
sakthipriya 0:93514bd41116 149 printf("\npre 2nd while loop\n");
sakthipriya 0:93514bd41116 150 //Check for fifoThresh
sakthipriya 0:93514bd41116 151 while((readreg(0x28) & 0x20) != 0x00);
sakthipriya 0:93514bd41116 152 printf("\n2nd while loop executed\n");
sakthipriya 0:93514bd41116 153 while(byte_counter!=15){
sakthipriya 0:93514bd41116 154
sakthipriya 0:93514bd41116 155 //writing again
sakthipriya 0:93514bd41116 156 cs_bar = 0;
sakthipriya 0:93514bd41116 157 spi.write(0x80);
sakthipriya 0:93514bd41116 158 for(int i=7; i>=0 ;i--)
sakthipriya 0:93514bd41116 159 {
sakthipriya 0:93514bd41116 160 if((short_beacon[byte_counter] & (uint8_t) pow(2.0,i))!=0)
sakthipriya 0:93514bd41116 161 //if((short_beacon[byte_counter] & mask[i]) != 0)
sakthipriya 0:93514bd41116 162 {
sakthipriya 0:93514bd41116 163 spi.write(0xFF);
sakthipriya 0:93514bd41116 164 spi.write(0xFF);
sakthipriya 0:93514bd41116 165 }
sakthipriya 0:93514bd41116 166 else
sakthipriya 0:93514bd41116 167 {
sakthipriya 0:93514bd41116 168 spi.write(0x00);
sakthipriya 0:93514bd41116 169 spi.write(0x00);
sakthipriya 0:93514bd41116 170 }
sakthipriya 0:93514bd41116 171 }
sakthipriya 0:93514bd41116 172 cs_bar = 1;
sakthipriya 0:93514bd41116 173 byte_counter++;
sakthipriya 0:93514bd41116 174
sakthipriya 0:93514bd41116 175 //Check for fifoThresh
sakthipriya 0:93514bd41116 176 while((readreg(0x28) & 0x20) != 0x00);
sakthipriya 0:93514bd41116 177 }
sakthipriya 0:93514bd41116 178 printf("\n3rd big while loop executed\n");
sakthipriya 0:93514bd41116 179 //wait for packet sent bit to fire
sakthipriya 0:93514bd41116 180 while((readreg(0x28) & 0x08) != 0x08);
sakthipriya 0:93514bd41116 181 printf("\n4th while loop executed\n");
sakthipriya 0:93514bd41116 182 //chavan.printf("packet sent!!! \n");
sakthipriya 0:93514bd41116 183
sakthipriya 0:93514bd41116 184 //Switch back to Standby Mode
sakthipriya 0:93514bd41116 185 writereg(0x01,0x04);
sakthipriya 0:93514bd41116 186
sakthipriya 0:93514bd41116 187 //Lowpowermode
sakthipriya 0:93514bd41116 188 writereg(0x11,0x9F); //RegPalevel (13db)
sakthipriya 0:93514bd41116 189 writereg(0x13,0x1A); //RegOCP
sakthipriya 0:93514bd41116 190 writereg(0x5A,0x55); //RegTestPa1(setting PA_BOOST on RFIO)
sakthipriya 0:93514bd41116 191 writereg(0x5C,0x70); //RegTestPa2(setting PA_BOOST on RFIO)
sakthipriya 0:93514bd41116 192
sakthipriya 0:93514bd41116 193 //wait for modeready
sakthipriya 0:93514bd41116 194 while((readreg(0x27)&0x80)!=0x80);
sakthipriya 0:93514bd41116 195
sakthipriya 0:93514bd41116 196 //t.stop();
sakthipriya 0:93514bd41116 197 //chavan.printf(" time taken to init + transmit = %f \n", t.read()) ;
sakthipriya 0:93514bd41116 198 //}
sakthipriya 0:93514bd41116 199 printf("\nBeacon function exiting\n");
sakthipriya 0:93514bd41116 200 }