sakthi priya amirtharaj / Mbed 2 deprecated BAE_acsbeahk

acs bea hk together

Dependencies:   mbed-rtos mbed

Fork of BAE_vr3honeycomb1_christmas by green rosh

beacon.cpp@0:ebdf4f859dca, 2014-12-19 (annotated)

Committer:
raizel_varun
Date:
Fri Dec 19 06:47:25 2014 +0000
Revision:
0:ebdf4f859dca
hhh

Who changed what in which revision?

UserRevisionLine numberNew contents of line
raizel_varun 0:ebdf4f859dca 1 //switch off the sync!!!!!!!
raizel_varun 0:ebdf4f859dca 2 //switch off the preamble!!!!!!!
raizel_varun 0:ebdf4f859dca 3 /*for crc in tx:
raizel_varun 0:ebdf4f859dca 4 regIrq2(0x28) :
raizel_varun 0:ebdf4f859dca 5
raizel_varun 0:ebdf4f859dca 6 regpacketconfig 1(0x37) :
raizel_varun 0:ebdf4f859dca 7 set crc detection/calc. on : | 0x10
raizel_varun 0:ebdf4f859dca 8 crcautoclearoff : | 0x08
raizel_varun 0:ebdf4f859dca 9
raizel_varun 0:ebdf4f859dca 10 for data whitening : regpacketconfig 1(0x37) :| 0x40
raizel_varun 0:ebdf4f859dca 11 for
raizel_varun 0:ebdf4f859dca 12
raizel_varun 0:ebdf4f859dca 13
raizel_varun 0:ebdf4f859dca 14
raizel_varun 0:ebdf4f859dca 15 */
raizel_varun 0:ebdf4f859dca 16 // 6CC000 for 435 MHz
raizel_varun 0:ebdf4f859dca 17 //set all values as FF for checking on spectrum analyzer
raizel_varun 0:ebdf4f859dca 18 #include "beacon.h"
raizel_varun 0:ebdf4f859dca 19 #include "HK.h"
raizel_varun 0:ebdf4f859dca 20 Serial chavan(USBTX, USBRX); // tx, rx
raizel_varun 0:ebdf4f859dca 21 SPI spi(PTD6,PTD7,PTD5); // mosi, miso, sclk
raizel_varun 0:ebdf4f859dca 22 DigitalOut cs_bar(PTC11); //slave select or chip select
raizel_varun 0:ebdf4f859dca 23 //InterruptIn button(p9);
raizel_varun 0:ebdf4f859dca 24 //#define TIMES 16
raizel_varun 0:ebdf4f859dca 25 //Timer t;
raizel_varun 0:ebdf4f859dca 26
raizel_varun 0:ebdf4f859dca 27 /*void interrupt_func()
raizel_varun 0:ebdf4f859dca 28 {
raizel_varun 0:ebdf4f859dca 29 chavan.printf("INTERRUPT_FUNC TRIGGERED\n wait for 3 secs\n");
raizel_varun 0:ebdf4f859dca 30 wait(3);
raizel_varun 0:ebdf4f859dca 31
raizel_varun 0:ebdf4f859dca 32 }*/
raizel_varun 0:ebdf4f859dca 33
raizel_varun 0:ebdf4f859dca 34 extern ShortBeacy Shortbeacon;
raizel_varun 0:ebdf4f859dca 35 void writereg(uint8_t reg,uint8_t val)
raizel_varun 0:ebdf4f859dca 36 {
raizel_varun 0:ebdf4f859dca 37 cs_bar = 0;
raizel_varun 0:ebdf4f859dca 38 spi.write(reg | 0x80);
raizel_varun 0:ebdf4f859dca 39 spi.write(val);
raizel_varun 0:ebdf4f859dca 40 cs_bar = 1;
raizel_varun 0:ebdf4f859dca 41 }
raizel_varun 0:ebdf4f859dca 42 uint8_t readreg(uint8_t reg)
raizel_varun 0:ebdf4f859dca 43 {
raizel_varun 0:ebdf4f859dca 44 uint8_t val;
raizel_varun 0:ebdf4f859dca 45 cs_bar = 0;
raizel_varun 0:ebdf4f859dca 46 spi.write(reg & ~0x80);
raizel_varun 0:ebdf4f859dca 47 val = spi.write(0);
raizel_varun 0:ebdf4f859dca 48 cs_bar = 1;
raizel_varun 0:ebdf4f859dca 49 return val;
raizel_varun 0:ebdf4f859dca 50 }
raizel_varun 0:ebdf4f859dca 51
raizel_varun 0:ebdf4f859dca 52 void FUNC_BEA() {
raizel_varun 0:ebdf4f859dca 53
raizel_varun 0:ebdf4f859dca 54 //button.rise(&interrupt_func); //interrupt enabled ( rising edge of pin 9)
raizel_varun 0:ebdf4f859dca 55 printf("\nBeacon function entered\n");
raizel_varun 0:ebdf4f859dca 56 wait(0.02); //takes 10 ms for POR event + 10ms for safety
raizel_varun 0:ebdf4f859dca 57
raizel_varun 0:ebdf4f859dca 58 uint8_t byte_counter = 0;
raizel_varun 0:ebdf4f859dca 59
raizel_varun 0:ebdf4f859dca 60 /*struct Short_beacon{
raizel_varun 0:ebdf4f859dca 61 uint8_t Voltage[1];
raizel_varun 0:ebdf4f859dca 62 uint8_t AngularSpeed[2];
raizel_varun 0:ebdf4f859dca 63 uint8_t SubsystemStatus[1];
raizel_varun 0:ebdf4f859dca 64 uint8_t Temp[3];
raizel_varun 0:ebdf4f859dca 65 uint8_t ErrorFlag[1];
raizel_varun 0:ebdf4f859dca 66 }Shortbeacon = { {0x22}, {0x22, 0x33} , {0x00},{0x00,0x00,0x00}, {0xFE} };
raizel_varun 0:ebdf4f859dca 67 */
raizel_varun 0:ebdf4f859dca 68 //filling hk data
raizel_varun 0:ebdf4f859dca 69 //ShortBeacon Shortbeacon;
raizel_varun 0:ebdf4f859dca 70 uint8_t short_beacon[] = { 0xAB, 0x8A, 0xE2, 0xBB, 0xB8, 0xA2, 0x8E,Shortbeacon.Voltage[0],Shortbeacon.AngularSpeed[0], Shortbeacon.AngularSpeed[1],Shortbeacon.SubsystemStatus[0],Shortbeacon.Temp[0],Shortbeacon.Temp[1],Shortbeacon.Temp[2],Shortbeacon.ErrorFlag[0]};
raizel_varun 0:ebdf4f859dca 71
raizel_varun 0:ebdf4f859dca 72 //mask
raizel_varun 0:ebdf4f859dca 73 //uint8_t mask[] = {0x80, 0x40, 0x20,0x10,0x8,0x4,0x2,0x1};
raizel_varun 0:ebdf4f859dca 74
raizel_varun 0:ebdf4f859dca 75 for(int i = 0; i < 15 ; i++)
raizel_varun 0:ebdf4f859dca 76 {
raizel_varun 0:ebdf4f859dca 77 chavan.printf("0x%X\n",(short_beacon[i]));
raizel_varun 0:ebdf4f859dca 78 }
raizel_varun 0:ebdf4f859dca 79
raizel_varun 0:ebdf4f859dca 80 spi.format(8,0);
raizel_varun 0:ebdf4f859dca 81 spi.frequency(10000000); //10MHz SCLK frequency(its max for rfm69hcw)
raizel_varun 0:ebdf4f859dca 82 cs_bar = 1; // Chip must be deselected
raizel_varun 0:ebdf4f859dca 83
raizel_varun 0:ebdf4f859dca 84 //initialization
raizel_varun 0:ebdf4f859dca 85 //Common configuration registers
raizel_varun 0:ebdf4f859dca 86 writereg(0x01,0x04); //sequencer on,standby mode
raizel_varun 0:ebdf4f859dca 87 writereg(0x02,0x08); //packet-mode used , ook modultion , no dc-shaping
raizel_varun 0:ebdf4f859dca 88 writereg(0x03,0x68); //1200bps datarate
raizel_varun 0:ebdf4f859dca 89 writereg(0x04,0x2B); //1200bps datarate
raizel_varun 0:ebdf4f859dca 90 writereg(0x07,0x6C); //Frequency MSB
raizel_varun 0:ebdf4f859dca 91 writereg(0x08,0xC0); //Frequency MID
raizel_varun 0:ebdf4f859dca 92 writereg(0x09,0x00); //Frequency LSB ....6C C0 00 for 435 MHZ
raizel_varun 0:ebdf4f859dca 93
raizel_varun 0:ebdf4f859dca 94 //Transmitter registers
raizel_varun 0:ebdf4f859dca 95 // RegPaLevel(default +13 dBm)
raizel_varun 0:ebdf4f859dca 96
raizel_varun 0:ebdf4f859dca 97 //IRQ and Pin Mapping Registers
raizel_varun 0:ebdf4f859dca 98 //no DIO mapped yet
raizel_varun 0:ebdf4f859dca 99 //regirq1(0x27): modeready (8th bit) will be checked for interrupts
raizel_varun 0:ebdf4f859dca 100 //regIrq2(0x28): fifothresh (5th bit) ,packetsent(3rd bit) will be checked for interrupts
raizel_varun 0:ebdf4f859dca 101
raizel_varun 0:ebdf4f859dca 102 //Packet Engine Registers
raizel_varun 0:ebdf4f859dca 103 writereg(0x2C,0x00); //set preamble
raizel_varun 0:ebdf4f859dca 104 writereg(0x2D,0x0A); //set preamble
raizel_varun 0:ebdf4f859dca 105 writereg(0x2E,0x80); //sync off
raizel_varun 0:ebdf4f859dca 106 writereg(0x2F,0x5E); //sync word 1
raizel_varun 0:ebdf4f859dca 107 writereg(0x37,0x08 | 0x40);// | 0x10); //packetconfig1, 0x40 for data whitening (only for testing)
raizel_varun 0:ebdf4f859dca 108 writereg(0x38,0x00); //payload length = 0 ... unlimited payload mode
raizel_varun 0:ebdf4f859dca 109 writereg(0x3C,0xB0); //fifothresh = 48 because we want it cleared once its 40!!!!
raizel_varun 0:ebdf4f859dca 110 //Initialization complete
raizel_varun 0:ebdf4f859dca 111
raizel_varun 0:ebdf4f859dca 112 //while(chavan.getc() == 't'){
raizel_varun 0:ebdf4f859dca 113 //t.start();
raizel_varun 0:ebdf4f859dca 114 //Filling Data into FIFO 64 BYTES : eff.32 bits = 4bytes //fread
raizel_varun 0:ebdf4f859dca 115 cs_bar = 0;
raizel_varun 0:ebdf4f859dca 116 spi.write(0x80);//fifo write access
raizel_varun 0:ebdf4f859dca 117 for(byte_counter=0 ; byte_counter<4; byte_counter++)
raizel_varun 0:ebdf4f859dca 118 {
raizel_varun 0:ebdf4f859dca 119 for(int i=7; i>=0 ; i--)
raizel_varun 0:ebdf4f859dca 120 {
raizel_varun 0:ebdf4f859dca 121 if((short_beacon[byte_counter] & (uint8_t) pow(2.0,i))!=0)
raizel_varun 0:ebdf4f859dca 122 //if((short_beacon[byte_counter] & mask[i]) != 0)
raizel_varun 0:ebdf4f859dca 123 {
raizel_varun 0:ebdf4f859dca 124 spi.write(0xFF);
raizel_varun 0:ebdf4f859dca 125 spi.write(0xFF);
raizel_varun 0:ebdf4f859dca 126 }
raizel_varun 0:ebdf4f859dca 127 else
raizel_varun 0:ebdf4f859dca 128 {
raizel_varun 0:ebdf4f859dca 129 spi.write(0x00);
raizel_varun 0:ebdf4f859dca 130 spi.write(0x00);
raizel_varun 0:ebdf4f859dca 131 }
raizel_varun 0:ebdf4f859dca 132 }
raizel_varun 0:ebdf4f859dca 133 }
raizel_varun 0:ebdf4f859dca 134 cs_bar = 1; //cs_bar
raizel_varun 0:ebdf4f859dca 135
raizel_varun 0:ebdf4f859dca 136 //Check for fifoThresh
raizel_varun 0:ebdf4f859dca 137 printf("\nfor loop executed\n");
raizel_varun 0:ebdf4f859dca 138 while((readreg(0x28) & 0x20) != 0x20);
raizel_varun 0:ebdf4f859dca 139 printf("\nwhile loop executed\n");
raizel_varun 0:ebdf4f859dca 140 //Highpower settings
raizel_varun 0:ebdf4f859dca 141 writereg(0x11,0x7F); //RegPalevel (20db) //~
raizel_varun 0:ebdf4f859dca 142 writereg(0x13,0x0F); //RegOCP
raizel_varun 0:ebdf4f859dca 143 writereg(0x5A,0x5D); //RegTestPa1
raizel_varun 0:ebdf4f859dca 144 writereg(0x5C,0x7C); //RegTestPa2
raizel_varun 0:ebdf4f859dca 145
raizel_varun 0:ebdf4f859dca 146 //Set to Tx mode
raizel_varun 0:ebdf4f859dca 147 writereg(0x01,0x0C);
raizel_varun 0:ebdf4f859dca 148
raizel_varun 0:ebdf4f859dca 149 printf("\npre 2nd while loop\n");
raizel_varun 0:ebdf4f859dca 150 //Check for fifoThresh
raizel_varun 0:ebdf4f859dca 151 while((readreg(0x28) & 0x20) != 0x00);
raizel_varun 0:ebdf4f859dca 152 printf("\n2nd while loop executed\n");
raizel_varun 0:ebdf4f859dca 153 while(byte_counter!=15){
raizel_varun 0:ebdf4f859dca 154
raizel_varun 0:ebdf4f859dca 155 //writing again
raizel_varun 0:ebdf4f859dca 156 cs_bar = 0;
raizel_varun 0:ebdf4f859dca 157 spi.write(0x80);
raizel_varun 0:ebdf4f859dca 158 for(int i=7; i>=0 ;i--)
raizel_varun 0:ebdf4f859dca 159 {
raizel_varun 0:ebdf4f859dca 160 if((short_beacon[byte_counter] & (uint8_t) pow(2.0,i))!=0)
raizel_varun 0:ebdf4f859dca 161 //if((short_beacon[byte_counter] & mask[i]) != 0)
raizel_varun 0:ebdf4f859dca 162 {
raizel_varun 0:ebdf4f859dca 163 spi.write(0xFF);
raizel_varun 0:ebdf4f859dca 164 spi.write(0xFF);
raizel_varun 0:ebdf4f859dca 165 }
raizel_varun 0:ebdf4f859dca 166 else
raizel_varun 0:ebdf4f859dca 167 {
raizel_varun 0:ebdf4f859dca 168 spi.write(0x00);
raizel_varun 0:ebdf4f859dca 169 spi.write(0x00);
raizel_varun 0:ebdf4f859dca 170 }
raizel_varun 0:ebdf4f859dca 171 }
raizel_varun 0:ebdf4f859dca 172 cs_bar = 1;
raizel_varun 0:ebdf4f859dca 173 byte_counter++;
raizel_varun 0:ebdf4f859dca 174
raizel_varun 0:ebdf4f859dca 175 //Check for fifoThresh
raizel_varun 0:ebdf4f859dca 176 while((readreg(0x28) & 0x20) != 0x00);
raizel_varun 0:ebdf4f859dca 177 }
raizel_varun 0:ebdf4f859dca 178 printf("\n3rd big while loop executed\n");
raizel_varun 0:ebdf4f859dca 179 //wait for packet sent bit to fire
raizel_varun 0:ebdf4f859dca 180 while((readreg(0x28) & 0x08) != 0x08);
raizel_varun 0:ebdf4f859dca 181 printf("\n4th while loop executed\n");
raizel_varun 0:ebdf4f859dca 182 //chavan.printf("packet sent!!! \n");
raizel_varun 0:ebdf4f859dca 183
raizel_varun 0:ebdf4f859dca 184 //Switch back to Standby Mode
raizel_varun 0:ebdf4f859dca 185 writereg(0x01,0x04);
raizel_varun 0:ebdf4f859dca 186
raizel_varun 0:ebdf4f859dca 187 //Lowpowermode
raizel_varun 0:ebdf4f859dca 188 writereg(0x11,0x9F); //RegPalevel (13db)
raizel_varun 0:ebdf4f859dca 189 writereg(0x13,0x1A); //RegOCP
raizel_varun 0:ebdf4f859dca 190 writereg(0x5A,0x55); //RegTestPa1(setting PA_BOOST on RFIO)
raizel_varun 0:ebdf4f859dca 191 writereg(0x5C,0x70); //RegTestPa2(setting PA_BOOST on RFIO)
raizel_varun 0:ebdf4f859dca 192
raizel_varun 0:ebdf4f859dca 193 //wait for modeready
raizel_varun 0:ebdf4f859dca 194 while((readreg(0x27)&0x80)!=0x80);
raizel_varun 0:ebdf4f859dca 195
raizel_varun 0:ebdf4f859dca 196 //t.stop();
raizel_varun 0:ebdf4f859dca 197 //chavan.printf(" time taken to init + transmit = %f \n", t.read()) ;
raizel_varun 0:ebdf4f859dca 198 //}
raizel_varun 0:ebdf4f859dca 199 printf("\nBeacon function exiting\n");
raizel_varun 0:ebdf4f859dca 200 }