sakthi priya amirtharaj
/
BAE_NEW_VR_0_0
not workin
Fork of BAE_FRDM_INTEGRATION by
MPU3300.h@9:6bcc165ee457, 2014-12-16 (annotated)
- Committer:
- sakthipriya
- Date:
- Tue Dec 16 11:37:09 2014 +0000
- Revision:
- 9:6bcc165ee457
- Parent:
- 8:667fbc82d634
i2c not workin new integ.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
greenroshks | 8:667fbc82d634 | 1 | //MPU 3300 registers |
greenroshks | 8:667fbc82d634 | 2 | #define SMPLRT_DIV 0x19 |
greenroshks | 8:667fbc82d634 | 3 | #define CONFIG 0x1A |
greenroshks | 8:667fbc82d634 | 4 | #define GYRO_CONFIG 0x1B |
greenroshks | 8:667fbc82d634 | 5 | #define GYRO_XOUT_H 0x43 |
greenroshks | 8:667fbc82d634 | 6 | #define GYRO_XOUT_L 0x44 |
greenroshks | 8:667fbc82d634 | 7 | #define GYRO_YOUT_H 0x45 |
greenroshks | 8:667fbc82d634 | 8 | #define GYRO_YOUT_L 0x46 |
greenroshks | 8:667fbc82d634 | 9 | #define GYRO_ZOUT_H 0x47 |
greenroshks | 8:667fbc82d634 | 10 | #define GYRO_ZOUT_L 0x48 |
greenroshks | 8:667fbc82d634 | 11 | #define USER_CTRL 0x6A |
greenroshks | 8:667fbc82d634 | 12 | #define PWR_MGMT_1 0x6B |
greenroshks | 8:667fbc82d634 | 13 | #define INT_ENABLE 0x38 |
greenroshks | 8:667fbc82d634 | 14 | |
greenroshks | 8:667fbc82d634 | 15 | //MPU configuration bits |
greenroshks | 8:667fbc82d634 | 16 | #define READFLAG 0x80 |
greenroshks | 8:667fbc82d634 | 17 | #define DUMMYBIT 0x00 |
greenroshks | 8:667fbc82d634 | 18 | #define BITS_DLPF_CFG 0x07 |
greenroshks | 8:667fbc82d634 | 19 | #define BITS_FS_SEL_3 0x08 |
greenroshks | 8:667fbc82d634 | 20 | #define BITS_FS_SEL_4 0x10 |
greenroshks | 8:667fbc82d634 | 21 | #define BIT_I2C_IF_DIS 0x10 |
greenroshks | 8:667fbc82d634 | 22 | #define BITS_SMPLRT_DIV 0x00 |
greenroshks | 8:667fbc82d634 | 23 | #define BIT_SLEEP 0x40 |
greenroshks | 8:667fbc82d634 | 24 | #define BIT_DATA_RDY_ENABLE 0x01 |
greenroshks | 8:667fbc82d634 | 25 | #define BIT_DATA_RDY_INT 0x01 |
greenroshks | 8:667fbc82d634 | 26 | #define BIT_CLKSEL_X 0x01 |