Руслан Бредун / Mbed 2 deprecated stm32-sensor-base2

test

Dependencies:   mbed Watchdog

Dependents:   STM32-MC_node

mbed/spi_api.h@0:d383e2dee0f7, 2020-07-06 (annotated)

Committer:
ommpy
Date:
Mon Jul 06 17:18:59 2020 +0530
Revision:
0:d383e2dee0f7
first commit

Who changed what in which revision?

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ommpy 0:d383e2dee0f7 1 /* mbed Microcontroller Library
ommpy 0:d383e2dee0f7 2 * Copyright (c) 2006-2013 ARM Limited
ommpy 0:d383e2dee0f7 3 *
ommpy 0:d383e2dee0f7 4 * Licensed under the Apache License, Version 2.0 (the "License");
ommpy 0:d383e2dee0f7 5 * you may not use this file except in compliance with the License.
ommpy 0:d383e2dee0f7 6 * You may obtain a copy of the License at
ommpy 0:d383e2dee0f7 7 *
ommpy 0:d383e2dee0f7 8 * http://www.apache.org/licenses/LICENSE-2.0
ommpy 0:d383e2dee0f7 9 *
ommpy 0:d383e2dee0f7 10 * Unless required by applicable law or agreed to in writing, software
ommpy 0:d383e2dee0f7 11 * distributed under the License is distributed on an "AS IS" BASIS,
ommpy 0:d383e2dee0f7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
ommpy 0:d383e2dee0f7 13 * See the License for the specific language governing permissions and
ommpy 0:d383e2dee0f7 14 * limitations under the License.
ommpy 0:d383e2dee0f7 15 */
ommpy 0:d383e2dee0f7 16 #ifndef MBED_SPI_API_H
ommpy 0:d383e2dee0f7 17 #define MBED_SPI_API_H
ommpy 0:d383e2dee0f7 18
ommpy 0:d383e2dee0f7 19 #include "device.h"
ommpy 0:d383e2dee0f7 20 #include "dma_api.h"
ommpy 0:d383e2dee0f7 21 #include "buffer.h"
ommpy 0:d383e2dee0f7 22
ommpy 0:d383e2dee0f7 23 #if DEVICE_SPI
ommpy 0:d383e2dee0f7 24
ommpy 0:d383e2dee0f7 25 #define SPI_EVENT_ERROR (1 << 1)
ommpy 0:d383e2dee0f7 26 #define SPI_EVENT_COMPLETE (1 << 2)
ommpy 0:d383e2dee0f7 27 #define SPI_EVENT_RX_OVERFLOW (1 << 3)
ommpy 0:d383e2dee0f7 28 #define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
ommpy 0:d383e2dee0f7 29
ommpy 0:d383e2dee0f7 30 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // internal flag to report an event occurred
ommpy 0:d383e2dee0f7 31
ommpy 0:d383e2dee0f7 32 #define SPI_FILL_WORD (0xFFFF)
ommpy 0:d383e2dee0f7 33
ommpy 0:d383e2dee0f7 34 #if DEVICE_SPI_ASYNCH
ommpy 0:d383e2dee0f7 35 /** Asynch spi hal structure
ommpy 0:d383e2dee0f7 36 */
ommpy 0:d383e2dee0f7 37 typedef struct {
ommpy 0:d383e2dee0f7 38 struct spi_s spi; /**< Target specific spi structure */
ommpy 0:d383e2dee0f7 39 struct buffer_s tx_buff; /**< Tx buffer */
ommpy 0:d383e2dee0f7 40 struct buffer_s rx_buff; /**< Rx buffer */
ommpy 0:d383e2dee0f7 41 } spi_t;
ommpy 0:d383e2dee0f7 42
ommpy 0:d383e2dee0f7 43 #else
ommpy 0:d383e2dee0f7 44 /** Non-asynch spi hal structure
ommpy 0:d383e2dee0f7 45 */
ommpy 0:d383e2dee0f7 46 typedef struct spi_s spi_t;
ommpy 0:d383e2dee0f7 47
ommpy 0:d383e2dee0f7 48 #endif
ommpy 0:d383e2dee0f7 49
ommpy 0:d383e2dee0f7 50 #ifdef __cplusplus
ommpy 0:d383e2dee0f7 51 extern "C" {
ommpy 0:d383e2dee0f7 52 #endif
ommpy 0:d383e2dee0f7 53
ommpy 0:d383e2dee0f7 54 /**
ommpy 0:d383e2dee0f7 55 * \defgroup GeneralSPI SPI Configuration Functions
ommpy 0:d383e2dee0f7 56 * @{
ommpy 0:d383e2dee0f7 57 */
ommpy 0:d383e2dee0f7 58
ommpy 0:d383e2dee0f7 59 /** Initialize the SPI peripheral
ommpy 0:d383e2dee0f7 60 *
ommpy 0:d383e2dee0f7 61 * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
ommpy 0:d383e2dee0f7 62 * @param[out] obj The SPI object to initialize
ommpy 0:d383e2dee0f7 63 * @param[in] mosi The pin to use for MOSI
ommpy 0:d383e2dee0f7 64 * @param[in] miso The pin to use for MISO
ommpy 0:d383e2dee0f7 65 * @param[in] sclk The pin to use for SCLK
ommpy 0:d383e2dee0f7 66 * @param[in] ssel The pin to use for SSEL
ommpy 0:d383e2dee0f7 67 */
ommpy 0:d383e2dee0f7 68 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
ommpy 0:d383e2dee0f7 69
ommpy 0:d383e2dee0f7 70 /** Release a SPI object
ommpy 0:d383e2dee0f7 71 *
ommpy 0:d383e2dee0f7 72 * TODO: spi_free is currently unimplemented
ommpy 0:d383e2dee0f7 73 * This will require reference counting at the C++ level to be safe
ommpy 0:d383e2dee0f7 74 *
ommpy 0:d383e2dee0f7 75 * Return the pins owned by the SPI object to their reset state
ommpy 0:d383e2dee0f7 76 * Disable the SPI peripheral
ommpy 0:d383e2dee0f7 77 * Disable the SPI clock
ommpy 0:d383e2dee0f7 78 * @param[in] obj The SPI object to deinitialize
ommpy 0:d383e2dee0f7 79 */
ommpy 0:d383e2dee0f7 80 void spi_free(spi_t *obj);
ommpy 0:d383e2dee0f7 81
ommpy 0:d383e2dee0f7 82 /** Configure the SPI format
ommpy 0:d383e2dee0f7 83 *
ommpy 0:d383e2dee0f7 84 * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode
ommpy 0:d383e2dee0f7 85 * @param[in,out] obj The SPI object to configure
ommpy 0:d383e2dee0f7 86 * @param[in] bits The number of bits per frame
ommpy 0:d383e2dee0f7 87 * @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
ommpy 0:d383e2dee0f7 88 * @param[in] slave Zero for master mode or non-zero for slave mode
ommpy 0:d383e2dee0f7 89 */
ommpy 0:d383e2dee0f7 90 void spi_format(spi_t *obj, int bits, int mode, int slave);
ommpy 0:d383e2dee0f7 91
ommpy 0:d383e2dee0f7 92 /** Set the SPI baud rate
ommpy 0:d383e2dee0f7 93 *
ommpy 0:d383e2dee0f7 94 * Actual frequency may differ from the desired frequency due to available dividers and bus clock
ommpy 0:d383e2dee0f7 95 * Configures the SPI peripheral's baud rate
ommpy 0:d383e2dee0f7 96 * @param[in,out] obj The SPI object to configure
ommpy 0:d383e2dee0f7 97 * @param[in] hz The baud rate in Hz
ommpy 0:d383e2dee0f7 98 */
ommpy 0:d383e2dee0f7 99 void spi_frequency(spi_t *obj, int hz);
ommpy 0:d383e2dee0f7 100
ommpy 0:d383e2dee0f7 101 /**@}*/
ommpy 0:d383e2dee0f7 102 /**
ommpy 0:d383e2dee0f7 103 * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
ommpy 0:d383e2dee0f7 104 * @{
ommpy 0:d383e2dee0f7 105 */
ommpy 0:d383e2dee0f7 106
ommpy 0:d383e2dee0f7 107 /** Write a byte out in master mode and receive a value
ommpy 0:d383e2dee0f7 108 *
ommpy 0:d383e2dee0f7 109 * @param[in] obj The SPI peripheral to use for sending
ommpy 0:d383e2dee0f7 110 * @param[in] value The value to send
ommpy 0:d383e2dee0f7 111 * @return Returns the value received during send
ommpy 0:d383e2dee0f7 112 */
ommpy 0:d383e2dee0f7 113 int spi_master_write(spi_t *obj, int value);
ommpy 0:d383e2dee0f7 114
ommpy 0:d383e2dee0f7 115 /** Check if a value is available to read
ommpy 0:d383e2dee0f7 116 *
ommpy 0:d383e2dee0f7 117 * @param[in] obj The SPI peripheral to check
ommpy 0:d383e2dee0f7 118 * @return non-zero if a value is available
ommpy 0:d383e2dee0f7 119 */
ommpy 0:d383e2dee0f7 120 int spi_slave_receive(spi_t *obj);
ommpy 0:d383e2dee0f7 121
ommpy 0:d383e2dee0f7 122 /** Get a received value out of the SPI receive buffer in slave mode
ommpy 0:d383e2dee0f7 123 *
ommpy 0:d383e2dee0f7 124 * Blocks until a value is available
ommpy 0:d383e2dee0f7 125 * @param[in] obj The SPI peripheral to read
ommpy 0:d383e2dee0f7 126 * @return The value received
ommpy 0:d383e2dee0f7 127 */
ommpy 0:d383e2dee0f7 128 int spi_slave_read(spi_t *obj);
ommpy 0:d383e2dee0f7 129
ommpy 0:d383e2dee0f7 130 /** Write a value to the SPI peripheral in slave mode
ommpy 0:d383e2dee0f7 131 *
ommpy 0:d383e2dee0f7 132 * Blocks until the SPI peripheral can be written to
ommpy 0:d383e2dee0f7 133 * @param[in] obj The SPI peripheral to write
ommpy 0:d383e2dee0f7 134 * @param[in] value The value to write
ommpy 0:d383e2dee0f7 135 */
ommpy 0:d383e2dee0f7 136 void spi_slave_write(spi_t *obj, int value);
ommpy 0:d383e2dee0f7 137
ommpy 0:d383e2dee0f7 138 /** Checks if the specified SPI peripheral is in use
ommpy 0:d383e2dee0f7 139 *
ommpy 0:d383e2dee0f7 140 * @param[in] obj The SPI peripheral to check
ommpy 0:d383e2dee0f7 141 * @return non-zero if the peripheral is currently transmitting
ommpy 0:d383e2dee0f7 142 */
ommpy 0:d383e2dee0f7 143 int spi_busy(spi_t *obj);
ommpy 0:d383e2dee0f7 144
ommpy 0:d383e2dee0f7 145 /** Get the module number
ommpy 0:d383e2dee0f7 146 *
ommpy 0:d383e2dee0f7 147 * @param[in] obj The SPI peripheral to check
ommpy 0:d383e2dee0f7 148 * @return The module number
ommpy 0:d383e2dee0f7 149 */
ommpy 0:d383e2dee0f7 150 uint8_t spi_get_module(spi_t *obj);
ommpy 0:d383e2dee0f7 151
ommpy 0:d383e2dee0f7 152 /**@}*/
ommpy 0:d383e2dee0f7 153
ommpy 0:d383e2dee0f7 154 #if DEVICE_SPI_ASYNCH
ommpy 0:d383e2dee0f7 155 /**
ommpy 0:d383e2dee0f7 156 * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
ommpy 0:d383e2dee0f7 157 * @{
ommpy 0:d383e2dee0f7 158 */
ommpy 0:d383e2dee0f7 159
ommpy 0:d383e2dee0f7 160 /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
ommpy 0:d383e2dee0f7 161 *
ommpy 0:d383e2dee0f7 162 * @param[in] obj The SPI object which holds the transfer information
ommpy 0:d383e2dee0f7 163 * @param[in] tx The buffer to send
ommpy 0:d383e2dee0f7 164 * @param[in] tx_length The number of words to transmit
ommpy 0:d383e2dee0f7 165 * @param[in] rx The buffer to receive
ommpy 0:d383e2dee0f7 166 * @param[in] rx_length The number of words to receive
ommpy 0:d383e2dee0f7 167 * @param[in] bit_width The bit width of buffer words
ommpy 0:d383e2dee0f7 168 * @param[in] event The logical OR of events to be registered
ommpy 0:d383e2dee0f7 169 * @param[in] handler SPI interrupt handler
ommpy 0:d383e2dee0f7 170 * @param[in] hint A suggestion for how to use DMA with this transfer
ommpy 0:d383e2dee0f7 171 */
ommpy 0:d383e2dee0f7 172 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
ommpy 0:d383e2dee0f7 173
ommpy 0:d383e2dee0f7 174 /** The asynchronous IRQ handler
ommpy 0:d383e2dee0f7 175 *
ommpy 0:d383e2dee0f7 176 * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
ommpy 0:d383e2dee0f7 177 * conditions, such as buffer overflows or transfer complete.
ommpy 0:d383e2dee0f7 178 * @param[in] obj The SPI object which holds the transfer information
ommpy 0:d383e2dee0f7 179 * @return event flags if a transfer termination condition was met or 0 otherwise.
ommpy 0:d383e2dee0f7 180 */
ommpy 0:d383e2dee0f7 181 uint32_t spi_irq_handler_asynch(spi_t *obj);
ommpy 0:d383e2dee0f7 182
ommpy 0:d383e2dee0f7 183 /** Attempts to determine if the SPI peripheral is already in use.
ommpy 0:d383e2dee0f7 184 *
ommpy 0:d383e2dee0f7 185 * If a temporary DMA channel has been allocated, peripheral is in use.
ommpy 0:d383e2dee0f7 186 * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA
ommpy 0:d383e2dee0f7 187 * channel were allocated.
ommpy 0:d383e2dee0f7 188 * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check
ommpy 0:d383e2dee0f7 189 * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if
ommpy 0:d383e2dee0f7 190 * there are any bytes in the FIFOs.
ommpy 0:d383e2dee0f7 191 * @param[in] obj The SPI object to check for activity
ommpy 0:d383e2dee0f7 192 * @return non-zero if the SPI port is active or zero if it is not.
ommpy 0:d383e2dee0f7 193 */
ommpy 0:d383e2dee0f7 194 uint8_t spi_active(spi_t *obj);
ommpy 0:d383e2dee0f7 195
ommpy 0:d383e2dee0f7 196 /** Abort an SPI transfer
ommpy 0:d383e2dee0f7 197 *
ommpy 0:d383e2dee0f7 198 * @param obj The SPI peripheral to stop
ommpy 0:d383e2dee0f7 199 */
ommpy 0:d383e2dee0f7 200 void spi_abort_asynch(spi_t *obj);
ommpy 0:d383e2dee0f7 201
ommpy 0:d383e2dee0f7 202
ommpy 0:d383e2dee0f7 203 #endif
ommpy 0:d383e2dee0f7 204
ommpy 0:d383e2dee0f7 205 /**@}*/
ommpy 0:d383e2dee0f7 206
ommpy 0:d383e2dee0f7 207 #ifdef __cplusplus
ommpy 0:d383e2dee0f7 208 }
ommpy 0:d383e2dee0f7 209 #endif // __cplusplus
ommpy 0:d383e2dee0f7 210
ommpy 0:d383e2dee0f7 211 #endif // SPI_DEVICE
ommpy 0:d383e2dee0f7 212
ommpy 0:d383e2dee0f7 213 #endif // MBED_SPI_API_H