Руслан Бредун / Mbed 2 deprecated stm32-sensor-base2

test

Dependencies:   mbed Watchdog

Dependents:   STM32-MC_node

mbed/hal/lp_ticker_api.h@0:d383e2dee0f7, 2020-07-06 (annotated)

Committer:
ommpy
Date:
Mon Jul 06 17:18:59 2020 +0530
Revision:
0:d383e2dee0f7
first commit

Who changed what in which revision?

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ommpy 0:d383e2dee0f7 1
ommpy 0:d383e2dee0f7 2 /** \addtogroup hal */
ommpy 0:d383e2dee0f7 3 /** @{*/
ommpy 0:d383e2dee0f7 4 /* mbed Microcontroller Library
ommpy 0:d383e2dee0f7 5 * Copyright (c) 2015 ARM Limited
ommpy 0:d383e2dee0f7 6 * SPDX-License-Identifier: Apache-2.0
ommpy 0:d383e2dee0f7 7 *
ommpy 0:d383e2dee0f7 8 * Licensed under the Apache License, Version 2.0 (the "License");
ommpy 0:d383e2dee0f7 9 * you may not use this file except in compliance with the License.
ommpy 0:d383e2dee0f7 10 * You may obtain a copy of the License at
ommpy 0:d383e2dee0f7 11 *
ommpy 0:d383e2dee0f7 12 * http://www.apache.org/licenses/LICENSE-2.0
ommpy 0:d383e2dee0f7 13 *
ommpy 0:d383e2dee0f7 14 * Unless required by applicable law or agreed to in writing, software
ommpy 0:d383e2dee0f7 15 * distributed under the License is distributed on an "AS IS" BASIS,
ommpy 0:d383e2dee0f7 16 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
ommpy 0:d383e2dee0f7 17 * See the License for the specific language governing permissions and
ommpy 0:d383e2dee0f7 18 * limitations under the License.
ommpy 0:d383e2dee0f7 19 */
ommpy 0:d383e2dee0f7 20 #ifndef MBED_LPTICKER_API_H
ommpy 0:d383e2dee0f7 21 #define MBED_LPTICKER_API_H
ommpy 0:d383e2dee0f7 22
ommpy 0:d383e2dee0f7 23 #include "device.h"
ommpy 0:d383e2dee0f7 24
ommpy 0:d383e2dee0f7 25 #if DEVICE_LPTICKER
ommpy 0:d383e2dee0f7 26
ommpy 0:d383e2dee0f7 27 #include "hal/ticker_api.h"
ommpy 0:d383e2dee0f7 28
ommpy 0:d383e2dee0f7 29 #ifdef __cplusplus
ommpy 0:d383e2dee0f7 30 extern "C" {
ommpy 0:d383e2dee0f7 31 #endif
ommpy 0:d383e2dee0f7 32
ommpy 0:d383e2dee0f7 33 /**
ommpy 0:d383e2dee0f7 34 * \defgroup hal_lp_ticker Low Power Ticker
ommpy 0:d383e2dee0f7 35 * Low level interface to the low power ticker of a target
ommpy 0:d383e2dee0f7 36 *
ommpy 0:d383e2dee0f7 37 * # Defined behavior
ommpy 0:d383e2dee0f7 38 * * Has a reported frequency between 4KHz and 64KHz - verified by ::lp_ticker_info_test
ommpy 0:d383e2dee0f7 39 * * Has a counter that is at least 12 bits wide - verified by ::lp_ticker_info_test
ommpy 0:d383e2dee0f7 40 * * Continues operating in deep sleep mode - verified by ::lp_ticker_deepsleep_test
ommpy 0:d383e2dee0f7 41 * * All behavior defined by the @ref hal_ticker_shared "ticker specification"
ommpy 0:d383e2dee0f7 42 *
ommpy 0:d383e2dee0f7 43 * # Undefined behavior
ommpy 0:d383e2dee0f7 44 * * See the @ref hal_ticker_shared "ticker specification"
ommpy 0:d383e2dee0f7 45 * * Calling any function other than lp_ticker_init after calling lp_ticker_free
ommpy 0:d383e2dee0f7 46 *
ommpy 0:d383e2dee0f7 47 * # Potential bugs
ommpy 0:d383e2dee0f7 48 * * Glitches due to ripple counter - Verified by ::lp_ticker_glitch_test
ommpy 0:d383e2dee0f7 49 *
ommpy 0:d383e2dee0f7 50 * @see hal_lp_ticker_tests
ommpy 0:d383e2dee0f7 51 *
ommpy 0:d383e2dee0f7 52 * @{
ommpy 0:d383e2dee0f7 53 */
ommpy 0:d383e2dee0f7 54
ommpy 0:d383e2dee0f7 55 /**
ommpy 0:d383e2dee0f7 56 * \defgroup hal_lp_ticker_tests Low Power Ticker tests
ommpy 0:d383e2dee0f7 57 * Tests to validate the proper implementation of the low power ticker
ommpy 0:d383e2dee0f7 58 *
ommpy 0:d383e2dee0f7 59 * To run the low power ticker hal tests use the command:
ommpy 0:d383e2dee0f7 60 *
ommpy 0:d383e2dee0f7 61 * mbed test -t <toolchain> -m <target> -n tests-mbed_hal-common_ticker*,tests-mbed_hal-lp_ticker*
ommpy 0:d383e2dee0f7 62 *
ommpy 0:d383e2dee0f7 63 */
ommpy 0:d383e2dee0f7 64
ommpy 0:d383e2dee0f7 65 typedef void (*ticker_irq_handler_type)(const ticker_data_t *const);
ommpy 0:d383e2dee0f7 66
ommpy 0:d383e2dee0f7 67 /** Set low power ticker IRQ handler
ommpy 0:d383e2dee0f7 68 *
ommpy 0:d383e2dee0f7 69 * @param ticker_irq_handler IRQ handler to be connected
ommpy 0:d383e2dee0f7 70 *
ommpy 0:d383e2dee0f7 71 * @return previous ticker IRQ handler
ommpy 0:d383e2dee0f7 72 *
ommpy 0:d383e2dee0f7 73 * @note by default IRQ handler is set to ::ticker_irq_handler
ommpy 0:d383e2dee0f7 74 * @note this function is primarily for testing purposes and it's not required part of HAL implementation
ommpy 0:d383e2dee0f7 75 *
ommpy 0:d383e2dee0f7 76 */
ommpy 0:d383e2dee0f7 77 ticker_irq_handler_type set_lp_ticker_irq_handler(ticker_irq_handler_type ticker_irq_handler);
ommpy 0:d383e2dee0f7 78
ommpy 0:d383e2dee0f7 79 /** Get low power ticker's data
ommpy 0:d383e2dee0f7 80 *
ommpy 0:d383e2dee0f7 81 * @return The low power ticker data
ommpy 0:d383e2dee0f7 82 */
ommpy 0:d383e2dee0f7 83 const ticker_data_t *get_lp_ticker_data(void);
ommpy 0:d383e2dee0f7 84
ommpy 0:d383e2dee0f7 85 /** The wrapper for ticker_irq_handler, to pass lp ticker's data
ommpy 0:d383e2dee0f7 86 *
ommpy 0:d383e2dee0f7 87 */
ommpy 0:d383e2dee0f7 88 void lp_ticker_irq_handler(void);
ommpy 0:d383e2dee0f7 89
ommpy 0:d383e2dee0f7 90 /* HAL lp ticker */
ommpy 0:d383e2dee0f7 91
ommpy 0:d383e2dee0f7 92 /** Initialize the low power ticker
ommpy 0:d383e2dee0f7 93 *
ommpy 0:d383e2dee0f7 94 * Initialize or re-initialize the ticker. This resets all the
ommpy 0:d383e2dee0f7 95 * clocking and prescaler registers, along with disabling
ommpy 0:d383e2dee0f7 96 * the compare interrupt.
ommpy 0:d383e2dee0f7 97 *
ommpy 0:d383e2dee0f7 98 * Pseudo Code:
ommpy 0:d383e2dee0f7 99 * @code
ommpy 0:d383e2dee0f7 100 * void lp_ticker_init()
ommpy 0:d383e2dee0f7 101 * {
ommpy 0:d383e2dee0f7 102 * // Enable clock gate so processor can read LPTMR registers
ommpy 0:d383e2dee0f7 103 * POWER_CTRL |= POWER_CTRL_LPTMR_Msk;
ommpy 0:d383e2dee0f7 104 *
ommpy 0:d383e2dee0f7 105 * // Disable the timer and ensure it is powered down
ommpy 0:d383e2dee0f7 106 * LPTMR_CTRL &= ~(LPTMR_CTRL_ENABLE_Msk | LPTMR_CTRL_COMPARE_ENABLE_Msk);
ommpy 0:d383e2dee0f7 107 *
ommpy 0:d383e2dee0f7 108 * // Configure divisors - no division necessary
ommpy 0:d383e2dee0f7 109 * LPTMR_PRESCALE = 0;
ommpy 0:d383e2dee0f7 110 * LPTMR_CTRL |= LPTMR_CTRL_ENABLE_Msk;
ommpy 0:d383e2dee0f7 111 *
ommpy 0:d383e2dee0f7 112 * // Install the interrupt handler
ommpy 0:d383e2dee0f7 113 * NVIC_SetVector(LPTMR_IRQn, (uint32_t)lp_ticker_irq_handler);
ommpy 0:d383e2dee0f7 114 * NVIC_EnableIRQ(LPTMR_IRQn);
ommpy 0:d383e2dee0f7 115 * }
ommpy 0:d383e2dee0f7 116 * @endcode
ommpy 0:d383e2dee0f7 117 */
ommpy 0:d383e2dee0f7 118 void lp_ticker_init(void);
ommpy 0:d383e2dee0f7 119
ommpy 0:d383e2dee0f7 120 /** Deinitialize the lower power ticker
ommpy 0:d383e2dee0f7 121 *
ommpy 0:d383e2dee0f7 122 * Powerdown the lp ticker in preparation for sleep, powerdown, or reset.
ommpy 0:d383e2dee0f7 123 *
ommpy 0:d383e2dee0f7 124 * After calling this function no other ticker functions should be called except
ommpy 0:d383e2dee0f7 125 * lp_ticker_init(). Calling any function other than init after freeing is
ommpy 0:d383e2dee0f7 126 * undefined.
ommpy 0:d383e2dee0f7 127 *
ommpy 0:d383e2dee0f7 128 * @note This function stops the ticker from counting.
ommpy 0:d383e2dee0f7 129 */
ommpy 0:d383e2dee0f7 130 void lp_ticker_free(void);
ommpy 0:d383e2dee0f7 131
ommpy 0:d383e2dee0f7 132 /** Read the current tick
ommpy 0:d383e2dee0f7 133 *
ommpy 0:d383e2dee0f7 134 * If no rollover has occurred, the seconds passed since lp_ticker_init()
ommpy 0:d383e2dee0f7 135 * was called can be found by dividing the ticks returned by this function
ommpy 0:d383e2dee0f7 136 * by the frequency returned by ::lp_ticker_get_info.
ommpy 0:d383e2dee0f7 137 *
ommpy 0:d383e2dee0f7 138 * @return The current timer's counter value in ticks
ommpy 0:d383e2dee0f7 139 *
ommpy 0:d383e2dee0f7 140 * Pseudo Code:
ommpy 0:d383e2dee0f7 141 * @code
ommpy 0:d383e2dee0f7 142 * uint32_t lp_ticker_read()
ommpy 0:d383e2dee0f7 143 * {
ommpy 0:d383e2dee0f7 144 * uint16_t count;
ommpy 0:d383e2dee0f7 145 * uint16_t last_count;
ommpy 0:d383e2dee0f7 146 *
ommpy 0:d383e2dee0f7 147 * // Loop until the same tick is read twice since this
ommpy 0:d383e2dee0f7 148 * // is ripple counter on a different clock domain.
ommpy 0:d383e2dee0f7 149 * count = LPTMR_COUNT;
ommpy 0:d383e2dee0f7 150 * do {
ommpy 0:d383e2dee0f7 151 * last_count = count;
ommpy 0:d383e2dee0f7 152 * count = LPTMR_COUNT;
ommpy 0:d383e2dee0f7 153 * } while (last_count != count);
ommpy 0:d383e2dee0f7 154 *
ommpy 0:d383e2dee0f7 155 * return count;
ommpy 0:d383e2dee0f7 156 * }
ommpy 0:d383e2dee0f7 157 * @endcode
ommpy 0:d383e2dee0f7 158 */
ommpy 0:d383e2dee0f7 159 uint32_t lp_ticker_read(void);
ommpy 0:d383e2dee0f7 160
ommpy 0:d383e2dee0f7 161 /** Set interrupt for specified timestamp
ommpy 0:d383e2dee0f7 162 *
ommpy 0:d383e2dee0f7 163 * @param timestamp The time in ticks to be set
ommpy 0:d383e2dee0f7 164 *
ommpy 0:d383e2dee0f7 165 * @note no special handling needs to be done for times in the past
ommpy 0:d383e2dee0f7 166 * as the common timer code will detect this and call
ommpy 0:d383e2dee0f7 167 * lp_ticker_fire_interrupt() if this is the case
ommpy 0:d383e2dee0f7 168 *
ommpy 0:d383e2dee0f7 169 * @note calling this function with timestamp of more than the supported
ommpy 0:d383e2dee0f7 170 * number of bits returned by ::lp_ticker_get_info results in undefined
ommpy 0:d383e2dee0f7 171 * behavior.
ommpy 0:d383e2dee0f7 172 *
ommpy 0:d383e2dee0f7 173 * Pseudo Code:
ommpy 0:d383e2dee0f7 174 * @code
ommpy 0:d383e2dee0f7 175 * void lp_ticker_set_interrupt(timestamp_t timestamp)
ommpy 0:d383e2dee0f7 176 * {
ommpy 0:d383e2dee0f7 177 * LPTMR_COMPARE = timestamp;
ommpy 0:d383e2dee0f7 178 * LPTMR_CTRL |= LPTMR_CTRL_COMPARE_ENABLE_Msk;
ommpy 0:d383e2dee0f7 179 * }
ommpy 0:d383e2dee0f7 180 * @endcode
ommpy 0:d383e2dee0f7 181 */
ommpy 0:d383e2dee0f7 182 void lp_ticker_set_interrupt(timestamp_t timestamp);
ommpy 0:d383e2dee0f7 183
ommpy 0:d383e2dee0f7 184 /** Disable low power ticker interrupt
ommpy 0:d383e2dee0f7 185 *
ommpy 0:d383e2dee0f7 186 * Pseudo Code:
ommpy 0:d383e2dee0f7 187 * @code
ommpy 0:d383e2dee0f7 188 * void lp_ticker_disable_interrupt(void)
ommpy 0:d383e2dee0f7 189 * {
ommpy 0:d383e2dee0f7 190 * // Disable the compare interrupt
ommpy 0:d383e2dee0f7 191 * LPTMR_CTRL &= ~LPTMR_CTRL_COMPARE_ENABLE_Msk;
ommpy 0:d383e2dee0f7 192 * }
ommpy 0:d383e2dee0f7 193 * @endcode
ommpy 0:d383e2dee0f7 194 */
ommpy 0:d383e2dee0f7 195 void lp_ticker_disable_interrupt(void);
ommpy 0:d383e2dee0f7 196
ommpy 0:d383e2dee0f7 197 /** Clear the low power ticker interrupt
ommpy 0:d383e2dee0f7 198 *
ommpy 0:d383e2dee0f7 199 * Pseudo Code:
ommpy 0:d383e2dee0f7 200 * @code
ommpy 0:d383e2dee0f7 201 * void lp_ticker_clear_interrupt(void)
ommpy 0:d383e2dee0f7 202 * {
ommpy 0:d383e2dee0f7 203 * // Write to the ICR (interrupt clear register) of the LPTMR
ommpy 0:d383e2dee0f7 204 * LPTMR_ICR = LPTMR_ICR_COMPARE_Msk;
ommpy 0:d383e2dee0f7 205 * }
ommpy 0:d383e2dee0f7 206 * @endcode
ommpy 0:d383e2dee0f7 207 */
ommpy 0:d383e2dee0f7 208 void lp_ticker_clear_interrupt(void);
ommpy 0:d383e2dee0f7 209
ommpy 0:d383e2dee0f7 210 /** Set pending interrupt that should be fired right away.
ommpy 0:d383e2dee0f7 211 *
ommpy 0:d383e2dee0f7 212 * Pseudo Code:
ommpy 0:d383e2dee0f7 213 * @code
ommpy 0:d383e2dee0f7 214 * void lp_ticker_fire_interrupt(void)
ommpy 0:d383e2dee0f7 215 * {
ommpy 0:d383e2dee0f7 216 * NVIC_SetPendingIRQ(LPTMR_IRQn);
ommpy 0:d383e2dee0f7 217 * }
ommpy 0:d383e2dee0f7 218 * @endcode
ommpy 0:d383e2dee0f7 219 */
ommpy 0:d383e2dee0f7 220 void lp_ticker_fire_interrupt(void);
ommpy 0:d383e2dee0f7 221
ommpy 0:d383e2dee0f7 222 /** Get frequency and counter bits of this ticker.
ommpy 0:d383e2dee0f7 223 *
ommpy 0:d383e2dee0f7 224 * Pseudo Code:
ommpy 0:d383e2dee0f7 225 * @code
ommpy 0:d383e2dee0f7 226 * const ticker_info_t* lp_ticker_get_info()
ommpy 0:d383e2dee0f7 227 * {
ommpy 0:d383e2dee0f7 228 * static const ticker_info_t info = {
ommpy 0:d383e2dee0f7 229 * 32768, // 32KHz
ommpy 0:d383e2dee0f7 230 * 16 // 16 bit counter
ommpy 0:d383e2dee0f7 231 * };
ommpy 0:d383e2dee0f7 232 * return &info;
ommpy 0:d383e2dee0f7 233 * }
ommpy 0:d383e2dee0f7 234 * @endcode
ommpy 0:d383e2dee0f7 235 */
ommpy 0:d383e2dee0f7 236 const ticker_info_t *lp_ticker_get_info(void);
ommpy 0:d383e2dee0f7 237
ommpy 0:d383e2dee0f7 238 /**@}*/
ommpy 0:d383e2dee0f7 239
ommpy 0:d383e2dee0f7 240 #ifdef __cplusplus
ommpy 0:d383e2dee0f7 241 }
ommpy 0:d383e2dee0f7 242 #endif
ommpy 0:d383e2dee0f7 243
ommpy 0:d383e2dee0f7 244 #endif
ommpy 0:d383e2dee0f7 245
ommpy 0:d383e2dee0f7 246 #endif
ommpy 0:d383e2dee0f7 247
ommpy 0:d383e2dee0f7 248 /** @}*/