test

Dependencies:   mbed Watchdog

Dependents:   STM32-MC_node

Committer:
ommpy
Date:
Mon Jul 06 17:18:59 2020 +0530
Revision:
0:d383e2dee0f7
first commit

Who changed what in which revision?

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ommpy 0:d383e2dee0f7 1
ommpy 0:d383e2dee0f7 2 /** \addtogroup hal */
ommpy 0:d383e2dee0f7 3 /** @{*/
ommpy 0:d383e2dee0f7 4 /* mbed Microcontroller Library
ommpy 0:d383e2dee0f7 5 * Copyright (c) 2006-2013 ARM Limited
ommpy 0:d383e2dee0f7 6 * SPDX-License-Identifier: Apache-2.0
ommpy 0:d383e2dee0f7 7 *
ommpy 0:d383e2dee0f7 8 * Licensed under the Apache License, Version 2.0 (the "License");
ommpy 0:d383e2dee0f7 9 * you may not use this file except in compliance with the License.
ommpy 0:d383e2dee0f7 10 * You may obtain a copy of the License at
ommpy 0:d383e2dee0f7 11 *
ommpy 0:d383e2dee0f7 12 * http://www.apache.org/licenses/LICENSE-2.0
ommpy 0:d383e2dee0f7 13 *
ommpy 0:d383e2dee0f7 14 * Unless required by applicable law or agreed to in writing, software
ommpy 0:d383e2dee0f7 15 * distributed under the License is distributed on an "AS IS" BASIS,
ommpy 0:d383e2dee0f7 16 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
ommpy 0:d383e2dee0f7 17 * See the License for the specific language governing permissions and
ommpy 0:d383e2dee0f7 18 * limitations under the License.
ommpy 0:d383e2dee0f7 19 */
ommpy 0:d383e2dee0f7 20 #ifndef MBED_GPIO_IRQ_API_H
ommpy 0:d383e2dee0f7 21 #define MBED_GPIO_IRQ_API_H
ommpy 0:d383e2dee0f7 22
ommpy 0:d383e2dee0f7 23 #include "device.h"
ommpy 0:d383e2dee0f7 24
ommpy 0:d383e2dee0f7 25 #if DEVICE_INTERRUPTIN
ommpy 0:d383e2dee0f7 26
ommpy 0:d383e2dee0f7 27 #ifdef __cplusplus
ommpy 0:d383e2dee0f7 28 extern "C" {
ommpy 0:d383e2dee0f7 29 #endif
ommpy 0:d383e2dee0f7 30
ommpy 0:d383e2dee0f7 31 /** GPIO IRQ events
ommpy 0:d383e2dee0f7 32 */
ommpy 0:d383e2dee0f7 33 typedef enum {
ommpy 0:d383e2dee0f7 34 IRQ_NONE,
ommpy 0:d383e2dee0f7 35 IRQ_RISE,
ommpy 0:d383e2dee0f7 36 IRQ_FALL
ommpy 0:d383e2dee0f7 37 } gpio_irq_event;
ommpy 0:d383e2dee0f7 38
ommpy 0:d383e2dee0f7 39 /** GPIO IRQ HAL structure. gpio_irq_s is declared in the target's HAL
ommpy 0:d383e2dee0f7 40 */
ommpy 0:d383e2dee0f7 41 typedef struct gpio_irq_s gpio_irq_t;
ommpy 0:d383e2dee0f7 42
ommpy 0:d383e2dee0f7 43 typedef void (*gpio_irq_handler)(uint32_t id, gpio_irq_event event);
ommpy 0:d383e2dee0f7 44
ommpy 0:d383e2dee0f7 45 /**
ommpy 0:d383e2dee0f7 46 * \defgroup hal_gpioirq GPIO IRQ HAL functions
ommpy 0:d383e2dee0f7 47 * @{
ommpy 0:d383e2dee0f7 48 */
ommpy 0:d383e2dee0f7 49
ommpy 0:d383e2dee0f7 50 /** Initialize the GPIO IRQ pin
ommpy 0:d383e2dee0f7 51 *
ommpy 0:d383e2dee0f7 52 * @param obj The GPIO object to initialize
ommpy 0:d383e2dee0f7 53 * @param pin The GPIO pin name
ommpy 0:d383e2dee0f7 54 * @param handler The handler to be attached to GPIO IRQ
ommpy 0:d383e2dee0f7 55 * @param id The object ID (id != 0, 0 is reserved)
ommpy 0:d383e2dee0f7 56 * @return -1 if pin is NC, 0 otherwise
ommpy 0:d383e2dee0f7 57 */
ommpy 0:d383e2dee0f7 58 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id);
ommpy 0:d383e2dee0f7 59
ommpy 0:d383e2dee0f7 60 /** Release the GPIO IRQ PIN
ommpy 0:d383e2dee0f7 61 *
ommpy 0:d383e2dee0f7 62 * @param obj The gpio object
ommpy 0:d383e2dee0f7 63 */
ommpy 0:d383e2dee0f7 64 void gpio_irq_free(gpio_irq_t *obj);
ommpy 0:d383e2dee0f7 65
ommpy 0:d383e2dee0f7 66 /** Enable/disable pin IRQ event
ommpy 0:d383e2dee0f7 67 *
ommpy 0:d383e2dee0f7 68 * @param obj The GPIO object
ommpy 0:d383e2dee0f7 69 * @param event The GPIO IRQ event
ommpy 0:d383e2dee0f7 70 * @param enable The enable flag
ommpy 0:d383e2dee0f7 71 */
ommpy 0:d383e2dee0f7 72 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable);
ommpy 0:d383e2dee0f7 73
ommpy 0:d383e2dee0f7 74 /** Enable GPIO IRQ
ommpy 0:d383e2dee0f7 75 *
ommpy 0:d383e2dee0f7 76 * This is target dependent, as it might enable the entire port or just a pin
ommpy 0:d383e2dee0f7 77 * @param obj The GPIO object
ommpy 0:d383e2dee0f7 78 */
ommpy 0:d383e2dee0f7 79 void gpio_irq_enable(gpio_irq_t *obj);
ommpy 0:d383e2dee0f7 80
ommpy 0:d383e2dee0f7 81 /** Disable GPIO IRQ
ommpy 0:d383e2dee0f7 82 *
ommpy 0:d383e2dee0f7 83 * This is target dependent, as it might disable the entire port or just a pin
ommpy 0:d383e2dee0f7 84 * @param obj The GPIO object
ommpy 0:d383e2dee0f7 85 */
ommpy 0:d383e2dee0f7 86 void gpio_irq_disable(gpio_irq_t *obj);
ommpy 0:d383e2dee0f7 87
ommpy 0:d383e2dee0f7 88 /**@}*/
ommpy 0:d383e2dee0f7 89
ommpy 0:d383e2dee0f7 90 #ifdef __cplusplus
ommpy 0:d383e2dee0f7 91 }
ommpy 0:d383e2dee0f7 92 #endif
ommpy 0:d383e2dee0f7 93
ommpy 0:d383e2dee0f7 94 #endif
ommpy 0:d383e2dee0f7 95
ommpy 0:d383e2dee0f7 96 #endif
ommpy 0:d383e2dee0f7 97
ommpy 0:d383e2dee0f7 98 /** @}*/