Руслан Бредун / Mbed 2 deprecated stm32-sensor-base2

test

Dependencies:   mbed Watchdog

Dependents:   STM32-MC_node

mbed/drivers/SPISlave.h@0:d383e2dee0f7, 2020-07-06 (annotated)

Committer:
ommpy
Date:
Mon Jul 06 17:18:59 2020 +0530
Revision:
0:d383e2dee0f7
first commit

Who changed what in which revision?

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ommpy 0:d383e2dee0f7 1 /* mbed Microcontroller Library
ommpy 0:d383e2dee0f7 2 * Copyright (c) 2006-2013 ARM Limited
ommpy 0:d383e2dee0f7 3 * SPDX-License-Identifier: Apache-2.0
ommpy 0:d383e2dee0f7 4 *
ommpy 0:d383e2dee0f7 5 * Licensed under the Apache License, Version 2.0 (the "License");
ommpy 0:d383e2dee0f7 6 * you may not use this file except in compliance with the License.
ommpy 0:d383e2dee0f7 7 * You may obtain a copy of the License at
ommpy 0:d383e2dee0f7 8 *
ommpy 0:d383e2dee0f7 9 * http://www.apache.org/licenses/LICENSE-2.0
ommpy 0:d383e2dee0f7 10 *
ommpy 0:d383e2dee0f7 11 * Unless required by applicable law or agreed to in writing, software
ommpy 0:d383e2dee0f7 12 * distributed under the License is distributed on an "AS IS" BASIS,
ommpy 0:d383e2dee0f7 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
ommpy 0:d383e2dee0f7 14 * See the License for the specific language governing permissions and
ommpy 0:d383e2dee0f7 15 * limitations under the License.
ommpy 0:d383e2dee0f7 16 */
ommpy 0:d383e2dee0f7 17 #ifndef MBED_SPISLAVE_H
ommpy 0:d383e2dee0f7 18 #define MBED_SPISLAVE_H
ommpy 0:d383e2dee0f7 19
ommpy 0:d383e2dee0f7 20 #include "platform/platform.h"
ommpy 0:d383e2dee0f7 21 #include "platform/NonCopyable.h"
ommpy 0:d383e2dee0f7 22
ommpy 0:d383e2dee0f7 23 #if DEVICE_SPISLAVE || defined(DOXYGEN_ONLY)
ommpy 0:d383e2dee0f7 24
ommpy 0:d383e2dee0f7 25 #include "hal/spi_api.h"
ommpy 0:d383e2dee0f7 26
ommpy 0:d383e2dee0f7 27 namespace mbed {
ommpy 0:d383e2dee0f7 28 /** \addtogroup drivers */
ommpy 0:d383e2dee0f7 29
ommpy 0:d383e2dee0f7 30 /** A SPI slave, used for communicating with a SPI master device.
ommpy 0:d383e2dee0f7 31 *
ommpy 0:d383e2dee0f7 32 * The default format is set to 8 bits, mode 0 and a clock frequency of 1MHz.
ommpy 0:d383e2dee0f7 33 *
ommpy 0:d383e2dee0f7 34 * @note Synchronization level: Not protected
ommpy 0:d383e2dee0f7 35 *
ommpy 0:d383e2dee0f7 36 * Example of how to reply to a SPI master as slave:
ommpy 0:d383e2dee0f7 37 * @code
ommpy 0:d383e2dee0f7 38 *
ommpy 0:d383e2dee0f7 39 * #include "mbed.h"
ommpy 0:d383e2dee0f7 40 *
ommpy 0:d383e2dee0f7 41 * SPISlave device(SPI_MOSI, SPI_MISO, SPI_SCLK, SPI_CS);
ommpy 0:d383e2dee0f7 42 *
ommpy 0:d383e2dee0f7 43 * int main() {
ommpy 0:d383e2dee0f7 44 * device.reply(0x00); // Prime SPI with first reply
ommpy 0:d383e2dee0f7 45 * while(1) {
ommpy 0:d383e2dee0f7 46 * if(device.receive()) {
ommpy 0:d383e2dee0f7 47 * int v = device.read(); // Read byte from master
ommpy 0:d383e2dee0f7 48 * v = (v + 1) % 0x100; // Add one to it, modulo 256
ommpy 0:d383e2dee0f7 49 * device.reply(v); // Make this the next reply
ommpy 0:d383e2dee0f7 50 * }
ommpy 0:d383e2dee0f7 51 * }
ommpy 0:d383e2dee0f7 52 * }
ommpy 0:d383e2dee0f7 53 * @endcode
ommpy 0:d383e2dee0f7 54 * @ingroup drivers
ommpy 0:d383e2dee0f7 55 */
ommpy 0:d383e2dee0f7 56 class SPISlave : private NonCopyable<SPISlave> {
ommpy 0:d383e2dee0f7 57
ommpy 0:d383e2dee0f7 58 public:
ommpy 0:d383e2dee0f7 59
ommpy 0:d383e2dee0f7 60 /** Create a SPI slave connected to the specified pins.
ommpy 0:d383e2dee0f7 61 *
ommpy 0:d383e2dee0f7 62 * @note Either mosi or miso can be specified as NC if not used.
ommpy 0:d383e2dee0f7 63 *
ommpy 0:d383e2dee0f7 64 * @param mosi SPI Master Out, Slave In pin.
ommpy 0:d383e2dee0f7 65 * @param miso SPI Master In, Slave Out pin.
ommpy 0:d383e2dee0f7 66 * @param sclk SPI Clock pin.
ommpy 0:d383e2dee0f7 67 * @param ssel SPI Chip Select pin.
ommpy 0:d383e2dee0f7 68 */
ommpy 0:d383e2dee0f7 69 SPISlave(PinName mosi, PinName miso, PinName sclk, PinName ssel);
ommpy 0:d383e2dee0f7 70
ommpy 0:d383e2dee0f7 71 /** Configure the data transmission format.
ommpy 0:d383e2dee0f7 72 *
ommpy 0:d383e2dee0f7 73 * @param bits Number of bits per SPI frame (4 - 16).
ommpy 0:d383e2dee0f7 74 * @param mode Clock polarity and phase mode (0 - 3).
ommpy 0:d383e2dee0f7 75 *
ommpy 0:d383e2dee0f7 76 * @code
ommpy 0:d383e2dee0f7 77 * mode | POL PHA
ommpy 0:d383e2dee0f7 78 * -----+--------
ommpy 0:d383e2dee0f7 79 * 0 | 0 0
ommpy 0:d383e2dee0f7 80 * 1 | 0 1
ommpy 0:d383e2dee0f7 81 * 2 | 1 0
ommpy 0:d383e2dee0f7 82 * 3 | 1 1
ommpy 0:d383e2dee0f7 83 * @endcode
ommpy 0:d383e2dee0f7 84 */
ommpy 0:d383e2dee0f7 85 void format(int bits, int mode = 0);
ommpy 0:d383e2dee0f7 86
ommpy 0:d383e2dee0f7 87 /** Set the SPI bus clock frequency.
ommpy 0:d383e2dee0f7 88 *
ommpy 0:d383e2dee0f7 89 * @param hz Clock frequency in hz (default = 1MHz).
ommpy 0:d383e2dee0f7 90 */
ommpy 0:d383e2dee0f7 91 void frequency(int hz = 1000000);
ommpy 0:d383e2dee0f7 92
ommpy 0:d383e2dee0f7 93 /** Polls the SPI to see if data has been received.
ommpy 0:d383e2dee0f7 94 *
ommpy 0:d383e2dee0f7 95 * @return Presence of received data.
ommpy 0:d383e2dee0f7 96 * @retval 0 No data waiting.
ommpy 0:d383e2dee0f7 97 * @retval 1 Data waiting.
ommpy 0:d383e2dee0f7 98 */
ommpy 0:d383e2dee0f7 99 int receive(void);
ommpy 0:d383e2dee0f7 100
ommpy 0:d383e2dee0f7 101 /** Retrieve data from receive buffer as slave.
ommpy 0:d383e2dee0f7 102 *
ommpy 0:d383e2dee0f7 103 * @return The data in the receive buffer.
ommpy 0:d383e2dee0f7 104 */
ommpy 0:d383e2dee0f7 105 int read(void);
ommpy 0:d383e2dee0f7 106
ommpy 0:d383e2dee0f7 107 /** Fill the transmission buffer with the value to be written out
ommpy 0:d383e2dee0f7 108 * as slave on the next received message from the master.
ommpy 0:d383e2dee0f7 109 *
ommpy 0:d383e2dee0f7 110 * @param value The data to be transmitted next.
ommpy 0:d383e2dee0f7 111 */
ommpy 0:d383e2dee0f7 112 void reply(int value);
ommpy 0:d383e2dee0f7 113
ommpy 0:d383e2dee0f7 114 #if !defined(DOXYGEN_ONLY)
ommpy 0:d383e2dee0f7 115
ommpy 0:d383e2dee0f7 116 protected:
ommpy 0:d383e2dee0f7 117 /* Internal SPI object identifying the resources */
ommpy 0:d383e2dee0f7 118 spi_t _spi;
ommpy 0:d383e2dee0f7 119
ommpy 0:d383e2dee0f7 120 /* How many bits in an SPI frame */
ommpy 0:d383e2dee0f7 121 int _bits;
ommpy 0:d383e2dee0f7 122 /* Clock phase and polarity */
ommpy 0:d383e2dee0f7 123 int _mode;
ommpy 0:d383e2dee0f7 124 /* Clock frequency */
ommpy 0:d383e2dee0f7 125 int _hz;
ommpy 0:d383e2dee0f7 126
ommpy 0:d383e2dee0f7 127 #endif //!defined(DOXYGEN_ONLY)
ommpy 0:d383e2dee0f7 128 };
ommpy 0:d383e2dee0f7 129
ommpy 0:d383e2dee0f7 130 } // namespace mbed
ommpy 0:d383e2dee0f7 131
ommpy 0:d383e2dee0f7 132 #endif
ommpy 0:d383e2dee0f7 133
ommpy 0:d383e2dee0f7 134 #endif