test

Dependencies:   mbed Watchdog

Dependents:   STM32-MC_node

Committer:
ommpy
Date:
Mon Jul 06 17:18:59 2020 +0530
Revision:
0:d383e2dee0f7
first commit

Who changed what in which revision?

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ommpy 0:d383e2dee0f7 1 /* mbed Microcontroller Library
ommpy 0:d383e2dee0f7 2 * Copyright (c) 2006-2015 ARM Limited
ommpy 0:d383e2dee0f7 3 * SPDX-License-Identifier: Apache-2.0
ommpy 0:d383e2dee0f7 4 *
ommpy 0:d383e2dee0f7 5 * Licensed under the Apache License, Version 2.0 (the "License");
ommpy 0:d383e2dee0f7 6 * you may not use this file except in compliance with the License.
ommpy 0:d383e2dee0f7 7 * You may obtain a copy of the License at
ommpy 0:d383e2dee0f7 8 *
ommpy 0:d383e2dee0f7 9 * http://www.apache.org/licenses/LICENSE-2.0
ommpy 0:d383e2dee0f7 10 *
ommpy 0:d383e2dee0f7 11 * Unless required by applicable law or agreed to in writing, software
ommpy 0:d383e2dee0f7 12 * distributed under the License is distributed on an "AS IS" BASIS,
ommpy 0:d383e2dee0f7 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
ommpy 0:d383e2dee0f7 14 * See the License for the specific language governing permissions and
ommpy 0:d383e2dee0f7 15 * limitations under the License.
ommpy 0:d383e2dee0f7 16 */
ommpy 0:d383e2dee0f7 17 #ifndef MBED_SPI_H
ommpy 0:d383e2dee0f7 18 #define MBED_SPI_H
ommpy 0:d383e2dee0f7 19
ommpy 0:d383e2dee0f7 20 #include "platform/platform.h"
ommpy 0:d383e2dee0f7 21
ommpy 0:d383e2dee0f7 22 #if DEVICE_SPI || defined(DOXYGEN_ONLY)
ommpy 0:d383e2dee0f7 23
ommpy 0:d383e2dee0f7 24 #include "platform/PlatformMutex.h"
ommpy 0:d383e2dee0f7 25 #include "hal/spi_api.h"
ommpy 0:d383e2dee0f7 26 #include "platform/SingletonPtr.h"
ommpy 0:d383e2dee0f7 27 #include "platform/NonCopyable.h"
ommpy 0:d383e2dee0f7 28
ommpy 0:d383e2dee0f7 29 #if DEVICE_SPI_ASYNCH
ommpy 0:d383e2dee0f7 30 #include "platform/CThunk.h"
ommpy 0:d383e2dee0f7 31 #include "hal/dma_api.h"
ommpy 0:d383e2dee0f7 32 #include "platform/CircularBuffer.h"
ommpy 0:d383e2dee0f7 33 #include "platform/FunctionPointer.h"
ommpy 0:d383e2dee0f7 34 #include "platform/Transaction.h"
ommpy 0:d383e2dee0f7 35 #endif
ommpy 0:d383e2dee0f7 36
ommpy 0:d383e2dee0f7 37 namespace mbed {
ommpy 0:d383e2dee0f7 38 /** \addtogroup drivers */
ommpy 0:d383e2dee0f7 39
ommpy 0:d383e2dee0f7 40 /** A SPI Master, used for communicating with SPI slave devices.
ommpy 0:d383e2dee0f7 41 *
ommpy 0:d383e2dee0f7 42 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz.
ommpy 0:d383e2dee0f7 43 *
ommpy 0:d383e2dee0f7 44 * Most SPI devices will also require Chip Select and Reset signals. These
ommpy 0:d383e2dee0f7 45 * can be controlled using DigitalOut pins.
ommpy 0:d383e2dee0f7 46 *
ommpy 0:d383e2dee0f7 47 * @note Synchronization level: Thread safe
ommpy 0:d383e2dee0f7 48 *
ommpy 0:d383e2dee0f7 49 * Example of how to send a byte to a SPI slave and record the response:
ommpy 0:d383e2dee0f7 50 * @code
ommpy 0:d383e2dee0f7 51 * #include "mbed.h"
ommpy 0:d383e2dee0f7 52 *
ommpy 0:d383e2dee0f7 53 * SPI device(SPI_MOSI, SPI_MISO, SPI_SCLK)
ommpy 0:d383e2dee0f7 54 *
ommpy 0:d383e2dee0f7 55 * DigitalOut chip_select(SPI_CS);
ommpy 0:d383e2dee0f7 56 *
ommpy 0:d383e2dee0f7 57 * int main() {
ommpy 0:d383e2dee0f7 58 * device.lock();
ommpy 0:d383e2dee0f7 59 * chip_select = 0;
ommpy 0:d383e2dee0f7 60 *
ommpy 0:d383e2dee0f7 61 * int response = device.write(0xFF);
ommpy 0:d383e2dee0f7 62 *
ommpy 0:d383e2dee0f7 63 * chip_select = 1;
ommpy 0:d383e2dee0f7 64 * device.unlock();
ommpy 0:d383e2dee0f7 65 * }
ommpy 0:d383e2dee0f7 66 * @endcode
ommpy 0:d383e2dee0f7 67 *
ommpy 0:d383e2dee0f7 68 * Example using hardware Chip Select line:
ommpy 0:d383e2dee0f7 69 * @code
ommpy 0:d383e2dee0f7 70 * #include "mbed.h"
ommpy 0:d383e2dee0f7 71 *
ommpy 0:d383e2dee0f7 72 * SPI device(SPI_MOSI, SPI_MISO, SPI_SCLK, SPI_CS)
ommpy 0:d383e2dee0f7 73 *
ommpy 0:d383e2dee0f7 74 * int main() {
ommpy 0:d383e2dee0f7 75 * device.lock();
ommpy 0:d383e2dee0f7 76 * int response = device.write(0xFF);
ommpy 0:d383e2dee0f7 77 * device.unlock();
ommpy 0:d383e2dee0f7 78 * }
ommpy 0:d383e2dee0f7 79 * @endcode
ommpy 0:d383e2dee0f7 80 * @ingroup drivers
ommpy 0:d383e2dee0f7 81 */
ommpy 0:d383e2dee0f7 82 class SPI : private NonCopyable<SPI> {
ommpy 0:d383e2dee0f7 83
ommpy 0:d383e2dee0f7 84 public:
ommpy 0:d383e2dee0f7 85
ommpy 0:d383e2dee0f7 86 /** Create a SPI master connected to the specified pins.
ommpy 0:d383e2dee0f7 87 *
ommpy 0:d383e2dee0f7 88 * @note You can specify mosi or miso as NC if not used.
ommpy 0:d383e2dee0f7 89 *
ommpy 0:d383e2dee0f7 90 * @param mosi SPI Master Out, Slave In pin.
ommpy 0:d383e2dee0f7 91 * @param miso SPI Master In, Slave Out pin.
ommpy 0:d383e2dee0f7 92 * @param sclk SPI Clock pin.
ommpy 0:d383e2dee0f7 93 * @param ssel SPI Chip Select pin.
ommpy 0:d383e2dee0f7 94 */
ommpy 0:d383e2dee0f7 95 SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel = NC);
ommpy 0:d383e2dee0f7 96 virtual ~SPI();
ommpy 0:d383e2dee0f7 97
ommpy 0:d383e2dee0f7 98 /** Configure the data transmission format.
ommpy 0:d383e2dee0f7 99 *
ommpy 0:d383e2dee0f7 100 * @param bits Number of bits per SPI frame (4 - 16).
ommpy 0:d383e2dee0f7 101 * @param mode Clock polarity and phase mode (0 - 3).
ommpy 0:d383e2dee0f7 102 *
ommpy 0:d383e2dee0f7 103 * @code
ommpy 0:d383e2dee0f7 104 * mode | POL PHA
ommpy 0:d383e2dee0f7 105 * -----+--------
ommpy 0:d383e2dee0f7 106 * 0 | 0 0
ommpy 0:d383e2dee0f7 107 * 1 | 0 1
ommpy 0:d383e2dee0f7 108 * 2 | 1 0
ommpy 0:d383e2dee0f7 109 * 3 | 1 1
ommpy 0:d383e2dee0f7 110 * @endcode
ommpy 0:d383e2dee0f7 111 */
ommpy 0:d383e2dee0f7 112 void format(int bits, int mode = 0);
ommpy 0:d383e2dee0f7 113
ommpy 0:d383e2dee0f7 114 /** Set the SPI bus clock frequency.
ommpy 0:d383e2dee0f7 115 *
ommpy 0:d383e2dee0f7 116 * @param hz Clock frequency in Hz (default = 1MHz).
ommpy 0:d383e2dee0f7 117 */
ommpy 0:d383e2dee0f7 118 void frequency(int hz = 1000000);
ommpy 0:d383e2dee0f7 119
ommpy 0:d383e2dee0f7 120 /** Write to the SPI Slave and return the response.
ommpy 0:d383e2dee0f7 121 *
ommpy 0:d383e2dee0f7 122 * @param value Data to be sent to the SPI slave.
ommpy 0:d383e2dee0f7 123 *
ommpy 0:d383e2dee0f7 124 * @return Response from the SPI slave.
ommpy 0:d383e2dee0f7 125 */
ommpy 0:d383e2dee0f7 126 virtual int write(int value);
ommpy 0:d383e2dee0f7 127
ommpy 0:d383e2dee0f7 128 /** Write to the SPI Slave and obtain the response.
ommpy 0:d383e2dee0f7 129 *
ommpy 0:d383e2dee0f7 130 * The total number of bytes sent and received will be the maximum of
ommpy 0:d383e2dee0f7 131 * tx_length and rx_length. The bytes written will be padded with the
ommpy 0:d383e2dee0f7 132 * value 0xff.
ommpy 0:d383e2dee0f7 133 *
ommpy 0:d383e2dee0f7 134 * @param tx_buffer Pointer to the byte-array of data to write to the device.
ommpy 0:d383e2dee0f7 135 * @param tx_length Number of bytes to write, may be zero.
ommpy 0:d383e2dee0f7 136 * @param rx_buffer Pointer to the byte-array of data to read from the device.
ommpy 0:d383e2dee0f7 137 * @param rx_length Number of bytes to read, may be zero.
ommpy 0:d383e2dee0f7 138 * @return
ommpy 0:d383e2dee0f7 139 * The number of bytes written and read from the device. This is
ommpy 0:d383e2dee0f7 140 * maximum of tx_length and rx_length.
ommpy 0:d383e2dee0f7 141 */
ommpy 0:d383e2dee0f7 142 virtual int write(const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length);
ommpy 0:d383e2dee0f7 143
ommpy 0:d383e2dee0f7 144 /** Acquire exclusive access to this SPI bus.
ommpy 0:d383e2dee0f7 145 */
ommpy 0:d383e2dee0f7 146 virtual void lock(void);
ommpy 0:d383e2dee0f7 147
ommpy 0:d383e2dee0f7 148 /** Release exclusive access to this SPI bus.
ommpy 0:d383e2dee0f7 149 */
ommpy 0:d383e2dee0f7 150 virtual void unlock(void);
ommpy 0:d383e2dee0f7 151
ommpy 0:d383e2dee0f7 152 /** Set default write data.
ommpy 0:d383e2dee0f7 153 * SPI requires the master to send some data during a read operation.
ommpy 0:d383e2dee0f7 154 * Different devices may require different default byte values.
ommpy 0:d383e2dee0f7 155 * For example: A SD Card requires default bytes to be 0xFF.
ommpy 0:d383e2dee0f7 156 *
ommpy 0:d383e2dee0f7 157 * @param data Default character to be transmitted during a read operation.
ommpy 0:d383e2dee0f7 158 */
ommpy 0:d383e2dee0f7 159 void set_default_write_value(char data);
ommpy 0:d383e2dee0f7 160
ommpy 0:d383e2dee0f7 161 #if DEVICE_SPI_ASYNCH
ommpy 0:d383e2dee0f7 162
ommpy 0:d383e2dee0f7 163 /** Start non-blocking SPI transfer using 8bit buffers.
ommpy 0:d383e2dee0f7 164 *
ommpy 0:d383e2dee0f7 165 * This function locks the deep sleep until any event has occurred.
ommpy 0:d383e2dee0f7 166 *
ommpy 0:d383e2dee0f7 167 * @param tx_buffer The TX buffer with data to be transferred. If NULL is passed,
ommpy 0:d383e2dee0f7 168 * the default SPI value is sent.
ommpy 0:d383e2dee0f7 169 * @param tx_length The length of TX buffer in bytes.
ommpy 0:d383e2dee0f7 170 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
ommpy 0:d383e2dee0f7 171 * received data are ignored.
ommpy 0:d383e2dee0f7 172 * @param rx_length The length of RX buffer in bytes.
ommpy 0:d383e2dee0f7 173 * @param callback The event callback function.
ommpy 0:d383e2dee0f7 174 * @param event The event mask of events to modify. @see spi_api.h for SPI events.
ommpy 0:d383e2dee0f7 175 *
ommpy 0:d383e2dee0f7 176 * @return Operation result.
ommpy 0:d383e2dee0f7 177 * @retval 0 If the transfer has started.
ommpy 0:d383e2dee0f7 178 * @retval -1 If SPI peripheral is busy.
ommpy 0:d383e2dee0f7 179 */
ommpy 0:d383e2dee0f7 180 template<typename Type>
ommpy 0:d383e2dee0f7 181 int transfer(const Type *tx_buffer, int tx_length, Type *rx_buffer, int rx_length, const event_callback_t &callback, int event = SPI_EVENT_COMPLETE)
ommpy 0:d383e2dee0f7 182 {
ommpy 0:d383e2dee0f7 183 if (spi_active(&_spi)) {
ommpy 0:d383e2dee0f7 184 return queue_transfer(tx_buffer, tx_length, rx_buffer, rx_length, sizeof(Type) * 8, callback, event);
ommpy 0:d383e2dee0f7 185 }
ommpy 0:d383e2dee0f7 186 start_transfer(tx_buffer, tx_length, rx_buffer, rx_length, sizeof(Type) * 8, callback, event);
ommpy 0:d383e2dee0f7 187 return 0;
ommpy 0:d383e2dee0f7 188 }
ommpy 0:d383e2dee0f7 189
ommpy 0:d383e2dee0f7 190 /** Abort the on-going SPI transfer, and continue with transfers in the queue, if any.
ommpy 0:d383e2dee0f7 191 */
ommpy 0:d383e2dee0f7 192 void abort_transfer();
ommpy 0:d383e2dee0f7 193
ommpy 0:d383e2dee0f7 194 /** Clear the queue of transfers.
ommpy 0:d383e2dee0f7 195 */
ommpy 0:d383e2dee0f7 196 void clear_transfer_buffer();
ommpy 0:d383e2dee0f7 197
ommpy 0:d383e2dee0f7 198 /** Clear the queue of transfers and abort the on-going transfer.
ommpy 0:d383e2dee0f7 199 */
ommpy 0:d383e2dee0f7 200 void abort_all_transfers();
ommpy 0:d383e2dee0f7 201
ommpy 0:d383e2dee0f7 202 /** Configure DMA usage suggestion for non-blocking transfers.
ommpy 0:d383e2dee0f7 203 *
ommpy 0:d383e2dee0f7 204 * @param usage The usage DMA hint for peripheral.
ommpy 0:d383e2dee0f7 205 *
ommpy 0:d383e2dee0f7 206 * @return Result of the operation.
ommpy 0:d383e2dee0f7 207 * @retval 0 The usage was set.
ommpy 0:d383e2dee0f7 208 * @retval -1 Usage cannot be set as there is an ongoing transaction.
ommpy 0:d383e2dee0f7 209 */
ommpy 0:d383e2dee0f7 210 int set_dma_usage(DMAUsage usage);
ommpy 0:d383e2dee0f7 211
ommpy 0:d383e2dee0f7 212 #if !defined(DOXYGEN_ONLY)
ommpy 0:d383e2dee0f7 213 protected:
ommpy 0:d383e2dee0f7 214 /** SPI interrupt handler.
ommpy 0:d383e2dee0f7 215 */
ommpy 0:d383e2dee0f7 216 void irq_handler_asynch(void);
ommpy 0:d383e2dee0f7 217
ommpy 0:d383e2dee0f7 218 /** Start the transfer or put it on the queue.
ommpy 0:d383e2dee0f7 219 *
ommpy 0:d383e2dee0f7 220 * @param tx_buffer The TX buffer with data to be transferred. If NULL is passed,
ommpy 0:d383e2dee0f7 221 * the default SPI value is sent
ommpy 0:d383e2dee0f7 222 * @param tx_length The length of TX buffer in bytes.
ommpy 0:d383e2dee0f7 223 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
ommpy 0:d383e2dee0f7 224 * received data are ignored.
ommpy 0:d383e2dee0f7 225 * @param rx_length The length of RX buffer in bytes.
ommpy 0:d383e2dee0f7 226 * @param bit_width The buffers element width in bits.
ommpy 0:d383e2dee0f7 227 * @param callback The event callback function.
ommpy 0:d383e2dee0f7 228 * @param event The event mask of events to modify.
ommpy 0:d383e2dee0f7 229 *
ommpy 0:d383e2dee0f7 230 * @return Operation success.
ommpy 0:d383e2dee0f7 231 * @retval 0 A transfer was started or added to the queue.
ommpy 0:d383e2dee0f7 232 * @retval -1 Transfer can't be added because queue is full.
ommpy 0:d383e2dee0f7 233 */
ommpy 0:d383e2dee0f7 234 int transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t &callback, int event);
ommpy 0:d383e2dee0f7 235
ommpy 0:d383e2dee0f7 236 /** Put a transfer on the transfer queue.
ommpy 0:d383e2dee0f7 237 *
ommpy 0:d383e2dee0f7 238 * @param tx_buffer The TX buffer with data to be transferred. If NULL is passed,
ommpy 0:d383e2dee0f7 239 * the default SPI value is sent.
ommpy 0:d383e2dee0f7 240 * @param tx_length The length of TX buffer in bytes.
ommpy 0:d383e2dee0f7 241 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
ommpy 0:d383e2dee0f7 242 * received data are ignored.
ommpy 0:d383e2dee0f7 243 * @param rx_length The length of RX buffer in bytes.
ommpy 0:d383e2dee0f7 244 * @param bit_width The buffers element width in bits.
ommpy 0:d383e2dee0f7 245 * @param callback The event callback function.
ommpy 0:d383e2dee0f7 246 * @param event The event mask of events to modify.
ommpy 0:d383e2dee0f7 247 *
ommpy 0:d383e2dee0f7 248 * @return Operation success.
ommpy 0:d383e2dee0f7 249 * @retval 0 A transfer was added to the queue.
ommpy 0:d383e2dee0f7 250 * @retval -1 Transfer can't be added because queue is full.
ommpy 0:d383e2dee0f7 251 */
ommpy 0:d383e2dee0f7 252 int queue_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t &callback, int event);
ommpy 0:d383e2dee0f7 253
ommpy 0:d383e2dee0f7 254 /** Configure a callback, SPI peripheral, and initiate a new transfer.
ommpy 0:d383e2dee0f7 255 *
ommpy 0:d383e2dee0f7 256 * @param tx_buffer The TX buffer with data to be transferred. If NULL is passed,
ommpy 0:d383e2dee0f7 257 * the default SPI value is sent.
ommpy 0:d383e2dee0f7 258 * @param tx_length The length of TX buffer in bytes.
ommpy 0:d383e2dee0f7 259 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
ommpy 0:d383e2dee0f7 260 * received data are ignored.
ommpy 0:d383e2dee0f7 261 * @param rx_length The length of RX buffer in bytes.
ommpy 0:d383e2dee0f7 262 * @param bit_width The buffers element width.
ommpy 0:d383e2dee0f7 263 * @param callback The event callback function.
ommpy 0:d383e2dee0f7 264 * @param event The event mask of events to modify.
ommpy 0:d383e2dee0f7 265 */
ommpy 0:d383e2dee0f7 266 void start_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t &callback, int event);
ommpy 0:d383e2dee0f7 267
ommpy 0:d383e2dee0f7 268 private:
ommpy 0:d383e2dee0f7 269 /** Lock deep sleep only if it is not yet locked */
ommpy 0:d383e2dee0f7 270 void lock_deep_sleep();
ommpy 0:d383e2dee0f7 271
ommpy 0:d383e2dee0f7 272 /** Unlock deep sleep in case it is locked */
ommpy 0:d383e2dee0f7 273 void unlock_deep_sleep();
ommpy 0:d383e2dee0f7 274
ommpy 0:d383e2dee0f7 275
ommpy 0:d383e2dee0f7 276 #if TRANSACTION_QUEUE_SIZE_SPI
ommpy 0:d383e2dee0f7 277
ommpy 0:d383e2dee0f7 278 /** Start a new transaction.
ommpy 0:d383e2dee0f7 279 *
ommpy 0:d383e2dee0f7 280 * @param data Transaction data.
ommpy 0:d383e2dee0f7 281 */
ommpy 0:d383e2dee0f7 282 void start_transaction(transaction_t *data);
ommpy 0:d383e2dee0f7 283
ommpy 0:d383e2dee0f7 284 /** Dequeue a transaction and start the transfer if there was one pending.
ommpy 0:d383e2dee0f7 285 */
ommpy 0:d383e2dee0f7 286 void dequeue_transaction();
ommpy 0:d383e2dee0f7 287
ommpy 0:d383e2dee0f7 288 /* Queue of pending transfers */
ommpy 0:d383e2dee0f7 289 static CircularBuffer<Transaction<SPI>, TRANSACTION_QUEUE_SIZE_SPI> _transaction_buffer;
ommpy 0:d383e2dee0f7 290 #endif
ommpy 0:d383e2dee0f7 291
ommpy 0:d383e2dee0f7 292 #endif //!defined(DOXYGEN_ONLY)
ommpy 0:d383e2dee0f7 293
ommpy 0:d383e2dee0f7 294 #endif //DEVICE_SPI_ASYNCH
ommpy 0:d383e2dee0f7 295
ommpy 0:d383e2dee0f7 296 #if !defined(DOXYGEN_ONLY)
ommpy 0:d383e2dee0f7 297 protected:
ommpy 0:d383e2dee0f7 298 /* Internal SPI object identifying the resources */
ommpy 0:d383e2dee0f7 299 spi_t _spi;
ommpy 0:d383e2dee0f7 300
ommpy 0:d383e2dee0f7 301 #if DEVICE_SPI_ASYNCH
ommpy 0:d383e2dee0f7 302 /* Interrupt */
ommpy 0:d383e2dee0f7 303 CThunk<SPI> _irq;
ommpy 0:d383e2dee0f7 304 /* Interrupt handler callback */
ommpy 0:d383e2dee0f7 305 event_callback_t _callback;
ommpy 0:d383e2dee0f7 306 /* Current preferred DMA mode @see dma_api.h */
ommpy 0:d383e2dee0f7 307 DMAUsage _usage;
ommpy 0:d383e2dee0f7 308 /* Current sate of the sleep manager */
ommpy 0:d383e2dee0f7 309 bool _deep_sleep_locked;
ommpy 0:d383e2dee0f7 310 #endif
ommpy 0:d383e2dee0f7 311
ommpy 0:d383e2dee0f7 312 /* Take over the physical SPI and apply our settings (thread safe) */
ommpy 0:d383e2dee0f7 313 void aquire(void);
ommpy 0:d383e2dee0f7 314 /* Current user of the SPI */
ommpy 0:d383e2dee0f7 315 static SPI *_owner;
ommpy 0:d383e2dee0f7 316 /* Used by lock and unlock for thread safety */
ommpy 0:d383e2dee0f7 317 static SingletonPtr<PlatformMutex> _mutex;
ommpy 0:d383e2dee0f7 318 /* Size of the SPI frame */
ommpy 0:d383e2dee0f7 319 int _bits;
ommpy 0:d383e2dee0f7 320 /* Clock polairy and phase */
ommpy 0:d383e2dee0f7 321 int _mode;
ommpy 0:d383e2dee0f7 322 /* Clock frequency */
ommpy 0:d383e2dee0f7 323 int _hz;
ommpy 0:d383e2dee0f7 324 /* Default character used for NULL transfers */
ommpy 0:d383e2dee0f7 325 char _write_fill;
ommpy 0:d383e2dee0f7 326
ommpy 0:d383e2dee0f7 327 private:
ommpy 0:d383e2dee0f7 328 /** Private acquire function without locking/unlocking.
ommpy 0:d383e2dee0f7 329 * Implemented in order to avoid duplicate locking and boost performance.
ommpy 0:d383e2dee0f7 330 */
ommpy 0:d383e2dee0f7 331 void _acquire(void);
ommpy 0:d383e2dee0f7 332
ommpy 0:d383e2dee0f7 333 #endif //!defined(DOXYGEN_ONLY)
ommpy 0:d383e2dee0f7 334 };
ommpy 0:d383e2dee0f7 335
ommpy 0:d383e2dee0f7 336 } // namespace mbed
ommpy 0:d383e2dee0f7 337
ommpy 0:d383e2dee0f7 338 #endif
ommpy 0:d383e2dee0f7 339
ommpy 0:d383e2dee0f7 340 #endif