Руслан Бредун / Mbed 2 deprecated stm32-sensor-base2

test

Dependencies:   mbed Watchdog

Dependents:   STM32-MC_node

mbed/TARGET_NUCLEO_F030R8/system_stm32f0xx.h@0:d383e2dee0f7, 2020-07-06 (annotated)

Committer:
ommpy
Date:
Mon Jul 06 17:18:59 2020 +0530
Revision:
0:d383e2dee0f7
first commit

Who changed what in which revision?

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ommpy 0:d383e2dee0f7 1 /**
ommpy 0:d383e2dee0f7 2 ******************************************************************************
ommpy 0:d383e2dee0f7 3 * @file system_stm32f0xx.h
ommpy 0:d383e2dee0f7 4 * @author MCD Application Team
ommpy 0:d383e2dee0f7 5 * @version V2.2.2
ommpy 0:d383e2dee0f7 6 * @date 26-June-2015
ommpy 0:d383e2dee0f7 7 * @brief CMSIS Cortex-M0 Device System Source File for STM32F0xx devices.
ommpy 0:d383e2dee0f7 8 ******************************************************************************
ommpy 0:d383e2dee0f7 9 * @attention
ommpy 0:d383e2dee0f7 10 *
ommpy 0:d383e2dee0f7 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
ommpy 0:d383e2dee0f7 12 *
ommpy 0:d383e2dee0f7 13 * Redistribution and use in source and binary forms, with or without modification,
ommpy 0:d383e2dee0f7 14 * are permitted provided that the following conditions are met:
ommpy 0:d383e2dee0f7 15 * 1. Redistributions of source code must retain the above copyright notice,
ommpy 0:d383e2dee0f7 16 * this list of conditions and the following disclaimer.
ommpy 0:d383e2dee0f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
ommpy 0:d383e2dee0f7 18 * this list of conditions and the following disclaimer in the documentation
ommpy 0:d383e2dee0f7 19 * and/or other materials provided with the distribution.
ommpy 0:d383e2dee0f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
ommpy 0:d383e2dee0f7 21 * may be used to endorse or promote products derived from this software
ommpy 0:d383e2dee0f7 22 * without specific prior written permission.
ommpy 0:d383e2dee0f7 23 *
ommpy 0:d383e2dee0f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
ommpy 0:d383e2dee0f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
ommpy 0:d383e2dee0f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
ommpy 0:d383e2dee0f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
ommpy 0:d383e2dee0f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
ommpy 0:d383e2dee0f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
ommpy 0:d383e2dee0f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
ommpy 0:d383e2dee0f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
ommpy 0:d383e2dee0f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
ommpy 0:d383e2dee0f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
ommpy 0:d383e2dee0f7 34 *
ommpy 0:d383e2dee0f7 35 ******************************************************************************
ommpy 0:d383e2dee0f7 36 */
ommpy 0:d383e2dee0f7 37
ommpy 0:d383e2dee0f7 38 /** @addtogroup CMSIS
ommpy 0:d383e2dee0f7 39 * @{
ommpy 0:d383e2dee0f7 40 */
ommpy 0:d383e2dee0f7 41
ommpy 0:d383e2dee0f7 42 /** @addtogroup stm32f0xx_system
ommpy 0:d383e2dee0f7 43 * @{
ommpy 0:d383e2dee0f7 44 */
ommpy 0:d383e2dee0f7 45
ommpy 0:d383e2dee0f7 46 /**
ommpy 0:d383e2dee0f7 47 * @brief Define to prevent recursive inclusion
ommpy 0:d383e2dee0f7 48 */
ommpy 0:d383e2dee0f7 49 #ifndef __SYSTEM_STM32F0XX_H
ommpy 0:d383e2dee0f7 50 #define __SYSTEM_STM32F0XX_H
ommpy 0:d383e2dee0f7 51
ommpy 0:d383e2dee0f7 52 #ifdef __cplusplus
ommpy 0:d383e2dee0f7 53 extern "C" {
ommpy 0:d383e2dee0f7 54 #endif
ommpy 0:d383e2dee0f7 55
ommpy 0:d383e2dee0f7 56 /** @addtogroup STM32F0xx_System_Includes
ommpy 0:d383e2dee0f7 57 * @{
ommpy 0:d383e2dee0f7 58 */
ommpy 0:d383e2dee0f7 59
ommpy 0:d383e2dee0f7 60 /**
ommpy 0:d383e2dee0f7 61 * @}
ommpy 0:d383e2dee0f7 62 */
ommpy 0:d383e2dee0f7 63
ommpy 0:d383e2dee0f7 64
ommpy 0:d383e2dee0f7 65 /** @addtogroup STM32F0xx_System_Exported_types
ommpy 0:d383e2dee0f7 66 * @{
ommpy 0:d383e2dee0f7 67 */
ommpy 0:d383e2dee0f7 68 /* This variable is updated in three ways:
ommpy 0:d383e2dee0f7 69 1) by calling CMSIS function SystemCoreClockUpdate()
ommpy 0:d383e2dee0f7 70 3) by calling HAL API function HAL_RCC_GetHCLKFreq()
ommpy 0:d383e2dee0f7 71 3) by calling HAL API function HAL_RCC_ClockConfig()
ommpy 0:d383e2dee0f7 72 Note: If you use this function to configure the system clock; then there
ommpy 0:d383e2dee0f7 73 is no need to call the 2 first functions listed above, since SystemCoreClock
ommpy 0:d383e2dee0f7 74 variable is updated automatically.
ommpy 0:d383e2dee0f7 75 */
ommpy 0:d383e2dee0f7 76 extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
ommpy 0:d383e2dee0f7 77
ommpy 0:d383e2dee0f7 78 /**
ommpy 0:d383e2dee0f7 79 * @}
ommpy 0:d383e2dee0f7 80 */
ommpy 0:d383e2dee0f7 81
ommpy 0:d383e2dee0f7 82 /** @addtogroup STM32F0xx_System_Exported_Constants
ommpy 0:d383e2dee0f7 83 * @{
ommpy 0:d383e2dee0f7 84 */
ommpy 0:d383e2dee0f7 85
ommpy 0:d383e2dee0f7 86 /**
ommpy 0:d383e2dee0f7 87 * @}
ommpy 0:d383e2dee0f7 88 */
ommpy 0:d383e2dee0f7 89
ommpy 0:d383e2dee0f7 90 /** @addtogroup STM32F0xx_System_Exported_Macros
ommpy 0:d383e2dee0f7 91 * @{
ommpy 0:d383e2dee0f7 92 */
ommpy 0:d383e2dee0f7 93
ommpy 0:d383e2dee0f7 94 /**
ommpy 0:d383e2dee0f7 95 * @}
ommpy 0:d383e2dee0f7 96 */
ommpy 0:d383e2dee0f7 97
ommpy 0:d383e2dee0f7 98 /** @addtogroup STM32F0xx_System_Exported_Functions
ommpy 0:d383e2dee0f7 99 * @{
ommpy 0:d383e2dee0f7 100 */
ommpy 0:d383e2dee0f7 101
ommpy 0:d383e2dee0f7 102 extern void SystemInit(void);
ommpy 0:d383e2dee0f7 103 extern void SystemCoreClockUpdate(void);
ommpy 0:d383e2dee0f7 104 extern void SetSysClock(void);
ommpy 0:d383e2dee0f7 105
ommpy 0:d383e2dee0f7 106 /**
ommpy 0:d383e2dee0f7 107 * @}
ommpy 0:d383e2dee0f7 108 */
ommpy 0:d383e2dee0f7 109
ommpy 0:d383e2dee0f7 110 #ifdef __cplusplus
ommpy 0:d383e2dee0f7 111 }
ommpy 0:d383e2dee0f7 112 #endif
ommpy 0:d383e2dee0f7 113
ommpy 0:d383e2dee0f7 114 #endif /*__SYSTEM_STM32F0XX_H */
ommpy 0:d383e2dee0f7 115
ommpy 0:d383e2dee0f7 116 /**
ommpy 0:d383e2dee0f7 117 * @}
ommpy 0:d383e2dee0f7 118 */
ommpy 0:d383e2dee0f7 119
ommpy 0:d383e2dee0f7 120 /**
ommpy 0:d383e2dee0f7 121 * @}
ommpy 0:d383e2dee0f7 122 */
ommpy 0:d383e2dee0f7 123 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/