Руслан Бредун / Mbed 2 deprecated stm32-sensor-base2

test

Dependencies:   mbed Watchdog

Dependents:   STM32-MC_node

mbed/hal/qspi_api.h@11:32eeb052cda5, 2020-08-26 (annotated)

Committer:
ommpy
Date:
Wed Aug 26 14:26:27 2020 +0530
Revision:
11:32eeb052cda5
Parent:
0:d383e2dee0f7 
added temp sensor in code

Who changed what in which revision?

UserRevisionLine numberNew contents of line
ommpy 0:d383e2dee0f7 1
ommpy 0:d383e2dee0f7 2 /** \addtogroup hal */
ommpy 0:d383e2dee0f7 3 /** @{*/
ommpy 0:d383e2dee0f7 4 /* mbed Microcontroller Library
ommpy 0:d383e2dee0f7 5 * Copyright (c) 2017 ARM Limited
ommpy 0:d383e2dee0f7 6 * SPDX-License-Identifier: Apache-2.0
ommpy 0:d383e2dee0f7 7 *
ommpy 0:d383e2dee0f7 8 * Licensed under the Apache License, Version 2.0 (the "License");
ommpy 0:d383e2dee0f7 9 * you may not use this file except in compliance with the License.
ommpy 0:d383e2dee0f7 10 * You may obtain a copy of the License at
ommpy 0:d383e2dee0f7 11 *
ommpy 0:d383e2dee0f7 12 * http://www.apache.org/licenses/LICENSE-2.0
ommpy 0:d383e2dee0f7 13 *
ommpy 0:d383e2dee0f7 14 * Unless required by applicable law or agreed to in writing, software
ommpy 0:d383e2dee0f7 15 * distributed under the License is distributed on an "AS IS" BASIS,
ommpy 0:d383e2dee0f7 16 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
ommpy 0:d383e2dee0f7 17 * See the License for the specific language governing permissions and
ommpy 0:d383e2dee0f7 18 * limitations under the License.
ommpy 0:d383e2dee0f7 19 */
ommpy 0:d383e2dee0f7 20 #ifndef MBED_QSPI_API_H
ommpy 0:d383e2dee0f7 21 #define MBED_QSPI_API_H
ommpy 0:d383e2dee0f7 22
ommpy 0:d383e2dee0f7 23 #include "device.h"
ommpy 0:d383e2dee0f7 24 #include <stdbool.h>
ommpy 0:d383e2dee0f7 25
ommpy 0:d383e2dee0f7 26 #if DEVICE_QSPI
ommpy 0:d383e2dee0f7 27
ommpy 0:d383e2dee0f7 28 #ifdef __cplusplus
ommpy 0:d383e2dee0f7 29 extern "C" {
ommpy 0:d383e2dee0f7 30 #endif
ommpy 0:d383e2dee0f7 31
ommpy 0:d383e2dee0f7 32 /**
ommpy 0:d383e2dee0f7 33 * \defgroup hal_qspi QSPI HAL
ommpy 0:d383e2dee0f7 34 * @{
ommpy 0:d383e2dee0f7 35 */
ommpy 0:d383e2dee0f7 36
ommpy 0:d383e2dee0f7 37 /** QSPI HAL object
ommpy 0:d383e2dee0f7 38 */
ommpy 0:d383e2dee0f7 39 typedef struct qspi_s qspi_t;
ommpy 0:d383e2dee0f7 40
ommpy 0:d383e2dee0f7 41 /** QSPI Bus width
ommpy 0:d383e2dee0f7 42 *
ommpy 0:d383e2dee0f7 43 * Some parts of commands provide variable bus width
ommpy 0:d383e2dee0f7 44 */
ommpy 0:d383e2dee0f7 45 typedef enum qspi_bus_width {
ommpy 0:d383e2dee0f7 46 QSPI_CFG_BUS_SINGLE,
ommpy 0:d383e2dee0f7 47 QSPI_CFG_BUS_DUAL,
ommpy 0:d383e2dee0f7 48 QSPI_CFG_BUS_QUAD,
ommpy 0:d383e2dee0f7 49 } qspi_bus_width_t;
ommpy 0:d383e2dee0f7 50
ommpy 0:d383e2dee0f7 51 /** Address size in bits
ommpy 0:d383e2dee0f7 52 */
ommpy 0:d383e2dee0f7 53 typedef enum qspi_address_size {
ommpy 0:d383e2dee0f7 54 QSPI_CFG_ADDR_SIZE_8,
ommpy 0:d383e2dee0f7 55 QSPI_CFG_ADDR_SIZE_16,
ommpy 0:d383e2dee0f7 56 QSPI_CFG_ADDR_SIZE_24,
ommpy 0:d383e2dee0f7 57 QSPI_CFG_ADDR_SIZE_32,
ommpy 0:d383e2dee0f7 58 } qspi_address_size_t;
ommpy 0:d383e2dee0f7 59
ommpy 0:d383e2dee0f7 60 /** Alternative size in bits
ommpy 0:d383e2dee0f7 61 */
ommpy 0:d383e2dee0f7 62 typedef enum qspi_alt_size {
ommpy 0:d383e2dee0f7 63 QSPI_CFG_ALT_SIZE_8,
ommpy 0:d383e2dee0f7 64 QSPI_CFG_ALT_SIZE_16,
ommpy 0:d383e2dee0f7 65 QSPI_CFG_ALT_SIZE_24,
ommpy 0:d383e2dee0f7 66 QSPI_CFG_ALT_SIZE_32,
ommpy 0:d383e2dee0f7 67 } qspi_alt_size_t;
ommpy 0:d383e2dee0f7 68
ommpy 0:d383e2dee0f7 69 /** QSPI command
ommpy 0:d383e2dee0f7 70 *
ommpy 0:d383e2dee0f7 71 * Defines a frame format. It consists of instruction, address, alternative, dummy count and data
ommpy 0:d383e2dee0f7 72 */
ommpy 0:d383e2dee0f7 73 typedef struct qspi_command {
ommpy 0:d383e2dee0f7 74 struct {
ommpy 0:d383e2dee0f7 75 qspi_bus_width_t bus_width; /**< Bus width for the instruction >*/
ommpy 0:d383e2dee0f7 76 uint8_t value; /**< Instruction value >*/
ommpy 0:d383e2dee0f7 77 bool disabled; /**< Instruction phase skipped if disabled is set to true >*/
ommpy 0:d383e2dee0f7 78 } instruction;
ommpy 0:d383e2dee0f7 79 struct {
ommpy 0:d383e2dee0f7 80 qspi_bus_width_t bus_width; /**< Bus width for the address >*/
ommpy 0:d383e2dee0f7 81 qspi_address_size_t size; /**< Address size >*/
ommpy 0:d383e2dee0f7 82 uint32_t value; /**< Address value >*/
ommpy 0:d383e2dee0f7 83 bool disabled; /**< Address phase skipped if disabled is set to true >*/
ommpy 0:d383e2dee0f7 84 } address;
ommpy 0:d383e2dee0f7 85 struct {
ommpy 0:d383e2dee0f7 86 qspi_bus_width_t bus_width; /**< Bus width for alternative >*/
ommpy 0:d383e2dee0f7 87 qspi_alt_size_t size; /**< Alternative size >*/
ommpy 0:d383e2dee0f7 88 uint32_t value; /**< Alternative value >*/
ommpy 0:d383e2dee0f7 89 bool disabled; /**< Alternative phase skipped if disabled is set to true >*/
ommpy 0:d383e2dee0f7 90 } alt;
ommpy 0:d383e2dee0f7 91 uint8_t dummy_count; /**< Dummy cycles count >*/
ommpy 0:d383e2dee0f7 92 struct {
ommpy 0:d383e2dee0f7 93 qspi_bus_width_t bus_width; /**< Bus width for data >*/
ommpy 0:d383e2dee0f7 94 } data;
ommpy 0:d383e2dee0f7 95 } qspi_command_t;
ommpy 0:d383e2dee0f7 96
ommpy 0:d383e2dee0f7 97 /** QSPI return status
ommpy 0:d383e2dee0f7 98 */
ommpy 0:d383e2dee0f7 99 typedef enum qspi_status {
ommpy 0:d383e2dee0f7 100 QSPI_STATUS_ERROR = -1, /**< Generic error >*/
ommpy 0:d383e2dee0f7 101 QSPI_STATUS_INVALID_PARAMETER = -2, /**< The parameter is invalid >*/
ommpy 0:d383e2dee0f7 102 QSPI_STATUS_OK = 0, /**< Function executed sucessfully >*/
ommpy 0:d383e2dee0f7 103 } qspi_status_t;
ommpy 0:d383e2dee0f7 104
ommpy 0:d383e2dee0f7 105 /** Initialize QSPI peripheral.
ommpy 0:d383e2dee0f7 106 *
ommpy 0:d383e2dee0f7 107 * It should initialize QSPI pins (io0-io3, sclk and ssel), set frequency, clock polarity and phase mode. The clock for the peripheral should be enabled
ommpy 0:d383e2dee0f7 108 *
ommpy 0:d383e2dee0f7 109 * @param obj QSPI object
ommpy 0:d383e2dee0f7 110 * @param io0 Data pin 0
ommpy 0:d383e2dee0f7 111 * @param io1 Data pin 1
ommpy 0:d383e2dee0f7 112 * @param io2 Data pin 2
ommpy 0:d383e2dee0f7 113 * @param io3 Data pin 3
ommpy 0:d383e2dee0f7 114 * @param sclk The clock pin
ommpy 0:d383e2dee0f7 115 * @param ssel The chip select pin
ommpy 0:d383e2dee0f7 116 * @param hz The bus frequency
ommpy 0:d383e2dee0f7 117 * @param mode Clock polarity and phase mode (0 - 3)
ommpy 0:d383e2dee0f7 118 * @return QSPI_STATUS_OK if initialisation successfully executed
ommpy 0:d383e2dee0f7 119 QSPI_STATUS_INVALID_PARAMETER if invalid parameter found
ommpy 0:d383e2dee0f7 120 QSPI_STATUS_ERROR otherwise
ommpy 0:d383e2dee0f7 121 */
ommpy 0:d383e2dee0f7 122 qspi_status_t qspi_init(qspi_t *obj, PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, PinName ssel, uint32_t hz, uint8_t mode);
ommpy 0:d383e2dee0f7 123
ommpy 0:d383e2dee0f7 124 /** Deinitilize QSPI peripheral
ommpy 0:d383e2dee0f7 125 *
ommpy 0:d383e2dee0f7 126 * It should release pins that are associated with the QSPI object, and disable clocks for QSPI peripheral module that was associated with the object
ommpy 0:d383e2dee0f7 127 *
ommpy 0:d383e2dee0f7 128 * @param obj QSPI object
ommpy 0:d383e2dee0f7 129 * @return QSPI_STATUS_OK if deinitialisation successfully executed
ommpy 0:d383e2dee0f7 130 QSPI_STATUS_INVALID_PARAMETER if invalid parameter found
ommpy 0:d383e2dee0f7 131 QSPI_STATUS_ERROR otherwise
ommpy 0:d383e2dee0f7 132 */
ommpy 0:d383e2dee0f7 133 qspi_status_t qspi_free(qspi_t *obj);
ommpy 0:d383e2dee0f7 134
ommpy 0:d383e2dee0f7 135 /** Set the QSPI baud rate
ommpy 0:d383e2dee0f7 136 *
ommpy 0:d383e2dee0f7 137 * Actual frequency may differ from the desired frequency due to available dividers and the bus clock
ommpy 0:d383e2dee0f7 138 * Configures the QSPI peripheral's baud rate
ommpy 0:d383e2dee0f7 139 * @param obj The SPI object to configure
ommpy 0:d383e2dee0f7 140 * @param hz The baud rate in Hz
ommpy 0:d383e2dee0f7 141 * @return QSPI_STATUS_OK if frequency was set
ommpy 0:d383e2dee0f7 142 QSPI_STATUS_INVALID_PARAMETER if invalid parameter found
ommpy 0:d383e2dee0f7 143 QSPI_STATUS_ERROR otherwise
ommpy 0:d383e2dee0f7 144 */
ommpy 0:d383e2dee0f7 145 qspi_status_t qspi_frequency(qspi_t *obj, int hz);
ommpy 0:d383e2dee0f7 146
ommpy 0:d383e2dee0f7 147 /** Send a command and block of data
ommpy 0:d383e2dee0f7 148 *
ommpy 0:d383e2dee0f7 149 * @param obj QSPI object
ommpy 0:d383e2dee0f7 150 * @param command QSPI command
ommpy 0:d383e2dee0f7 151 * @param data TX buffer
ommpy 0:d383e2dee0f7 152 * @param[in,out] length in - TX buffer length in bytes, out - number of bytes written
ommpy 0:d383e2dee0f7 153 * @return QSPI_STATUS_OK if the data has been succesfully sent
ommpy 0:d383e2dee0f7 154 QSPI_STATUS_INVALID_PARAMETER if invalid parameter found
ommpy 0:d383e2dee0f7 155 QSPI_STATUS_ERROR otherwise
ommpy 0:d383e2dee0f7 156 */
ommpy 0:d383e2dee0f7 157 qspi_status_t qspi_write(qspi_t *obj, const qspi_command_t *command, const void *data, size_t *length);
ommpy 0:d383e2dee0f7 158
ommpy 0:d383e2dee0f7 159 /** Send a command (and optionally data) and get the response. Can be used to send/receive device specific commands
ommpy 0:d383e2dee0f7 160 *
ommpy 0:d383e2dee0f7 161 * @param obj QSPI object
ommpy 0:d383e2dee0f7 162 * @param command QSPI command
ommpy 0:d383e2dee0f7 163 * @param tx_data TX buffer
ommpy 0:d383e2dee0f7 164 * @param tx_size TX buffer length in bytes
ommpy 0:d383e2dee0f7 165 * @param rx_data RX buffer
ommpy 0:d383e2dee0f7 166 * @param rx_size RX buffer length in bytes
ommpy 0:d383e2dee0f7 167 * @return QSPI_STATUS_OK if the data has been succesfully sent
ommpy 0:d383e2dee0f7 168 QSPI_STATUS_INVALID_PARAMETER if invalid parameter found
ommpy 0:d383e2dee0f7 169 QSPI_STATUS_ERROR otherwise
ommpy 0:d383e2dee0f7 170 */
ommpy 0:d383e2dee0f7 171 qspi_status_t qspi_command_transfer(qspi_t *obj, const qspi_command_t *command, const void *tx_data, size_t tx_size, void *rx_data, size_t rx_size);
ommpy 0:d383e2dee0f7 172
ommpy 0:d383e2dee0f7 173 /** Receive a command and block of data
ommpy 0:d383e2dee0f7 174 *
ommpy 0:d383e2dee0f7 175 * @param obj QSPI object
ommpy 0:d383e2dee0f7 176 * @param command QSPI command
ommpy 0:d383e2dee0f7 177 * @param data RX buffer
ommpy 0:d383e2dee0f7 178 * @param[in,out] length in - RX buffer length in bytes, out - number of bytes read
ommpy 0:d383e2dee0f7 179 * @return QSPI_STATUS_OK if data has been succesfully received
ommpy 0:d383e2dee0f7 180 QSPI_STATUS_INVALID_PARAMETER if invalid parameter found
ommpy 0:d383e2dee0f7 181 QSPI_STATUS_ERROR otherwise
ommpy 0:d383e2dee0f7 182 */
ommpy 0:d383e2dee0f7 183 qspi_status_t qspi_read(qspi_t *obj, const qspi_command_t *command, void *data, size_t *length);
ommpy 0:d383e2dee0f7 184
ommpy 0:d383e2dee0f7 185 /**@}*/
ommpy 0:d383e2dee0f7 186
ommpy 0:d383e2dee0f7 187 #ifdef __cplusplus
ommpy 0:d383e2dee0f7 188 }
ommpy 0:d383e2dee0f7 189 #endif
ommpy 0:d383e2dee0f7 190
ommpy 0:d383e2dee0f7 191 #endif
ommpy 0:d383e2dee0f7 192
ommpy 0:d383e2dee0f7 193 #endif
ommpy 0:d383e2dee0f7 194
ommpy 0:d383e2dee0f7 195 /** @}*/