Diff: OV6620reg.h

Revision:

2:90b79650f69d

Parent:

1:e216fd4e8d9c

--- a/OV6620reg.h	Mon Nov 21 10:04:38 2016 +0000
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,29 +0,0 @@
-#define CAMERA_I2C_FREQ 40000
-#define CAMERA_I2C_READ_ADDR 0x43
-#define CAMERA_I2C_WRITE_ADDR 0x42
-#define REG_GAIN        0x00    /* Gain lower 8 bits (rest in vref) */
-#define REG_BLUE        0x01    /* blue gain */
-#define REG_RED         0x02    /* red gain */
-#define REG_SAT         0x03    /* Pieces of GAIN, VSTART, VSTOP */
-#define COM_1        0x04    /* Control 1 */
-#define REG_CONTRAST        0x05    /* U/B Average level */
-#define REG_BRIGHTNESS       0x06    /* Y/Gb Average level */
-#define REG_SHARPNESS       0x07    /* AEC MS 5 bits */
-#define REG_AEC     0x10    /* Soft sleep mode */
-#define REG_AWB_B        0x0c    /* Control 3 */
-#define REG_AWB_R        0x0D    /* Control 3 */
-#define COM_R        0x0e    /* All "reserved" */
-#define COM_S       0x0f    /* Control 6 */
-#define CLKRC       0x11    /* Clocl control */
-#define COM_A       0x12    /* Mask for internal clock scale */
-#define COM_B      0x13    /* Register reset */
-#define COM_C   0x14
-#define COM_D    0x15
-#define HREFST    0x17    /* CIF format */
-#define PSHIFT   0x1B    /* QVGA format */
-#define COM_E   0x20    /* QCIF format */
-#define AEW        0x24    /* bits 0 and 2 - RGB format */
-#define AEB        0x25    /* YUV */
-#define COM_H      0X28    /* Bayer format */
-#define COM_K     0x38    /* "Processed bayer" */
-#define COM_L        0x39    /* Control 8 */