Russell Shomberg / Mbed 2 deprecated shomberg_hw_8

Use accelerometer to interrupt.

Dependencies:   mbed SDFileSystem

Fork of shomberg_hw_7 by Russell Shomberg

MMA8452Q.h@23:61d87ea09c26, 2018-11-07 (annotated)

Committer:
rshomberg
Date:
Wed Nov 07 15:29:47 2018 +0000
Revision:
23:61d87ea09c26
Parent:
21:c95c6b9e9377
Child:
24:9264fbd225d0
working code without accel functionality

Who changed what in which revision?

UserRevisionLine numberNew contents of line
rshomberg 21:c95c6b9e9377 1 // Library for our MMA8452Q 3-axis accelerometer
rshomberg 21:c95c6b9e9377 2 // Based on the MMA8452Q Arduino Library by Jim Lindblom (SparkFun Electronics)
rshomberg 21:c95c6b9e9377 3
rshomberg 21:c95c6b9e9377 4 #ifndef MMA8452Q_H
rshomberg 21:c95c6b9e9377 5 #define MMA8452Q_H
rshomberg 21:c95c6b9e9377 6
rshomberg 21:c95c6b9e9377 7 #include "mbed.h"
rshomberg 21:c95c6b9e9377 8
rshomberg 23:61d87ea09c26 9 // PIN Configuration
rshomberg 23:61d87ea09c26 10 #define PIN_ACCEL_SDA p28
rshomberg 23:61d87ea09c26 11 #define PIN_ACCEL_SCL p27
rshomberg 23:61d87ea09c26 12 #define PIN_ACCEL_I1 p26
rshomberg 23:61d87ea09c26 13
rshomberg 23:61d87ea09c26 14
rshomberg 21:c95c6b9e9377 15 // Register definitions
rshomberg 21:c95c6b9e9377 16 #define REG_STATUS 0x00
rshomberg 21:c95c6b9e9377 17 #define OUT_X_MSB 0x01
rshomberg 21:c95c6b9e9377 18 #define OUT_X_LSB 0x02
rshomberg 21:c95c6b9e9377 19 #define OUT_Y_MSB 0x03
rshomberg 21:c95c6b9e9377 20 #define OUT_Y_LSB 0x04
rshomberg 21:c95c6b9e9377 21 #define OUT_Z_MSB 0x05
rshomberg 21:c95c6b9e9377 22 #define OUT_Z_LSB 0x06
rshomberg 21:c95c6b9e9377 23 #define REG_WHO_AM_I 0x0D
rshomberg 21:c95c6b9e9377 24 #define REG_XYZ_DATA_CFG 0x0E
rshomberg 21:c95c6b9e9377 25 #define REG_CTRL_REG1 0x2A
rshomberg 23:61d87ea09c26 26 #define REG_CTRL_REG4 0x2D
rshomberg 23:61d87ea09c26 27 #define REG_CTRL_REG5 0x2E
rshomberg 23:61d87ea09c26 28 #define REG_TRANSIENT_CFG 0x1D
rshomberg 23:61d87ea09c26 29 #define REG_TRANSIENT_SRC 0x1E
rshomberg 23:61d87ea09c26 30 #define REG_TRANSIENT_THS 0x1F
rshomberg 23:61d87ea09c26 31 #define REG_TRANSIENT_COUNT 0x20
rshomberg 23:61d87ea09c26 32 #define INTERRUPT_PIN p17
rshomberg 21:c95c6b9e9377 33
rshomberg 21:c95c6b9e9377 34 // WHO_AM_I check
rshomberg 21:c95c6b9e9377 35 #define FACTORY_ID 0x2A
rshomberg 21:c95c6b9e9377 36
rshomberg 21:c95c6b9e9377 37 // Scale definitions
rshomberg 21:c95c6b9e9377 38 #define SCALE_2G 2
rshomberg 21:c95c6b9e9377 39 #define SCALE_4G 4
rshomberg 21:c95c6b9e9377 40 #define SCALE_8G 8
rshomberg 21:c95c6b9e9377 41
rshomberg 21:c95c6b9e9377 42 // Data rates
rshomberg 21:c95c6b9e9377 43 #define ODR_800HZ 0
rshomberg 21:c95c6b9e9377 44 #define ODR_400HZ 1
rshomberg 21:c95c6b9e9377 45 #define ODR_200HZ 2
rshomberg 21:c95c6b9e9377 46 #define ODR_100HZ 3
rshomberg 21:c95c6b9e9377 47 #define ODR_50HZ 4
rshomberg 21:c95c6b9e9377 48 #define ODR_12_5HZ 5
rshomberg 21:c95c6b9e9377 49 #define ODR_6_25HZ 6
rshomberg 21:c95c6b9e9377 50 #define ODR_1_56HZ 7
rshomberg 21:c95c6b9e9377 51
rshomberg 21:c95c6b9e9377 52 // Init values
rshomberg 21:c95c6b9e9377 53 #define DEFAULT_FSR SCALE_2G
rshomberg 21:c95c6b9e9377 54 #define DEFAULT_ODR ODR_800HZ
rshomberg 21:c95c6b9e9377 55
rshomberg 21:c95c6b9e9377 56
rshomberg 21:c95c6b9e9377 57 // Class declaration
rshomberg 21:c95c6b9e9377 58 class MMA8452Q
rshomberg 21:c95c6b9e9377 59 {
rshomberg 21:c95c6b9e9377 60 public:
rshomberg 21:c95c6b9e9377 61 MMA8452Q(PinName sda, PinName scl, int addr);
rshomberg 21:c95c6b9e9377 62 ~MMA8452Q();
rshomberg 21:c95c6b9e9377 63 bool init();
rshomberg 21:c95c6b9e9377 64 uint8_t available();
rshomberg 21:c95c6b9e9377 65 void setScale(uint8_t fsr);
rshomberg 21:c95c6b9e9377 66 void setODR(uint8_t odr);
rshomberg 21:c95c6b9e9377 67 void standby();
rshomberg 21:c95c6b9e9377 68 void active();
rshomberg 21:c95c6b9e9377 69 float readX();
rshomberg 21:c95c6b9e9377 70 float readY();
rshomberg 21:c95c6b9e9377 71 float readZ();
rshomberg 21:c95c6b9e9377 72 uint8_t readRegister(uint8_t reg);
rshomberg 21:c95c6b9e9377 73 void writeRegister(uint8_t reg, uint8_t data);
rshomberg 23:61d87ea09c26 74 void setInterrupt();
rshomberg 21:c95c6b9e9377 75
rshomberg 21:c95c6b9e9377 76 private:
rshomberg 21:c95c6b9e9377 77 I2C m_i2c;
rshomberg 21:c95c6b9e9377 78 int m_addr;
rshomberg 21:c95c6b9e9377 79 int scale;
rshomberg 21:c95c6b9e9377 80 };
rshomberg 21:c95c6b9e9377 81
rshomberg 21:c95c6b9e9377 82 #endif