Robert Lopez / CMSIS5

Aded CMSIS5 DSP and NN folder. Needs some work

DSP/source/TransformFunctions/arm_bitreversal2.S@0:eedb7d567a5d, 2018-04-12 (annotated)

Committer:
robert_lp
Date:
Thu Apr 12 01:31:58 2018 +0000
Revision:
0:eedb7d567a5d
CMSIS5 Library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
robert_lp 0:eedb7d567a5d 1 ;/* ----------------------------------------------------------------------
robert_lp 0:eedb7d567a5d 2 ; * Project: CMSIS DSP Library
robert_lp 0:eedb7d567a5d 3 ; * Title: arm_bitreversal2.S
robert_lp 0:eedb7d567a5d 4 ; * Description: arm_bitreversal_32 function done in assembly for maximum speed.
robert_lp 0:eedb7d567a5d 5 ; * Called after doing an fft to reorder the output.
robert_lp 0:eedb7d567a5d 6 ; * The function is loop unrolled by 2. arm_bitreversal_16 as well.
robert_lp 0:eedb7d567a5d 7 ; *
robert_lp 0:eedb7d567a5d 8 ; * $Date: 27. January 2017
robert_lp 0:eedb7d567a5d 9 ; * $Revision: V.1.5.1
robert_lp 0:eedb7d567a5d 10 ; *
robert_lp 0:eedb7d567a5d 11 ; * Target Processor: Cortex-M cores
robert_lp 0:eedb7d567a5d 12 ; * -------------------------------------------------------------------- */
robert_lp 0:eedb7d567a5d 13 ;/*
robert_lp 0:eedb7d567a5d 14 ; * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
robert_lp 0:eedb7d567a5d 15 ; *
robert_lp 0:eedb7d567a5d 16 ; * SPDX-License-Identifier: Apache-2.0
robert_lp 0:eedb7d567a5d 17 ; *
robert_lp 0:eedb7d567a5d 18 ; * Licensed under the Apache License, Version 2.0 (the License); you may
robert_lp 0:eedb7d567a5d 19 ; * not use this file except in compliance with the License.
robert_lp 0:eedb7d567a5d 20 ; * You may obtain a copy of the License at
robert_lp 0:eedb7d567a5d 21 ; *
robert_lp 0:eedb7d567a5d 22 ; * www.apache.org/licenses/LICENSE-2.0
robert_lp 0:eedb7d567a5d 23 ; *
robert_lp 0:eedb7d567a5d 24 ; * Unless required by applicable law or agreed to in writing, software
robert_lp 0:eedb7d567a5d 25 ; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
robert_lp 0:eedb7d567a5d 26 ; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
robert_lp 0:eedb7d567a5d 27 ; * See the License for the specific language governing permissions and
robert_lp 0:eedb7d567a5d 28 ; * limitations under the License.
robert_lp 0:eedb7d567a5d 29 ; */
robert_lp 0:eedb7d567a5d 30
robert_lp 0:eedb7d567a5d 31 #if defined ( __CC_ARM ) /* Keil */
robert_lp 0:eedb7d567a5d 32 #define CODESECT AREA ||.text||, CODE, READONLY, ALIGN=2
robert_lp 0:eedb7d567a5d 33 #define LABEL
robert_lp 0:eedb7d567a5d 34 #elif defined ( __IASMARM__ ) /* IAR */
robert_lp 0:eedb7d567a5d 35 #define CODESECT SECTION `.text`:CODE
robert_lp 0:eedb7d567a5d 36 #define PROC
robert_lp 0:eedb7d567a5d 37 #define LABEL
robert_lp 0:eedb7d567a5d 38 #define ENDP
robert_lp 0:eedb7d567a5d 39 #define EXPORT PUBLIC
robert_lp 0:eedb7d567a5d 40 #elif defined ( __CSMC__ ) /* Cosmic */
robert_lp 0:eedb7d567a5d 41 #define CODESECT switch .text
robert_lp 0:eedb7d567a5d 42 #define THUMB
robert_lp 0:eedb7d567a5d 43 #define EXPORT xdef
robert_lp 0:eedb7d567a5d 44 #define PROC :
robert_lp 0:eedb7d567a5d 45 #define LABEL :
robert_lp 0:eedb7d567a5d 46 #define ENDP
robert_lp 0:eedb7d567a5d 47 #define arm_bitreversal_32 _arm_bitreversal_32
robert_lp 0:eedb7d567a5d 48 #elif defined ( __TI_ARM__ ) /* TI ARM */
robert_lp 0:eedb7d567a5d 49 #define THUMB .thumb
robert_lp 0:eedb7d567a5d 50 #define CODESECT .text
robert_lp 0:eedb7d567a5d 51 #define EXPORT .global
robert_lp 0:eedb7d567a5d 52 #define PROC : .asmfunc
robert_lp 0:eedb7d567a5d 53 #define LABEL :
robert_lp 0:eedb7d567a5d 54 #define ENDP .endasmfunc
robert_lp 0:eedb7d567a5d 55 #define END
robert_lp 0:eedb7d567a5d 56 #elif defined ( __GNUC__ ) /* GCC */
robert_lp 0:eedb7d567a5d 57 #define THUMB .thumb
robert_lp 0:eedb7d567a5d 58 #define CODESECT .section .text
robert_lp 0:eedb7d567a5d 59 #define EXPORT .global
robert_lp 0:eedb7d567a5d 60 #define PROC :
robert_lp 0:eedb7d567a5d 61 #define LABEL :
robert_lp 0:eedb7d567a5d 62 #define ENDP
robert_lp 0:eedb7d567a5d 63 #define END
robert_lp 0:eedb7d567a5d 64
robert_lp 0:eedb7d567a5d 65 .syntax unified
robert_lp 0:eedb7d567a5d 66 #endif
robert_lp 0:eedb7d567a5d 67
robert_lp 0:eedb7d567a5d 68 CODESECT
robert_lp 0:eedb7d567a5d 69 THUMB
robert_lp 0:eedb7d567a5d 70
robert_lp 0:eedb7d567a5d 71 ;/*
robert_lp 0:eedb7d567a5d 72 ;* @brief In-place bit reversal function.
robert_lp 0:eedb7d567a5d 73 ;* @param[in, out] *pSrc points to the in-place buffer of unknown 32-bit data type.
robert_lp 0:eedb7d567a5d 74 ;* @param[in] bitRevLen bit reversal table length
robert_lp 0:eedb7d567a5d 75 ;* @param[in] *pBitRevTab points to bit reversal table.
robert_lp 0:eedb7d567a5d 76 ;* @return none.
robert_lp 0:eedb7d567a5d 77 ;*/
robert_lp 0:eedb7d567a5d 78 EXPORT arm_bitreversal_32
robert_lp 0:eedb7d567a5d 79 EXPORT arm_bitreversal_16
robert_lp 0:eedb7d567a5d 80
robert_lp 0:eedb7d567a5d 81 #if defined ( __CC_ARM ) /* Keil */
robert_lp 0:eedb7d567a5d 82 #elif defined ( __IASMARM__ ) /* IAR */
robert_lp 0:eedb7d567a5d 83 #elif defined ( __CSMC__ ) /* Cosmic */
robert_lp 0:eedb7d567a5d 84 #elif defined ( __TI_ARM__ ) /* TI ARM */
robert_lp 0:eedb7d567a5d 85 #elif defined ( __GNUC__ ) /* GCC */
robert_lp 0:eedb7d567a5d 86 .type arm_bitreversal_16, %function
robert_lp 0:eedb7d567a5d 87 .type arm_bitreversal_32, %function
robert_lp 0:eedb7d567a5d 88 #endif
robert_lp 0:eedb7d567a5d 89
robert_lp 0:eedb7d567a5d 90 #if defined(ARM_MATH_CM0) || defined(ARM_MATH_CM0PLUS) || defined(ARM_MATH_ARMV8MBL)
robert_lp 0:eedb7d567a5d 91
robert_lp 0:eedb7d567a5d 92 arm_bitreversal_32 PROC
robert_lp 0:eedb7d567a5d 93 ADDS r3,r1,#1
robert_lp 0:eedb7d567a5d 94 PUSH {r4-r6}
robert_lp 0:eedb7d567a5d 95 ADDS r1,r2,#0
robert_lp 0:eedb7d567a5d 96 LSRS r3,r3,#1
robert_lp 0:eedb7d567a5d 97 arm_bitreversal_32_0 LABEL
robert_lp 0:eedb7d567a5d 98 LDRH r2,[r1,#2]
robert_lp 0:eedb7d567a5d 99 LDRH r6,[r1,#0]
robert_lp 0:eedb7d567a5d 100 ADD r2,r0,r2
robert_lp 0:eedb7d567a5d 101 ADD r6,r0,r6
robert_lp 0:eedb7d567a5d 102 LDR r5,[r2,#0]
robert_lp 0:eedb7d567a5d 103 LDR r4,[r6,#0]
robert_lp 0:eedb7d567a5d 104 STR r5,[r6,#0]
robert_lp 0:eedb7d567a5d 105 STR r4,[r2,#0]
robert_lp 0:eedb7d567a5d 106 LDR r5,[r2,#4]
robert_lp 0:eedb7d567a5d 107 LDR r4,[r6,#4]
robert_lp 0:eedb7d567a5d 108 STR r5,[r6,#4]
robert_lp 0:eedb7d567a5d 109 STR r4,[r2,#4]
robert_lp 0:eedb7d567a5d 110 ADDS r1,r1,#4
robert_lp 0:eedb7d567a5d 111 SUBS r3,r3,#1
robert_lp 0:eedb7d567a5d 112 BNE arm_bitreversal_32_0
robert_lp 0:eedb7d567a5d 113 POP {r4-r6}
robert_lp 0:eedb7d567a5d 114 BX lr
robert_lp 0:eedb7d567a5d 115 ENDP
robert_lp 0:eedb7d567a5d 116
robert_lp 0:eedb7d567a5d 117 arm_bitreversal_16 PROC
robert_lp 0:eedb7d567a5d 118 ADDS r3,r1,#1
robert_lp 0:eedb7d567a5d 119 PUSH {r4-r6}
robert_lp 0:eedb7d567a5d 120 ADDS r1,r2,#0
robert_lp 0:eedb7d567a5d 121 LSRS r3,r3,#1
robert_lp 0:eedb7d567a5d 122 arm_bitreversal_16_0 LABEL
robert_lp 0:eedb7d567a5d 123 LDRH r2,[r1,#2]
robert_lp 0:eedb7d567a5d 124 LDRH r6,[r1,#0]
robert_lp 0:eedb7d567a5d 125 LSRS r2,r2,#1
robert_lp 0:eedb7d567a5d 126 LSRS r6,r6,#1
robert_lp 0:eedb7d567a5d 127 ADD r2,r0,r2
robert_lp 0:eedb7d567a5d 128 ADD r6,r0,r6
robert_lp 0:eedb7d567a5d 129 LDR r5,[r2,#0]
robert_lp 0:eedb7d567a5d 130 LDR r4,[r6,#0]
robert_lp 0:eedb7d567a5d 131 STR r5,[r6,#0]
robert_lp 0:eedb7d567a5d 132 STR r4,[r2,#0]
robert_lp 0:eedb7d567a5d 133 ADDS r1,r1,#4
robert_lp 0:eedb7d567a5d 134 SUBS r3,r3,#1
robert_lp 0:eedb7d567a5d 135 BNE arm_bitreversal_16_0
robert_lp 0:eedb7d567a5d 136 POP {r4-r6}
robert_lp 0:eedb7d567a5d 137 BX lr
robert_lp 0:eedb7d567a5d 138 ENDP
robert_lp 0:eedb7d567a5d 139
robert_lp 0:eedb7d567a5d 140 #else
robert_lp 0:eedb7d567a5d 141
robert_lp 0:eedb7d567a5d 142 arm_bitreversal_32 PROC
robert_lp 0:eedb7d567a5d 143 ADDS r3,r1,#1
robert_lp 0:eedb7d567a5d 144 CMP r3,#1
robert_lp 0:eedb7d567a5d 145 IT LS
robert_lp 0:eedb7d567a5d 146 BXLS lr
robert_lp 0:eedb7d567a5d 147 PUSH {r4-r9}
robert_lp 0:eedb7d567a5d 148 ADDS r1,r2,#2
robert_lp 0:eedb7d567a5d 149 LSRS r3,r3,#2
robert_lp 0:eedb7d567a5d 150 arm_bitreversal_32_0 LABEL ;/* loop unrolled by 2 */
robert_lp 0:eedb7d567a5d 151 LDRH r8,[r1,#4]
robert_lp 0:eedb7d567a5d 152 LDRH r9,[r1,#2]
robert_lp 0:eedb7d567a5d 153 LDRH r2,[r1,#0]
robert_lp 0:eedb7d567a5d 154 LDRH r12,[r1,#-2]
robert_lp 0:eedb7d567a5d 155 ADD r8,r0,r8
robert_lp 0:eedb7d567a5d 156 ADD r9,r0,r9
robert_lp 0:eedb7d567a5d 157 ADD r2,r0,r2
robert_lp 0:eedb7d567a5d 158 ADD r12,r0,r12
robert_lp 0:eedb7d567a5d 159 LDR r7,[r9,#0]
robert_lp 0:eedb7d567a5d 160 LDR r6,[r8,#0]
robert_lp 0:eedb7d567a5d 161 LDR r5,[r2,#0]
robert_lp 0:eedb7d567a5d 162 LDR r4,[r12,#0]
robert_lp 0:eedb7d567a5d 163 STR r6,[r9,#0]
robert_lp 0:eedb7d567a5d 164 STR r7,[r8,#0]
robert_lp 0:eedb7d567a5d 165 STR r5,[r12,#0]
robert_lp 0:eedb7d567a5d 166 STR r4,[r2,#0]
robert_lp 0:eedb7d567a5d 167 LDR r7,[r9,#4]
robert_lp 0:eedb7d567a5d 168 LDR r6,[r8,#4]
robert_lp 0:eedb7d567a5d 169 LDR r5,[r2,#4]
robert_lp 0:eedb7d567a5d 170 LDR r4,[r12,#4]
robert_lp 0:eedb7d567a5d 171 STR r6,[r9,#4]
robert_lp 0:eedb7d567a5d 172 STR r7,[r8,#4]
robert_lp 0:eedb7d567a5d 173 STR r5,[r12,#4]
robert_lp 0:eedb7d567a5d 174 STR r4,[r2,#4]
robert_lp 0:eedb7d567a5d 175 ADDS r1,r1,#8
robert_lp 0:eedb7d567a5d 176 SUBS r3,r3,#1
robert_lp 0:eedb7d567a5d 177 BNE arm_bitreversal_32_0
robert_lp 0:eedb7d567a5d 178 POP {r4-r9}
robert_lp 0:eedb7d567a5d 179 BX lr
robert_lp 0:eedb7d567a5d 180 ENDP
robert_lp 0:eedb7d567a5d 181
robert_lp 0:eedb7d567a5d 182 arm_bitreversal_16 PROC
robert_lp 0:eedb7d567a5d 183 ADDS r3,r1,#1
robert_lp 0:eedb7d567a5d 184 CMP r3,#1
robert_lp 0:eedb7d567a5d 185 IT LS
robert_lp 0:eedb7d567a5d 186 BXLS lr
robert_lp 0:eedb7d567a5d 187 PUSH {r4-r9}
robert_lp 0:eedb7d567a5d 188 ADDS r1,r2,#2
robert_lp 0:eedb7d567a5d 189 LSRS r3,r3,#2
robert_lp 0:eedb7d567a5d 190 arm_bitreversal_16_0 LABEL ;/* loop unrolled by 2 */
robert_lp 0:eedb7d567a5d 191 LDRH r8,[r1,#4]
robert_lp 0:eedb7d567a5d 192 LDRH r9,[r1,#2]
robert_lp 0:eedb7d567a5d 193 LDRH r2,[r1,#0]
robert_lp 0:eedb7d567a5d 194 LDRH r12,[r1,#-2]
robert_lp 0:eedb7d567a5d 195 ADD r8,r0,r8,LSR #1
robert_lp 0:eedb7d567a5d 196 ADD r9,r0,r9,LSR #1
robert_lp 0:eedb7d567a5d 197 ADD r2,r0,r2,LSR #1
robert_lp 0:eedb7d567a5d 198 ADD r12,r0,r12,LSR #1
robert_lp 0:eedb7d567a5d 199 LDR r7,[r9,#0]
robert_lp 0:eedb7d567a5d 200 LDR r6,[r8,#0]
robert_lp 0:eedb7d567a5d 201 LDR r5,[r2,#0]
robert_lp 0:eedb7d567a5d 202 LDR r4,[r12,#0]
robert_lp 0:eedb7d567a5d 203 STR r6,[r9,#0]
robert_lp 0:eedb7d567a5d 204 STR r7,[r8,#0]
robert_lp 0:eedb7d567a5d 205 STR r5,[r12,#0]
robert_lp 0:eedb7d567a5d 206 STR r4,[r2,#0]
robert_lp 0:eedb7d567a5d 207 ADDS r1,r1,#8
robert_lp 0:eedb7d567a5d 208 SUBS r3,r3,#1
robert_lp 0:eedb7d567a5d 209 BNE arm_bitreversal_16_0
robert_lp 0:eedb7d567a5d 210 POP {r4-r9}
robert_lp 0:eedb7d567a5d 211 BX lr
robert_lp 0:eedb7d567a5d 212 ENDP
robert_lp 0:eedb7d567a5d 213
robert_lp 0:eedb7d567a5d 214 #endif
robert_lp 0:eedb7d567a5d 215
robert_lp 0:eedb7d567a5d 216 END
robert_lp 0:eedb7d567a5d 217