Robert Lopez / CMSIS5

Aded CMSIS5 DSP and NN folder. Needs some work

DSP/source/StatisticsFunctions/arm_rms_q31.c@0:eedb7d567a5d, 2018-04-12 (annotated)

Committer:
robert_lp
Date:
Thu Apr 12 01:31:58 2018 +0000
Revision:
0:eedb7d567a5d
CMSIS5 Library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
robert_lp 0:eedb7d567a5d 1 /* ----------------------------------------------------------------------
robert_lp 0:eedb7d567a5d 2 * Project: CMSIS DSP Library
robert_lp 0:eedb7d567a5d 3 * Title: arm_rms_q31.c
robert_lp 0:eedb7d567a5d 4 * Description: Root Mean Square of the elements of a Q31 vector
robert_lp 0:eedb7d567a5d 5 *
robert_lp 0:eedb7d567a5d 6 * $Date: 27. January 2017
robert_lp 0:eedb7d567a5d 7 * $Revision: V.1.5.1
robert_lp 0:eedb7d567a5d 8 *
robert_lp 0:eedb7d567a5d 9 * Target Processor: Cortex-M cores
robert_lp 0:eedb7d567a5d 10 * -------------------------------------------------------------------- */
robert_lp 0:eedb7d567a5d 11 /*
robert_lp 0:eedb7d567a5d 12 * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
robert_lp 0:eedb7d567a5d 13 *
robert_lp 0:eedb7d567a5d 14 * SPDX-License-Identifier: Apache-2.0
robert_lp 0:eedb7d567a5d 15 *
robert_lp 0:eedb7d567a5d 16 * Licensed under the Apache License, Version 2.0 (the License); you may
robert_lp 0:eedb7d567a5d 17 * not use this file except in compliance with the License.
robert_lp 0:eedb7d567a5d 18 * You may obtain a copy of the License at
robert_lp 0:eedb7d567a5d 19 *
robert_lp 0:eedb7d567a5d 20 * www.apache.org/licenses/LICENSE-2.0
robert_lp 0:eedb7d567a5d 21 *
robert_lp 0:eedb7d567a5d 22 * Unless required by applicable law or agreed to in writing, software
robert_lp 0:eedb7d567a5d 23 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
robert_lp 0:eedb7d567a5d 24 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
robert_lp 0:eedb7d567a5d 25 * See the License for the specific language governing permissions and
robert_lp 0:eedb7d567a5d 26 * limitations under the License.
robert_lp 0:eedb7d567a5d 27 */
robert_lp 0:eedb7d567a5d 28
robert_lp 0:eedb7d567a5d 29 #include "arm_math.h"
robert_lp 0:eedb7d567a5d 30
robert_lp 0:eedb7d567a5d 31 /**
robert_lp 0:eedb7d567a5d 32 * @addtogroup RMS
robert_lp 0:eedb7d567a5d 33 * @{
robert_lp 0:eedb7d567a5d 34 */
robert_lp 0:eedb7d567a5d 35
robert_lp 0:eedb7d567a5d 36
robert_lp 0:eedb7d567a5d 37 /**
robert_lp 0:eedb7d567a5d 38 * @brief Root Mean Square of the elements of a Q31 vector.
robert_lp 0:eedb7d567a5d 39 * @param[in] *pSrc points to the input vector
robert_lp 0:eedb7d567a5d 40 * @param[in] blockSize length of the input vector
robert_lp 0:eedb7d567a5d 41 * @param[out] *pResult rms value returned here
robert_lp 0:eedb7d567a5d 42 * @return none.
robert_lp 0:eedb7d567a5d 43 *
robert_lp 0:eedb7d567a5d 44 * @details
robert_lp 0:eedb7d567a5d 45 * <b>Scaling and Overflow Behavior:</b>
robert_lp 0:eedb7d567a5d 46 *
robert_lp 0:eedb7d567a5d 47 *\par
robert_lp 0:eedb7d567a5d 48 * The function is implemented using an internal 64-bit accumulator.
robert_lp 0:eedb7d567a5d 49 * The input is represented in 1.31 format, and intermediate multiplication
robert_lp 0:eedb7d567a5d 50 * yields a 2.62 format.
robert_lp 0:eedb7d567a5d 51 * The accumulator maintains full precision of the intermediate multiplication results,
robert_lp 0:eedb7d567a5d 52 * but provides only a single guard bit.
robert_lp 0:eedb7d567a5d 53 * There is no saturation on intermediate additions.
robert_lp 0:eedb7d567a5d 54 * If the accumulator overflows, it wraps around and distorts the result.
robert_lp 0:eedb7d567a5d 55 * In order to avoid overflows completely, the input signal must be scaled down by
robert_lp 0:eedb7d567a5d 56 * log2(blockSize) bits, as a total of blockSize additions are performed internally.
robert_lp 0:eedb7d567a5d 57 * Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.
robert_lp 0:eedb7d567a5d 58 *
robert_lp 0:eedb7d567a5d 59 */
robert_lp 0:eedb7d567a5d 60
robert_lp 0:eedb7d567a5d 61 void arm_rms_q31(
robert_lp 0:eedb7d567a5d 62 q31_t * pSrc,
robert_lp 0:eedb7d567a5d 63 uint32_t blockSize,
robert_lp 0:eedb7d567a5d 64 q31_t * pResult)
robert_lp 0:eedb7d567a5d 65 {
robert_lp 0:eedb7d567a5d 66 q63_t sum = 0; /* accumulator */
robert_lp 0:eedb7d567a5d 67 q31_t in; /* Temporary variable to store the input */
robert_lp 0:eedb7d567a5d 68 uint32_t blkCnt; /* loop counter */
robert_lp 0:eedb7d567a5d 69
robert_lp 0:eedb7d567a5d 70 #if defined (ARM_MATH_DSP)
robert_lp 0:eedb7d567a5d 71 /* Run the below code for Cortex-M4 and Cortex-M3 */
robert_lp 0:eedb7d567a5d 72
robert_lp 0:eedb7d567a5d 73 q31_t in1, in2, in3, in4; /* Temporary input variables */
robert_lp 0:eedb7d567a5d 74
robert_lp 0:eedb7d567a5d 75 /*loop Unrolling */
robert_lp 0:eedb7d567a5d 76 blkCnt = blockSize >> 2U;
robert_lp 0:eedb7d567a5d 77
robert_lp 0:eedb7d567a5d 78 /* First part of the processing with loop unrolling. Compute 8 outputs at a time.
robert_lp 0:eedb7d567a5d 79 ** a second loop below computes the remaining 1 to 7 samples. */
robert_lp 0:eedb7d567a5d 80 while (blkCnt > 0U)
robert_lp 0:eedb7d567a5d 81 {
robert_lp 0:eedb7d567a5d 82 /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
robert_lp 0:eedb7d567a5d 83 /* Compute sum of the squares and then store the result in a temporary variable, sum */
robert_lp 0:eedb7d567a5d 84 /* read two samples from source buffer */
robert_lp 0:eedb7d567a5d 85 in1 = pSrc[0];
robert_lp 0:eedb7d567a5d 86 in2 = pSrc[1];
robert_lp 0:eedb7d567a5d 87
robert_lp 0:eedb7d567a5d 88 /* calculate power and accumulate to accumulator */
robert_lp 0:eedb7d567a5d 89 sum += (q63_t) in1 *in1;
robert_lp 0:eedb7d567a5d 90 sum += (q63_t) in2 *in2;
robert_lp 0:eedb7d567a5d 91
robert_lp 0:eedb7d567a5d 92 /* read two samples from source buffer */
robert_lp 0:eedb7d567a5d 93 in3 = pSrc[2];
robert_lp 0:eedb7d567a5d 94 in4 = pSrc[3];
robert_lp 0:eedb7d567a5d 95
robert_lp 0:eedb7d567a5d 96 /* calculate power and accumulate to accumulator */
robert_lp 0:eedb7d567a5d 97 sum += (q63_t) in3 *in3;
robert_lp 0:eedb7d567a5d 98 sum += (q63_t) in4 *in4;
robert_lp 0:eedb7d567a5d 99
robert_lp 0:eedb7d567a5d 100
robert_lp 0:eedb7d567a5d 101 /* update source buffer to process next samples */
robert_lp 0:eedb7d567a5d 102 pSrc += 4U;
robert_lp 0:eedb7d567a5d 103
robert_lp 0:eedb7d567a5d 104 /* Decrement the loop counter */
robert_lp 0:eedb7d567a5d 105 blkCnt--;
robert_lp 0:eedb7d567a5d 106 }
robert_lp 0:eedb7d567a5d 107
robert_lp 0:eedb7d567a5d 108 /* If the blockSize is not a multiple of 8, compute any remaining output samples here.
robert_lp 0:eedb7d567a5d 109 ** No loop unrolling is used. */
robert_lp 0:eedb7d567a5d 110 blkCnt = blockSize % 0x4U;
robert_lp 0:eedb7d567a5d 111
robert_lp 0:eedb7d567a5d 112 #else
robert_lp 0:eedb7d567a5d 113 /* Run the below code for Cortex-M0 */
robert_lp 0:eedb7d567a5d 114
robert_lp 0:eedb7d567a5d 115 blkCnt = blockSize;
robert_lp 0:eedb7d567a5d 116
robert_lp 0:eedb7d567a5d 117 #endif /* #if defined (ARM_MATH_DSP) */
robert_lp 0:eedb7d567a5d 118
robert_lp 0:eedb7d567a5d 119 while (blkCnt > 0U)
robert_lp 0:eedb7d567a5d 120 {
robert_lp 0:eedb7d567a5d 121 /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
robert_lp 0:eedb7d567a5d 122 /* Compute sum of the squares and then store the results in a temporary variable, sum */
robert_lp 0:eedb7d567a5d 123 in = *pSrc++;
robert_lp 0:eedb7d567a5d 124 sum += (q63_t) in *in;
robert_lp 0:eedb7d567a5d 125
robert_lp 0:eedb7d567a5d 126 /* Decrement the loop counter */
robert_lp 0:eedb7d567a5d 127 blkCnt--;
robert_lp 0:eedb7d567a5d 128 }
robert_lp 0:eedb7d567a5d 129
robert_lp 0:eedb7d567a5d 130 /* Convert data in 2.62 to 1.31 by 31 right shifts and saturate */
robert_lp 0:eedb7d567a5d 131 /* Compute Rms and store the result in the destination vector */
robert_lp 0:eedb7d567a5d 132 arm_sqrt_q31(clip_q63_to_q31((sum / (q63_t) blockSize) >> 31), pResult);
robert_lp 0:eedb7d567a5d 133 }
robert_lp 0:eedb7d567a5d 134
robert_lp 0:eedb7d567a5d 135 /**
robert_lp 0:eedb7d567a5d 136 * @} end of RMS group
robert_lp 0:eedb7d567a5d 137 */
robert_lp 0:eedb7d567a5d 138