Aded CMSIS5 DSP and NN folder. Needs some work

Committer:
robert_lp
Date:
Thu Apr 12 01:31:58 2018 +0000
Revision:
0:eedb7d567a5d
CMSIS5 Library

Who changed what in which revision?

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robert_lp 0:eedb7d567a5d 1 /* ----------------------------------------------------------------------
robert_lp 0:eedb7d567a5d 2 * Project: CMSIS DSP Library
robert_lp 0:eedb7d567a5d 3 * Title: arm_sub_q31.c
robert_lp 0:eedb7d567a5d 4 * Description: Q31 vector subtraction
robert_lp 0:eedb7d567a5d 5 *
robert_lp 0:eedb7d567a5d 6 * $Date: 27. January 2017
robert_lp 0:eedb7d567a5d 7 * $Revision: V.1.5.1
robert_lp 0:eedb7d567a5d 8 *
robert_lp 0:eedb7d567a5d 9 * Target Processor: Cortex-M cores
robert_lp 0:eedb7d567a5d 10 * -------------------------------------------------------------------- */
robert_lp 0:eedb7d567a5d 11 /*
robert_lp 0:eedb7d567a5d 12 * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
robert_lp 0:eedb7d567a5d 13 *
robert_lp 0:eedb7d567a5d 14 * SPDX-License-Identifier: Apache-2.0
robert_lp 0:eedb7d567a5d 15 *
robert_lp 0:eedb7d567a5d 16 * Licensed under the Apache License, Version 2.0 (the License); you may
robert_lp 0:eedb7d567a5d 17 * not use this file except in compliance with the License.
robert_lp 0:eedb7d567a5d 18 * You may obtain a copy of the License at
robert_lp 0:eedb7d567a5d 19 *
robert_lp 0:eedb7d567a5d 20 * www.apache.org/licenses/LICENSE-2.0
robert_lp 0:eedb7d567a5d 21 *
robert_lp 0:eedb7d567a5d 22 * Unless required by applicable law or agreed to in writing, software
robert_lp 0:eedb7d567a5d 23 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
robert_lp 0:eedb7d567a5d 24 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
robert_lp 0:eedb7d567a5d 25 * See the License for the specific language governing permissions and
robert_lp 0:eedb7d567a5d 26 * limitations under the License.
robert_lp 0:eedb7d567a5d 27 */
robert_lp 0:eedb7d567a5d 28
robert_lp 0:eedb7d567a5d 29 #include "arm_math.h"
robert_lp 0:eedb7d567a5d 30
robert_lp 0:eedb7d567a5d 31 /**
robert_lp 0:eedb7d567a5d 32 * @ingroup groupMath
robert_lp 0:eedb7d567a5d 33 */
robert_lp 0:eedb7d567a5d 34
robert_lp 0:eedb7d567a5d 35 /**
robert_lp 0:eedb7d567a5d 36 * @addtogroup BasicSub
robert_lp 0:eedb7d567a5d 37 * @{
robert_lp 0:eedb7d567a5d 38 */
robert_lp 0:eedb7d567a5d 39
robert_lp 0:eedb7d567a5d 40 /**
robert_lp 0:eedb7d567a5d 41 * @brief Q31 vector subtraction.
robert_lp 0:eedb7d567a5d 42 * @param[in] *pSrcA points to the first input vector
robert_lp 0:eedb7d567a5d 43 * @param[in] *pSrcB points to the second input vector
robert_lp 0:eedb7d567a5d 44 * @param[out] *pDst points to the output vector
robert_lp 0:eedb7d567a5d 45 * @param[in] blockSize number of samples in each vector
robert_lp 0:eedb7d567a5d 46 * @return none.
robert_lp 0:eedb7d567a5d 47 *
robert_lp 0:eedb7d567a5d 48 * <b>Scaling and Overflow Behavior:</b>
robert_lp 0:eedb7d567a5d 49 * \par
robert_lp 0:eedb7d567a5d 50 * The function uses saturating arithmetic.
robert_lp 0:eedb7d567a5d 51 * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.
robert_lp 0:eedb7d567a5d 52 */
robert_lp 0:eedb7d567a5d 53
robert_lp 0:eedb7d567a5d 54 void arm_sub_q31(
robert_lp 0:eedb7d567a5d 55 q31_t * pSrcA,
robert_lp 0:eedb7d567a5d 56 q31_t * pSrcB,
robert_lp 0:eedb7d567a5d 57 q31_t * pDst,
robert_lp 0:eedb7d567a5d 58 uint32_t blockSize)
robert_lp 0:eedb7d567a5d 59 {
robert_lp 0:eedb7d567a5d 60 uint32_t blkCnt; /* loop counter */
robert_lp 0:eedb7d567a5d 61
robert_lp 0:eedb7d567a5d 62
robert_lp 0:eedb7d567a5d 63 #if defined (ARM_MATH_DSP)
robert_lp 0:eedb7d567a5d 64
robert_lp 0:eedb7d567a5d 65 /* Run the below code for Cortex-M4 and Cortex-M3 */
robert_lp 0:eedb7d567a5d 66 q31_t inA1, inA2, inA3, inA4;
robert_lp 0:eedb7d567a5d 67 q31_t inB1, inB2, inB3, inB4;
robert_lp 0:eedb7d567a5d 68
robert_lp 0:eedb7d567a5d 69 /*loop Unrolling */
robert_lp 0:eedb7d567a5d 70 blkCnt = blockSize >> 2U;
robert_lp 0:eedb7d567a5d 71
robert_lp 0:eedb7d567a5d 72 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
robert_lp 0:eedb7d567a5d 73 ** a second loop below computes the remaining 1 to 3 samples. */
robert_lp 0:eedb7d567a5d 74 while (blkCnt > 0U)
robert_lp 0:eedb7d567a5d 75 {
robert_lp 0:eedb7d567a5d 76 /* C = A - B */
robert_lp 0:eedb7d567a5d 77 /* Subtract and then store the results in the destination buffer. */
robert_lp 0:eedb7d567a5d 78 inA1 = *pSrcA++;
robert_lp 0:eedb7d567a5d 79 inA2 = *pSrcA++;
robert_lp 0:eedb7d567a5d 80 inB1 = *pSrcB++;
robert_lp 0:eedb7d567a5d 81 inB2 = *pSrcB++;
robert_lp 0:eedb7d567a5d 82
robert_lp 0:eedb7d567a5d 83 inA3 = *pSrcA++;
robert_lp 0:eedb7d567a5d 84 inA4 = *pSrcA++;
robert_lp 0:eedb7d567a5d 85 inB3 = *pSrcB++;
robert_lp 0:eedb7d567a5d 86 inB4 = *pSrcB++;
robert_lp 0:eedb7d567a5d 87
robert_lp 0:eedb7d567a5d 88 *pDst++ = __QSUB(inA1, inB1);
robert_lp 0:eedb7d567a5d 89 *pDst++ = __QSUB(inA2, inB2);
robert_lp 0:eedb7d567a5d 90 *pDst++ = __QSUB(inA3, inB3);
robert_lp 0:eedb7d567a5d 91 *pDst++ = __QSUB(inA4, inB4);
robert_lp 0:eedb7d567a5d 92
robert_lp 0:eedb7d567a5d 93 /* Decrement the loop counter */
robert_lp 0:eedb7d567a5d 94 blkCnt--;
robert_lp 0:eedb7d567a5d 95 }
robert_lp 0:eedb7d567a5d 96
robert_lp 0:eedb7d567a5d 97 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
robert_lp 0:eedb7d567a5d 98 ** No loop unrolling is used. */
robert_lp 0:eedb7d567a5d 99 blkCnt = blockSize % 0x4U;
robert_lp 0:eedb7d567a5d 100
robert_lp 0:eedb7d567a5d 101 while (blkCnt > 0U)
robert_lp 0:eedb7d567a5d 102 {
robert_lp 0:eedb7d567a5d 103 /* C = A - B */
robert_lp 0:eedb7d567a5d 104 /* Subtract and then store the result in the destination buffer. */
robert_lp 0:eedb7d567a5d 105 *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
robert_lp 0:eedb7d567a5d 106
robert_lp 0:eedb7d567a5d 107 /* Decrement the loop counter */
robert_lp 0:eedb7d567a5d 108 blkCnt--;
robert_lp 0:eedb7d567a5d 109 }
robert_lp 0:eedb7d567a5d 110
robert_lp 0:eedb7d567a5d 111 #else
robert_lp 0:eedb7d567a5d 112
robert_lp 0:eedb7d567a5d 113 /* Run the below code for Cortex-M0 */
robert_lp 0:eedb7d567a5d 114
robert_lp 0:eedb7d567a5d 115 /* Initialize blkCnt with number of samples */
robert_lp 0:eedb7d567a5d 116 blkCnt = blockSize;
robert_lp 0:eedb7d567a5d 117
robert_lp 0:eedb7d567a5d 118 while (blkCnt > 0U)
robert_lp 0:eedb7d567a5d 119 {
robert_lp 0:eedb7d567a5d 120 /* C = A - B */
robert_lp 0:eedb7d567a5d 121 /* Subtract and then store the result in the destination buffer. */
robert_lp 0:eedb7d567a5d 122 *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ - *pSrcB++);
robert_lp 0:eedb7d567a5d 123
robert_lp 0:eedb7d567a5d 124 /* Decrement the loop counter */
robert_lp 0:eedb7d567a5d 125 blkCnt--;
robert_lp 0:eedb7d567a5d 126 }
robert_lp 0:eedb7d567a5d 127
robert_lp 0:eedb7d567a5d 128 #endif /* #if defined (ARM_MATH_DSP) */
robert_lp 0:eedb7d567a5d 129
robert_lp 0:eedb7d567a5d 130 }
robert_lp 0:eedb7d567a5d 131
robert_lp 0:eedb7d567a5d 132 /**
robert_lp 0:eedb7d567a5d 133 * @} end of BasicSub group
robert_lp 0:eedb7d567a5d 134 */
robert_lp 0:eedb7d567a5d 135