Aded CMSIS5 DSP and NN folder. Needs some work

Committer:
robert_lp
Date:
Thu Apr 12 01:31:58 2018 +0000
Revision:
0:eedb7d567a5d
CMSIS5 Library

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robert_lp 0:eedb7d567a5d 1 /* ----------------------------------------------------------------------
robert_lp 0:eedb7d567a5d 2 * Project: CMSIS DSP Library
robert_lp 0:eedb7d567a5d 3 * Title: arm_abs_q15.c
robert_lp 0:eedb7d567a5d 4 * Description: Q15 vector absolute value
robert_lp 0:eedb7d567a5d 5 *
robert_lp 0:eedb7d567a5d 6 * $Date: 27. January 2017
robert_lp 0:eedb7d567a5d 7 * $Revision: V.1.5.1
robert_lp 0:eedb7d567a5d 8 *
robert_lp 0:eedb7d567a5d 9 * Target Processor: Cortex-M cores
robert_lp 0:eedb7d567a5d 10 * -------------------------------------------------------------------- */
robert_lp 0:eedb7d567a5d 11 /*
robert_lp 0:eedb7d567a5d 12 * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
robert_lp 0:eedb7d567a5d 13 *
robert_lp 0:eedb7d567a5d 14 * SPDX-License-Identifier: Apache-2.0
robert_lp 0:eedb7d567a5d 15 *
robert_lp 0:eedb7d567a5d 16 * Licensed under the Apache License, Version 2.0 (the License); you may
robert_lp 0:eedb7d567a5d 17 * not use this file except in compliance with the License.
robert_lp 0:eedb7d567a5d 18 * You may obtain a copy of the License at
robert_lp 0:eedb7d567a5d 19 *
robert_lp 0:eedb7d567a5d 20 * www.apache.org/licenses/LICENSE-2.0
robert_lp 0:eedb7d567a5d 21 *
robert_lp 0:eedb7d567a5d 22 * Unless required by applicable law or agreed to in writing, software
robert_lp 0:eedb7d567a5d 23 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
robert_lp 0:eedb7d567a5d 24 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
robert_lp 0:eedb7d567a5d 25 * See the License for the specific language governing permissions and
robert_lp 0:eedb7d567a5d 26 * limitations under the License.
robert_lp 0:eedb7d567a5d 27 */
robert_lp 0:eedb7d567a5d 28
robert_lp 0:eedb7d567a5d 29 #include "arm_math.h"
robert_lp 0:eedb7d567a5d 30
robert_lp 0:eedb7d567a5d 31 /**
robert_lp 0:eedb7d567a5d 32 * @ingroup groupMath
robert_lp 0:eedb7d567a5d 33 */
robert_lp 0:eedb7d567a5d 34
robert_lp 0:eedb7d567a5d 35 /**
robert_lp 0:eedb7d567a5d 36 * @addtogroup BasicAbs
robert_lp 0:eedb7d567a5d 37 * @{
robert_lp 0:eedb7d567a5d 38 */
robert_lp 0:eedb7d567a5d 39
robert_lp 0:eedb7d567a5d 40 /**
robert_lp 0:eedb7d567a5d 41 * @brief Q15 vector absolute value.
robert_lp 0:eedb7d567a5d 42 * @param[in] *pSrc points to the input buffer
robert_lp 0:eedb7d567a5d 43 * @param[out] *pDst points to the output buffer
robert_lp 0:eedb7d567a5d 44 * @param[in] blockSize number of samples in each vector
robert_lp 0:eedb7d567a5d 45 * @return none.
robert_lp 0:eedb7d567a5d 46 *
robert_lp 0:eedb7d567a5d 47 * <b>Scaling and Overflow Behavior:</b>
robert_lp 0:eedb7d567a5d 48 * \par
robert_lp 0:eedb7d567a5d 49 * The function uses saturating arithmetic.
robert_lp 0:eedb7d567a5d 50 * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
robert_lp 0:eedb7d567a5d 51 */
robert_lp 0:eedb7d567a5d 52
robert_lp 0:eedb7d567a5d 53 void arm_abs_q15(
robert_lp 0:eedb7d567a5d 54 q15_t * pSrc,
robert_lp 0:eedb7d567a5d 55 q15_t * pDst,
robert_lp 0:eedb7d567a5d 56 uint32_t blockSize)
robert_lp 0:eedb7d567a5d 57 {
robert_lp 0:eedb7d567a5d 58 uint32_t blkCnt; /* loop counter */
robert_lp 0:eedb7d567a5d 59
robert_lp 0:eedb7d567a5d 60 #if defined (ARM_MATH_DSP)
robert_lp 0:eedb7d567a5d 61 __SIMD32_TYPE *simd;
robert_lp 0:eedb7d567a5d 62
robert_lp 0:eedb7d567a5d 63 /* Run the below code for Cortex-M4 and Cortex-M3 */
robert_lp 0:eedb7d567a5d 64
robert_lp 0:eedb7d567a5d 65 q15_t in1; /* Input value1 */
robert_lp 0:eedb7d567a5d 66 q15_t in2; /* Input value2 */
robert_lp 0:eedb7d567a5d 67
robert_lp 0:eedb7d567a5d 68
robert_lp 0:eedb7d567a5d 69 /*loop Unrolling */
robert_lp 0:eedb7d567a5d 70 blkCnt = blockSize >> 2U;
robert_lp 0:eedb7d567a5d 71
robert_lp 0:eedb7d567a5d 72 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
robert_lp 0:eedb7d567a5d 73 ** a second loop below computes the remaining 1 to 3 samples. */
robert_lp 0:eedb7d567a5d 74 simd = __SIMD32_CONST(pDst);
robert_lp 0:eedb7d567a5d 75 while (blkCnt > 0U)
robert_lp 0:eedb7d567a5d 76 {
robert_lp 0:eedb7d567a5d 77 /* C = |A| */
robert_lp 0:eedb7d567a5d 78 /* Read two inputs */
robert_lp 0:eedb7d567a5d 79 in1 = *pSrc++;
robert_lp 0:eedb7d567a5d 80 in2 = *pSrc++;
robert_lp 0:eedb7d567a5d 81
robert_lp 0:eedb7d567a5d 82
robert_lp 0:eedb7d567a5d 83 /* Store the Absolute result in the destination buffer by packing the two values, in a single cycle */
robert_lp 0:eedb7d567a5d 84 #ifndef ARM_MATH_BIG_ENDIAN
robert_lp 0:eedb7d567a5d 85 *simd++ =
robert_lp 0:eedb7d567a5d 86 __PKHBT(((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)),
robert_lp 0:eedb7d567a5d 87 ((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), 16);
robert_lp 0:eedb7d567a5d 88
robert_lp 0:eedb7d567a5d 89 #else
robert_lp 0:eedb7d567a5d 90
robert_lp 0:eedb7d567a5d 91
robert_lp 0:eedb7d567a5d 92 *simd++ =
robert_lp 0:eedb7d567a5d 93 __PKHBT(((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)),
robert_lp 0:eedb7d567a5d 94 ((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), 16);
robert_lp 0:eedb7d567a5d 95
robert_lp 0:eedb7d567a5d 96 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
robert_lp 0:eedb7d567a5d 97
robert_lp 0:eedb7d567a5d 98 in1 = *pSrc++;
robert_lp 0:eedb7d567a5d 99 in2 = *pSrc++;
robert_lp 0:eedb7d567a5d 100
robert_lp 0:eedb7d567a5d 101
robert_lp 0:eedb7d567a5d 102 #ifndef ARM_MATH_BIG_ENDIAN
robert_lp 0:eedb7d567a5d 103
robert_lp 0:eedb7d567a5d 104 *simd++ =
robert_lp 0:eedb7d567a5d 105 __PKHBT(((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)),
robert_lp 0:eedb7d567a5d 106 ((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), 16);
robert_lp 0:eedb7d567a5d 107
robert_lp 0:eedb7d567a5d 108 #else
robert_lp 0:eedb7d567a5d 109
robert_lp 0:eedb7d567a5d 110
robert_lp 0:eedb7d567a5d 111 *simd++ =
robert_lp 0:eedb7d567a5d 112 __PKHBT(((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)),
robert_lp 0:eedb7d567a5d 113 ((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), 16);
robert_lp 0:eedb7d567a5d 114
robert_lp 0:eedb7d567a5d 115 #endif /* #ifndef ARM_MATH_BIG_ENDIAN */
robert_lp 0:eedb7d567a5d 116
robert_lp 0:eedb7d567a5d 117 /* Decrement the loop counter */
robert_lp 0:eedb7d567a5d 118 blkCnt--;
robert_lp 0:eedb7d567a5d 119 }
robert_lp 0:eedb7d567a5d 120 pDst = (q15_t *)simd;
robert_lp 0:eedb7d567a5d 121
robert_lp 0:eedb7d567a5d 122 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
robert_lp 0:eedb7d567a5d 123 ** No loop unrolling is used. */
robert_lp 0:eedb7d567a5d 124 blkCnt = blockSize % 0x4U;
robert_lp 0:eedb7d567a5d 125
robert_lp 0:eedb7d567a5d 126 while (blkCnt > 0U)
robert_lp 0:eedb7d567a5d 127 {
robert_lp 0:eedb7d567a5d 128 /* C = |A| */
robert_lp 0:eedb7d567a5d 129 /* Read the input */
robert_lp 0:eedb7d567a5d 130 in1 = *pSrc++;
robert_lp 0:eedb7d567a5d 131
robert_lp 0:eedb7d567a5d 132 /* Calculate absolute value of input and then store the result in the destination buffer. */
robert_lp 0:eedb7d567a5d 133 *pDst++ = (in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1);
robert_lp 0:eedb7d567a5d 134
robert_lp 0:eedb7d567a5d 135 /* Decrement the loop counter */
robert_lp 0:eedb7d567a5d 136 blkCnt--;
robert_lp 0:eedb7d567a5d 137 }
robert_lp 0:eedb7d567a5d 138
robert_lp 0:eedb7d567a5d 139 #else
robert_lp 0:eedb7d567a5d 140
robert_lp 0:eedb7d567a5d 141 /* Run the below code for Cortex-M0 */
robert_lp 0:eedb7d567a5d 142
robert_lp 0:eedb7d567a5d 143 q15_t in; /* Temporary input variable */
robert_lp 0:eedb7d567a5d 144
robert_lp 0:eedb7d567a5d 145 /* Initialize blkCnt with number of samples */
robert_lp 0:eedb7d567a5d 146 blkCnt = blockSize;
robert_lp 0:eedb7d567a5d 147
robert_lp 0:eedb7d567a5d 148 while (blkCnt > 0U)
robert_lp 0:eedb7d567a5d 149 {
robert_lp 0:eedb7d567a5d 150 /* C = |A| */
robert_lp 0:eedb7d567a5d 151 /* Read the input */
robert_lp 0:eedb7d567a5d 152 in = *pSrc++;
robert_lp 0:eedb7d567a5d 153
robert_lp 0:eedb7d567a5d 154 /* Calculate absolute value of input and then store the result in the destination buffer. */
robert_lp 0:eedb7d567a5d 155 *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
robert_lp 0:eedb7d567a5d 156
robert_lp 0:eedb7d567a5d 157 /* Decrement the loop counter */
robert_lp 0:eedb7d567a5d 158 blkCnt--;
robert_lp 0:eedb7d567a5d 159 }
robert_lp 0:eedb7d567a5d 160
robert_lp 0:eedb7d567a5d 161 #endif /* #if defined (ARM_MATH_DSP) */
robert_lp 0:eedb7d567a5d 162
robert_lp 0:eedb7d567a5d 163 }
robert_lp 0:eedb7d567a5d 164
robert_lp 0:eedb7d567a5d 165 /**
robert_lp 0:eedb7d567a5d 166 * @} end of BasicAbs group
robert_lp 0:eedb7d567a5d 167 */
robert_lp 0:eedb7d567a5d 168