Richard McWilliam / ADXL362

Library for the ADXL362 Accelerometer

Dependents:   mbed_Y2PROJECT_FIRST mbed_protoy2project mbed_savedataproto mbed_menu ... more

ADXL362.cpp@0:d9853774f233, 2016-03-03 (annotated)

Committer:
rmcwilliam101
Date:
Thu Mar 03 13:49:03 2016 +0000
Revision:
0:d9853774f233
AXDL library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
rmcwilliam101 0:d9853774f233 1 #include "mbed.h"
rmcwilliam101 0:d9853774f233 2 #include "ADXL362.h"
rmcwilliam101 0:d9853774f233 3
rmcwilliam101 0:d9853774f233 4 // Class
rmcwilliam101 0:d9853774f233 5
rmcwilliam101 0:d9853774f233 6 ADXL362::ADXL362(PinName mosi, PinName miso, PinName sclk, PinName cbs)
rmcwilliam101 0:d9853774f233 7 : SPI_m(mosi, miso, sclk)
rmcwilliam101 0:d9853774f233 8 , CBS_m(cbs) {
rmcwilliam101 0:d9853774f233 9 CBS_m=1;
rmcwilliam101 0:d9853774f233 10 }
rmcwilliam101 0:d9853774f233 11
rmcwilliam101 0:d9853774f233 12 // SPI
rmcwilliam101 0:d9853774f233 13
rmcwilliam101 0:d9853774f233 14 void ADXL362::init_spi(){
rmcwilliam101 0:d9853774f233 15 // spi 8 bits, mode 0, 1 MHz for adxl362
rmcwilliam101 0:d9853774f233 16 SPI_m.format(8,0);
rmcwilliam101 0:d9853774f233 17 // 5 MHz, max for acc - works fine
rmcwilliam101 0:d9853774f233 18 SPI_m.frequency(5000000);
rmcwilliam101 0:d9853774f233 19 }
rmcwilliam101 0:d9853774f233 20
rmcwilliam101 0:d9853774f233 21
rmcwilliam101 0:d9853774f233 22
rmcwilliam101 0:d9853774f233 23 void ADXL362::init_adxl362(){
rmcwilliam101 0:d9853774f233 24 //uint8_t reg;
rmcwilliam101 0:d9853774f233 25 // reset the adxl362
rmcwilliam101 0:d9853774f233 26 wait_ms(200);
rmcwilliam101 0:d9853774f233 27 ACC_WriteReg(RESET, 0x52);
rmcwilliam101 0:d9853774f233 28 wait_ms(200);
rmcwilliam101 0:d9853774f233 29
rmcwilliam101 0:d9853774f233 30 // set FIFO
rmcwilliam101 0:d9853774f233 31 ACC_WriteReg(FIFO_CTL,0x0A); // stream mode, AH bit
rmcwilliam101 0:d9853774f233 32 //ACC_WriteReg(FIFO_CTL,0x02); // stream mode, no AH bit
rmcwilliam101 0:d9853774f233 33 //reg = ACC_ReadReg(FIFO_CTL);
rmcwilliam101 0:d9853774f233 34 //pc.printf("FIFO_CTL = 0x%X\r\n", reg);
rmcwilliam101 0:d9853774f233 35
rmcwilliam101 0:d9853774f233 36 // Not used but keep in case it is important to set FIFO parameters.
rmcwilliam101 0:d9853774f233 37 //ACC_WriteReg(FIFO_SAM,SAMPLE_SET * 3); // fifo depth
rmcwilliam101 0:d9853774f233 38 //reg = ACC_ReadReg(FIFO_SAM);
rmcwilliam101 0:d9853774f233 39 //pc.printf("FIFO_SAM = 0x%X\r\n", reg);
rmcwilliam101 0:d9853774f233 40
rmcwilliam101 0:d9853774f233 41 // set adxl362 to 4g range, 25Hz
rmcwilliam101 0:d9853774f233 42 //ACC_WriteReg(FILTER_CTL,0x51);
rmcwilliam101 0:d9853774f233 43 // 2g, 25Hz
rmcwilliam101 0:d9853774f233 44 ACC_WriteReg(FILTER_CTL,0x11);
rmcwilliam101 0:d9853774f233 45 //reg = ACC_ReadReg(FILTER_CTL);
rmcwilliam101 0:d9853774f233 46 //printf("FILTER_CTL = 0x%X\r\n", reg);
rmcwilliam101 0:d9853774f233 47
rmcwilliam101 0:d9853774f233 48 // map adxl362 interrupts
rmcwilliam101 0:d9853774f233 49 //ACC_WriteReg(INTMAP1,0x01); //data ready
rmcwilliam101 0:d9853774f233 50 ACC_WriteReg(INTMAP1,0x04); //watermark
rmcwilliam101 0:d9853774f233 51 //reg = ACC_ReadReg(INTMAP1);
rmcwilliam101 0:d9853774f233 52 //pc.printf("INTMAP1 = 0x%X\r\n", reg);
rmcwilliam101 0:d9853774f233 53
rmcwilliam101 0:d9853774f233 54 // set adxl362 to measurement mode, ultralow noise
rmcwilliam101 0:d9853774f233 55 ACC_WriteReg(POWER_CTL,0x22);
rmcwilliam101 0:d9853774f233 56 //reg = ACC_ReadReg(POWER_CTL);
rmcwilliam101 0:d9853774f233 57 //pc.printf("POWER_CTL = 0x%X\r\n", reg);
rmcwilliam101 0:d9853774f233 58 }
rmcwilliam101 0:d9853774f233 59
rmcwilliam101 0:d9853774f233 60 void ADXL362::ACC_GetXYZ8(int8_t* x, int8_t* y, int8_t* z)
rmcwilliam101 0:d9853774f233 61 {
rmcwilliam101 0:d9853774f233 62 CBS_m = DOWN;
rmcwilliam101 0:d9853774f233 63 SPI_m.write(RD_SPI);
rmcwilliam101 0:d9853774f233 64 SPI_m.write(0x08);
rmcwilliam101 0:d9853774f233 65
rmcwilliam101 0:d9853774f233 66 *x = SPI_m.write(0x00);
rmcwilliam101 0:d9853774f233 67 *y = SPI_m.write(0x00);
rmcwilliam101 0:d9853774f233 68 *z = SPI_m.write(0x00);
rmcwilliam101 0:d9853774f233 69
rmcwilliam101 0:d9853774f233 70 CBS_m = UP;
rmcwilliam101 0:d9853774f233 71 }
rmcwilliam101 0:d9853774f233 72
rmcwilliam101 0:d9853774f233 73
rmcwilliam101 0:d9853774f233 74 uint8_t ADXL362::ACC_ReadReg( uint8_t reg )
rmcwilliam101 0:d9853774f233 75 {
rmcwilliam101 0:d9853774f233 76 CBS_m = DOWN;
rmcwilliam101 0:d9853774f233 77 SPI_m.write(RD_SPI);
rmcwilliam101 0:d9853774f233 78 SPI_m.write(reg);
rmcwilliam101 0:d9853774f233 79 uint8_t val = SPI_m.write(0x00);
rmcwilliam101 0:d9853774f233 80 CBS_m = UP;
rmcwilliam101 0:d9853774f233 81 return (val);
rmcwilliam101 0:d9853774f233 82 }
rmcwilliam101 0:d9853774f233 83
rmcwilliam101 0:d9853774f233 84 void ADXL362::ACC_WriteReg( uint8_t reg, uint8_t cmd )
rmcwilliam101 0:d9853774f233 85 {
rmcwilliam101 0:d9853774f233 86 CBS_m = DOWN;
rmcwilliam101 0:d9853774f233 87 SPI_m.write(WR_SPI);
rmcwilliam101 0:d9853774f233 88 SPI_m.write(reg);
rmcwilliam101 0:d9853774f233 89 SPI_m.write(cmd);
rmcwilliam101 0:d9853774f233 90 CBS_m = UP;
rmcwilliam101 0:d9853774f233 91 }