mbed I2C MPU6500 tilt angle
Fork of NTOUEE-mbed-I2C_MPU6500_Tiltangle by
mpu6500.h@1:efa4c7817836, 2016-10-20 (annotated)
- Committer:
- rkuo2000
- Date:
- Thu Oct 20 13:19:15 2016 +0000
- Revision:
- 1:efa4c7817836
- Parent:
- 0:73a95126993e
mbed I2C MPU6500 tilt angle
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
rkuo2000 | 0:73a95126993e | 1 | #define MPU6500_SELF_TEST_X_GYRO 0x00 |
rkuo2000 | 0:73a95126993e | 2 | #define MPU6500_SELF_TEST_Y_GYRO 0x01 |
rkuo2000 | 0:73a95126993e | 3 | #define MPU6500_SELF_TEST_Z_GYRO 0x02 |
rkuo2000 | 0:73a95126993e | 4 | #define MPU6500_SELF_TEST_X_ACCEL 0x0D |
rkuo2000 | 0:73a95126993e | 5 | #define MPU6500_SELF_TEST_Y_ACCEL 0x0E |
rkuo2000 | 0:73a95126993e | 6 | #define MPU6500_SELF_TEST_Z_ACCEL 0x0F |
rkuo2000 | 0:73a95126993e | 7 | #define MPU6500_XG_OFFSET_H 0x13 |
rkuo2000 | 0:73a95126993e | 8 | #define MPU6500_XG_OFFSET_L 0x14 |
rkuo2000 | 0:73a95126993e | 9 | #define MPU6500_YG_OFFSET_H 0x15 |
rkuo2000 | 0:73a95126993e | 10 | #define MPU6500_YG_OFFSET_L 0x16 |
rkuo2000 | 0:73a95126993e | 11 | #define MPU6500_ZG_OFFSET_H 0x17 |
rkuo2000 | 0:73a95126993e | 12 | #define MPU6500_ZG_OFFSET_L 0x18 |
rkuo2000 | 0:73a95126993e | 13 | #define MPU6500_SMPLRT_DIV 0x19 |
rkuo2000 | 0:73a95126993e | 14 | #define MPU6500_CONFIG 0x1A |
rkuo2000 | 0:73a95126993e | 15 | #define MPU6500_GYRO_CONFIG 0x1B |
rkuo2000 | 0:73a95126993e | 16 | #define MPU6500_ACCEL_CONFIG 0x1C |
rkuo2000 | 0:73a95126993e | 17 | #define MPU6500_ACCEL_CONFIG2 0x1D |
rkuo2000 | 0:73a95126993e | 18 | #define MPU6500_LP_ACCEL_ODR 0x1E |
rkuo2000 | 0:73a95126993e | 19 | #define MPU6500_WOM_THR 0x1F |
rkuo2000 | 0:73a95126993e | 20 | #define MPU6500_FIFO_EN 0x23 |
rkuo2000 | 0:73a95126993e | 21 | #define MPU6500_I2C_MST_CTRL 0x24 |
rkuo2000 | 0:73a95126993e | 22 | #define MPU6500_I2C_SLV0_ADDR 0x25 |
rkuo2000 | 0:73a95126993e | 23 | #define MPU6500_I2C_SLV0_REG 0x26 |
rkuo2000 | 0:73a95126993e | 24 | #define MPU6500_I2C_SLV0_CTRL 0x27 |
rkuo2000 | 0:73a95126993e | 25 | #define MPU6500_I2C_SLV1_ADDR 0x28 |
rkuo2000 | 0:73a95126993e | 26 | #define MPU6500_I2C_SLV1_REG 0x29 |
rkuo2000 | 0:73a95126993e | 27 | #define MPU6500_I2C_SLV1_CTRL 0x2A |
rkuo2000 | 0:73a95126993e | 28 | #define MPU6500_I2C_SLV2_ADDR 0x2B |
rkuo2000 | 0:73a95126993e | 29 | #define MPU6500_I2C_SLV2_REG 0x2C |
rkuo2000 | 0:73a95126993e | 30 | #define MPU6500_I2C_SLV2_CTRL 0x2D |
rkuo2000 | 0:73a95126993e | 31 | #define MPU6500_I2C_SLV3_ADDR 0x2E |
rkuo2000 | 0:73a95126993e | 32 | #define MPU6500_I2C_SLV3_REG 0x2F |
rkuo2000 | 0:73a95126993e | 33 | #define MPU6500_I2C_SLV3_CTRL 0x30 |
rkuo2000 | 0:73a95126993e | 34 | #define MPU6500_I2C_SLV4_ADDR 0x31 |
rkuo2000 | 0:73a95126993e | 35 | #define MPU6500_I2C_SLV4_REG 0x32 |
rkuo2000 | 0:73a95126993e | 36 | #define MPU6500_I2C_SLV4_DO 0x33 |
rkuo2000 | 0:73a95126993e | 37 | #define MPU6500_I2C_SLV4_CTRL 0x34 |
rkuo2000 | 0:73a95126993e | 38 | #define MPU6500_I2C_SLV4_DI 0x35 |
rkuo2000 | 0:73a95126993e | 39 | #define MPU6500_I2C_MST_STATUS 0x36 |
rkuo2000 | 0:73a95126993e | 40 | #define MPU6500_INT_PIN_CFG 0x37 |
rkuo2000 | 0:73a95126993e | 41 | #define MPU6500_INT_ENABLE 0x38 |
rkuo2000 | 0:73a95126993e | 42 | #define MPU6500_INT_STATUS 0x3A |
rkuo2000 | 0:73a95126993e | 43 | #define MPU6500_ACCEL_XOUT_H 0x3B |
rkuo2000 | 0:73a95126993e | 44 | #define MPU6500_ACCEL_XOUT_L 0x3C |
rkuo2000 | 0:73a95126993e | 45 | #define MPU6500_ACCEL_YOUT_H 0x3D |
rkuo2000 | 0:73a95126993e | 46 | #define MPU6500_ACCEL_YOUT_L 0x3E |
rkuo2000 | 0:73a95126993e | 47 | #define MPU6500_ACCEL_ZOUT_H 0x3F |
rkuo2000 | 0:73a95126993e | 48 | #define MPU6500_ACCEL_ZOUT_L 0x40 |
rkuo2000 | 0:73a95126993e | 49 | #define MPU6500_TEMP_OUT_H 0x41 |
rkuo2000 | 0:73a95126993e | 50 | #define MPU6500_TEMP_OUT_L 0x42 |
rkuo2000 | 0:73a95126993e | 51 | #define MPU6500_GYRO_XOUT_H 0x43 |
rkuo2000 | 0:73a95126993e | 52 | #define MPU6500_GYRO_XOUT_L 0x44 |
rkuo2000 | 0:73a95126993e | 53 | #define MPU6500_GYRO_YOUT_H 0x45 |
rkuo2000 | 0:73a95126993e | 54 | #define MPU6500_GYRO_YOUT_L 0x46 |
rkuo2000 | 0:73a95126993e | 55 | #define MPU6500_GYRO_ZOUT_H 0x47 |
rkuo2000 | 0:73a95126993e | 56 | #define MPU6500_GYRO_ZOUT_L 0x48 |
rkuo2000 | 0:73a95126993e | 57 | #define MPU6500_EXT_SENS_DATA_00 0x49 |
rkuo2000 | 0:73a95126993e | 58 | #define MPU6500_EXT_SENS_DATA_01 0x4A |
rkuo2000 | 0:73a95126993e | 59 | #define MPU6500_EXT_SENS_DATA_02 0x4B |
rkuo2000 | 0:73a95126993e | 60 | #define MPU6500_EXT_SENS_DATA_03 0x4C |
rkuo2000 | 0:73a95126993e | 61 | #define MPU6500_EXT_SENS_DATA_04 0x4D |
rkuo2000 | 0:73a95126993e | 62 | #define MPU6500_EXT_SENS_DATA_05 0x4E |
rkuo2000 | 0:73a95126993e | 63 | #define MPU6500_EXT_SENS_DATA_06 0x4F |
rkuo2000 | 0:73a95126993e | 64 | #define MPU6500_EXT_SENS_DATA_07 0x50 |
rkuo2000 | 0:73a95126993e | 65 | #define MPU6500_EXT_SENS_DATA_08 0x51 |
rkuo2000 | 0:73a95126993e | 66 | #define MPU6500_EXT_SENS_DATA_09 0x52 |
rkuo2000 | 0:73a95126993e | 67 | #define MPU6500_EXT_SENS_DATA_10 0x53 |
rkuo2000 | 0:73a95126993e | 68 | #define MPU6500_EXT_SENS_DATA_11 0x54 |
rkuo2000 | 0:73a95126993e | 69 | #define MPU6500_EXT_SENS_DATA_12 0x55 |
rkuo2000 | 0:73a95126993e | 70 | #define MPU6500_EXT_SENS_DATA_13 0x56 |
rkuo2000 | 0:73a95126993e | 71 | #define MPU6500_EXT_SENS_DATA_14 0x57 |
rkuo2000 | 0:73a95126993e | 72 | #define MPU6500_EXT_SENS_DATA_15 0x58 |
rkuo2000 | 0:73a95126993e | 73 | #define MPU6500_EXT_SENS_DATA_16 0x59 |
rkuo2000 | 0:73a95126993e | 74 | #define MPU6500_EXT_SENS_DATA_17 0x5A |
rkuo2000 | 0:73a95126993e | 75 | #define MPU6500_EXT_SENS_DATA_18 0x5B |
rkuo2000 | 0:73a95126993e | 76 | #define MPU6500_EXT_SENS_DATA_19 0x5C |
rkuo2000 | 0:73a95126993e | 77 | #define MPU6500_EXT_SENS_DATA_20 0x5D |
rkuo2000 | 0:73a95126993e | 78 | #define MPU6500_EXT_SENS_DATA_21 0x5E |
rkuo2000 | 0:73a95126993e | 79 | #define MPU6500_EXT_SENS_DATA_22 0x5F |
rkuo2000 | 0:73a95126993e | 80 | #define MPU6500_EXT_SENS_DATA_23 0x60 |
rkuo2000 | 0:73a95126993e | 81 | #define MPU6500_I2C_SLV0_DO 0x63 |
rkuo2000 | 0:73a95126993e | 82 | #define MPU6500_I2C_SLV1_DO 0x64 |
rkuo2000 | 0:73a95126993e | 83 | #define MPU6500_I2C_SLV2_DO 0x65 |
rkuo2000 | 0:73a95126993e | 84 | #define MPU6500_I2C_SLV3_DO 0x66 |
rkuo2000 | 0:73a95126993e | 85 | #define MPU6500_I2C_MST_DELAY_CTRL 0x67 |
rkuo2000 | 0:73a95126993e | 86 | #define MPU6500_SIGNAL_PATH_RESET 0x68 |
rkuo2000 | 0:73a95126993e | 87 | #define MPU6500_ACCEL_INTEL_CTRL 0x69 |
rkuo2000 | 0:73a95126993e | 88 | #define MPU6500_USER_CTRL 0x6A |
rkuo2000 | 0:73a95126993e | 89 | #define MPU6500_PWR_MGMT_1 0x6B |
rkuo2000 | 0:73a95126993e | 90 | #define MPU6500_PWR_MGMT_2 0x6C |
rkuo2000 | 0:73a95126993e | 91 | #define MPU6500_FIFO_COUNT_H 0x72 |
rkuo2000 | 0:73a95126993e | 92 | #define MPU6500_FIFO_COUNT_L 0x73 |
rkuo2000 | 0:73a95126993e | 93 | #define MPU6500_FIFO_R_W 0x74 |
rkuo2000 | 0:73a95126993e | 94 | #define MPU6500_WHO_AM_I 0x75 |
rkuo2000 | 0:73a95126993e | 95 | #define MPU6500_XA_OFFSET_H 0x77 |
rkuo2000 | 0:73a95126993e | 96 | #define MPU6500_XA_OFFSET_L 0x78 |
rkuo2000 | 0:73a95126993e | 97 | #define MPU6500_YA_OFFSET_H 0x79 |
rkuo2000 | 0:73a95126993e | 98 | #define MPU6500_YA_OFFSET_L 0x7A |
rkuo2000 | 0:73a95126993e | 99 | #define MPU6500_ZA_OFFSET_H 0x7D |
rkuo2000 | 0:73a95126993e | 100 | #define MPU6500_ZA_OFFSET_L 0x7E |
rkuo2000 | 0:73a95126993e | 101 | |
rkuo2000 | 0:73a95126993e | 102 | #define MPU6500_slave_addr 0xD0 |
rkuo2000 | 0:73a95126993e | 103 | |
rkuo2000 | 0:73a95126993e | 104 | class MPU6500 { |
rkuo2000 | 0:73a95126993e | 105 | public: |
rkuo2000 | 0:73a95126993e | 106 | void initialize(); |
rkuo2000 | 0:73a95126993e | 107 | int16_t getAccelXvalue(); |
rkuo2000 | 0:73a95126993e | 108 | int16_t getAccelYvalue(); |
rkuo2000 | 0:73a95126993e | 109 | int16_t getAccelZvalue(); |
rkuo2000 | 0:73a95126993e | 110 | int16_t getGyroXvalue(); |
rkuo2000 | 0:73a95126993e | 111 | int16_t getGyroYvalue(); |
rkuo2000 | 0:73a95126993e | 112 | int16_t getGyroZvalue(); |
rkuo2000 | 0:73a95126993e | 113 | }; |