rik te winkel / mbed-dev

Forked mbed-dev as I use an 20 pins stm32F042 and not the 32 pins version

Dependents:   Numitron_clock

Fork of mbed-dev by mbed official

targets/TARGET_Maxim/TARGET_MAX32625/serial_api.c@153:0a78729d3229, 2017-01-22 (annotated)

Committer:
riktw
Date:
Sun Jan 22 22:20:36 2017 +0000
Revision:
153:0a78729d3229
Parent:
150:02e0a0aed4ec 
Back to 8Mhz clock. Revision 1.0

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 150:02e0a0aed4ec 1 /*******************************************************************************
<> 150:02e0a0aed4ec 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
<> 150:02e0a0aed4ec 3 *
<> 150:02e0a0aed4ec 4 * Permission is hereby granted, free of charge, to any person obtaining a
<> 150:02e0a0aed4ec 5 * copy of this software and associated documentation files (the "Software"),
<> 150:02e0a0aed4ec 6 * to deal in the Software without restriction, including without limitation
<> 150:02e0a0aed4ec 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 150:02e0a0aed4ec 8 * and/or sell copies of the Software, and to permit persons to whom the
<> 150:02e0a0aed4ec 9 * Software is furnished to do so, subject to the following conditions:
<> 150:02e0a0aed4ec 10 *
<> 150:02e0a0aed4ec 11 * The above copyright notice and this permission notice shall be included
<> 150:02e0a0aed4ec 12 * in all copies or substantial portions of the Software.
<> 150:02e0a0aed4ec 13 *
<> 150:02e0a0aed4ec 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 150:02e0a0aed4ec 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 150:02e0a0aed4ec 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 150:02e0a0aed4ec 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 150:02e0a0aed4ec 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 150:02e0a0aed4ec 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 150:02e0a0aed4ec 20 * OTHER DEALINGS IN THE SOFTWARE.
<> 150:02e0a0aed4ec 21 *
<> 150:02e0a0aed4ec 22 * Except as contained in this notice, the name of Maxim Integrated
<> 150:02e0a0aed4ec 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 150:02e0a0aed4ec 24 * Products, Inc. Branding Policy.
<> 150:02e0a0aed4ec 25 *
<> 150:02e0a0aed4ec 26 * The mere transfer of this software does not imply any licenses
<> 150:02e0a0aed4ec 27 * of trade secrets, proprietary technology, copyrights, patents,
<> 150:02e0a0aed4ec 28 * trademarks, maskwork rights, or any other form of intellectual
<> 150:02e0a0aed4ec 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 150:02e0a0aed4ec 30 * ownership rights.
<> 150:02e0a0aed4ec 31 *******************************************************************************
<> 150:02e0a0aed4ec 32 */
<> 150:02e0a0aed4ec 33
<> 150:02e0a0aed4ec 34 #include <string.h>
<> 150:02e0a0aed4ec 35 #include "mbed_assert.h"
<> 150:02e0a0aed4ec 36 #include "cmsis.h"
<> 150:02e0a0aed4ec 37 #include "serial_api.h"
<> 150:02e0a0aed4ec 38 #include "gpio_api.h"
<> 150:02e0a0aed4ec 39 #include "uart.h"
<> 150:02e0a0aed4ec 40 #include "uart_regs.h"
<> 150:02e0a0aed4ec 41 #include "ioman_regs.h"
<> 150:02e0a0aed4ec 42 #include "PeripheralPins.h"
<> 150:02e0a0aed4ec 43
<> 150:02e0a0aed4ec 44 #define DEFAULT_BAUD 9600
<> 150:02e0a0aed4ec 45
<> 150:02e0a0aed4ec 46 #define UART_ERRORS (MXC_F_UART_INTFL_RX_FRAMING_ERR | \
<> 150:02e0a0aed4ec 47 MXC_F_UART_INTFL_RX_PARITY_ERR | \
<> 150:02e0a0aed4ec 48 MXC_F_UART_INTFL_RX_FIFO_OVERFLOW)
<> 150:02e0a0aed4ec 49
<> 150:02e0a0aed4ec 50 // Variables for managing the stdio UART
<> 150:02e0a0aed4ec 51 int stdio_uart_inited;
<> 150:02e0a0aed4ec 52 serial_t stdio_uart;
<> 150:02e0a0aed4ec 53
<> 150:02e0a0aed4ec 54 // Variables for interrupt driven
<> 150:02e0a0aed4ec 55 static uart_irq_handler irq_handler;
<> 150:02e0a0aed4ec 56 static serial_t *objs[MXC_CFG_UART_INSTANCES];
<> 150:02e0a0aed4ec 57
<> 150:02e0a0aed4ec 58 static void usurp_pin(PinName, int);
<> 150:02e0a0aed4ec 59
<> 150:02e0a0aed4ec 60 //******************************************************************************
<> 150:02e0a0aed4ec 61 void serial_init(serial_t *obj, PinName tx, PinName rx)
<> 150:02e0a0aed4ec 62 {
<> 150:02e0a0aed4ec 63 // Determine which uart is associated with each pin
<> 150:02e0a0aed4ec 64 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
<> 150:02e0a0aed4ec 65 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
<> 150:02e0a0aed4ec 66 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
<> 150:02e0a0aed4ec 67
<> 150:02e0a0aed4ec 68 // Make sure that both pins are pointing to the same uart
<> 150:02e0a0aed4ec 69 MBED_ASSERT(uart != (UARTName)NC);
<> 150:02e0a0aed4ec 70
<> 150:02e0a0aed4ec 71 // Set the obj pointer to the proper uart
<> 150:02e0a0aed4ec 72 obj->uart = (mxc_uart_regs_t*)uart;
<> 150:02e0a0aed4ec 73
<> 150:02e0a0aed4ec 74 // Set the uart index
<> 150:02e0a0aed4ec 75 obj->index = MXC_UART_GET_IDX(obj->uart);
<> 150:02e0a0aed4ec 76 obj->fifo = (mxc_uart_fifo_regs_t*)MXC_UART_GET_BASE_FIFO(obj->index);
<> 150:02e0a0aed4ec 77
<> 150:02e0a0aed4ec 78 // Manage stdio UART
<> 150:02e0a0aed4ec 79 if (uart == STDIO_UART) {
<> 150:02e0a0aed4ec 80 stdio_uart_inited = 1;
<> 150:02e0a0aed4ec 81 memcpy(&stdio_uart, obj, sizeof(serial_t));
<> 150:02e0a0aed4ec 82 }
<> 150:02e0a0aed4ec 83
<> 150:02e0a0aed4ec 84 // Record the pins requested
<> 150:02e0a0aed4ec 85 obj->tx = tx;
<> 150:02e0a0aed4ec 86 obj->rx = rx;
<> 150:02e0a0aed4ec 87
<> 150:02e0a0aed4ec 88 // Merge pin function requests for use with CMSIS init func
<> 150:02e0a0aed4ec 89 ioman_req_t io_req = {0};
<> 150:02e0a0aed4ec 90 pin_function_t *pin_func = NULL;
<> 150:02e0a0aed4ec 91 if (tx != NC) {
<> 150:02e0a0aed4ec 92 pin_func = (pin_function_t *)pinmap_find_function(tx, PinMap_UART_TX);
<> 150:02e0a0aed4ec 93 io_req.value = pin_func->req_val;
<> 150:02e0a0aed4ec 94 }
<> 150:02e0a0aed4ec 95 if (rx != NC) {
<> 150:02e0a0aed4ec 96 pin_func = (pin_function_t *)pinmap_find_function(rx, PinMap_UART_RX);
<> 150:02e0a0aed4ec 97 io_req.value |= pin_func->req_val;
<> 150:02e0a0aed4ec 98 }
<> 150:02e0a0aed4ec 99
<> 150:02e0a0aed4ec 100 // Using req and ack pointers of last pin function lookup
<> 150:02e0a0aed4ec 101 obj->sys_cfg.io_cfg.req_reg = pin_func->reg_req;
<> 150:02e0a0aed4ec 102 obj->sys_cfg.io_cfg.ack_reg = pin_func->reg_ack;
<> 150:02e0a0aed4ec 103 obj->sys_cfg.io_cfg.req_val = io_req;
<> 150:02e0a0aed4ec 104 obj->sys_cfg.clk_scale = CLKMAN_SCALE_DIV_8;
<> 150:02e0a0aed4ec 105
<> 150:02e0a0aed4ec 106 // Configure the UART with default parameters
<> 150:02e0a0aed4ec 107 obj->cfg.extra_stop = 0;
<> 150:02e0a0aed4ec 108 obj->cfg.cts = 0;
<> 150:02e0a0aed4ec 109 obj->cfg.rts = 0;
<> 150:02e0a0aed4ec 110 obj->cfg.baud = DEFAULT_BAUD;
<> 150:02e0a0aed4ec 111 obj->cfg.size = UART_DATA_SIZE_8_BITS;
<> 150:02e0a0aed4ec 112 obj->cfg.parity = UART_PARITY_DISABLE;
<> 150:02e0a0aed4ec 113
<> 150:02e0a0aed4ec 114 int retval = UART_Init(obj->uart, &obj->cfg, &obj->sys_cfg);
<> 150:02e0a0aed4ec 115 MBED_ASSERT(retval == E_NO_ERROR);
<> 150:02e0a0aed4ec 116 }
<> 150:02e0a0aed4ec 117
<> 150:02e0a0aed4ec 118 //******************************************************************************
<> 150:02e0a0aed4ec 119 void serial_baud(serial_t *obj, int baudrate)
<> 150:02e0a0aed4ec 120 {
<> 150:02e0a0aed4ec 121 obj->cfg.baud = baudrate;
<> 150:02e0a0aed4ec 122 int retval = UART_Init(obj->uart, &obj->cfg, NULL);
<> 150:02e0a0aed4ec 123 MBED_ASSERT(retval == E_NO_ERROR);
<> 150:02e0a0aed4ec 124 }
<> 150:02e0a0aed4ec 125
<> 150:02e0a0aed4ec 126 //******************************************************************************
<> 150:02e0a0aed4ec 127 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
<> 150:02e0a0aed4ec 128 {
<> 150:02e0a0aed4ec 129 switch (data_bits) {
<> 150:02e0a0aed4ec 130 case 5:
<> 150:02e0a0aed4ec 131 obj->cfg.size = UART_DATA_SIZE_5_BITS;
<> 150:02e0a0aed4ec 132 break;
<> 150:02e0a0aed4ec 133 case 6:
<> 150:02e0a0aed4ec 134 obj->cfg.size = UART_DATA_SIZE_6_BITS;
<> 150:02e0a0aed4ec 135 break;
<> 150:02e0a0aed4ec 136 case 7:
<> 150:02e0a0aed4ec 137 obj->cfg.size = UART_DATA_SIZE_7_BITS;
<> 150:02e0a0aed4ec 138 break;
<> 150:02e0a0aed4ec 139 case 8:
<> 150:02e0a0aed4ec 140 obj->cfg.size = UART_DATA_SIZE_8_BITS;
<> 150:02e0a0aed4ec 141 break;
<> 150:02e0a0aed4ec 142 default:
<> 150:02e0a0aed4ec 143 MBED_ASSERT(0);
<> 150:02e0a0aed4ec 144 break;
<> 150:02e0a0aed4ec 145 }
<> 150:02e0a0aed4ec 146
<> 150:02e0a0aed4ec 147 switch (parity) {
<> 150:02e0a0aed4ec 148 case ParityNone:
<> 150:02e0a0aed4ec 149 obj->cfg.parity = UART_PARITY_DISABLE;
<> 150:02e0a0aed4ec 150 break;
<> 150:02e0a0aed4ec 151 case ParityOdd :
<> 150:02e0a0aed4ec 152 obj->cfg.parity = UART_PARITY_ODD;
<> 150:02e0a0aed4ec 153 break;
<> 150:02e0a0aed4ec 154 case ParityEven:
<> 150:02e0a0aed4ec 155 obj->cfg.parity = UART_PARITY_EVEN;
<> 150:02e0a0aed4ec 156 break;
<> 150:02e0a0aed4ec 157 case ParityForced1:
<> 150:02e0a0aed4ec 158 case ParityForced0:
<> 150:02e0a0aed4ec 159 default:
<> 150:02e0a0aed4ec 160 MBED_ASSERT(0);
<> 150:02e0a0aed4ec 161 break;
<> 150:02e0a0aed4ec 162 }
<> 150:02e0a0aed4ec 163
<> 150:02e0a0aed4ec 164 switch (stop_bits) {
<> 150:02e0a0aed4ec 165 case 1:
<> 150:02e0a0aed4ec 166 obj->cfg.extra_stop = 0;
<> 150:02e0a0aed4ec 167 break;
<> 150:02e0a0aed4ec 168 case 2:
<> 150:02e0a0aed4ec 169 obj->cfg.extra_stop = 1;
<> 150:02e0a0aed4ec 170 break;
<> 150:02e0a0aed4ec 171 default:
<> 150:02e0a0aed4ec 172 MBED_ASSERT(0);
<> 150:02e0a0aed4ec 173 break;
<> 150:02e0a0aed4ec 174 }
<> 150:02e0a0aed4ec 175
<> 150:02e0a0aed4ec 176 int retval = UART_Init(obj->uart, &obj->cfg, NULL);
<> 150:02e0a0aed4ec 177 MBED_ASSERT(retval == E_NO_ERROR);
<> 150:02e0a0aed4ec 178 }
<> 150:02e0a0aed4ec 179
<> 150:02e0a0aed4ec 180 //******************************************************************************
<> 150:02e0a0aed4ec 181 void uart_handler(serial_t *obj)
<> 150:02e0a0aed4ec 182 {
<> 150:02e0a0aed4ec 183 if (obj && obj->id) {
<> 150:02e0a0aed4ec 184 irq_handler(obj->id, RxIrq);
<> 150:02e0a0aed4ec 185 }
<> 150:02e0a0aed4ec 186 }
<> 150:02e0a0aed4ec 187
<> 150:02e0a0aed4ec 188 void uart0_handler(void) { uart_handler(objs[0]); }
<> 150:02e0a0aed4ec 189 void uart1_handler(void) { uart_handler(objs[1]); }
<> 150:02e0a0aed4ec 190 void uart2_handler(void) { uart_handler(objs[2]); }
<> 150:02e0a0aed4ec 191
<> 150:02e0a0aed4ec 192 //******************************************************************************
<> 150:02e0a0aed4ec 193 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
<> 150:02e0a0aed4ec 194 {
<> 150:02e0a0aed4ec 195 irq_handler = handler;
<> 150:02e0a0aed4ec 196 obj->id = id;
<> 150:02e0a0aed4ec 197 }
<> 150:02e0a0aed4ec 198
<> 150:02e0a0aed4ec 199 //******************************************************************************
<> 150:02e0a0aed4ec 200 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
<> 150:02e0a0aed4ec 201 {
<> 150:02e0a0aed4ec 202 switch (obj->index) {
<> 150:02e0a0aed4ec 203 case 0:
<> 150:02e0a0aed4ec 204 NVIC_SetVector(UART0_IRQn, (uint32_t)uart0_handler);
<> 150:02e0a0aed4ec 205 NVIC_EnableIRQ(UART0_IRQn);
<> 150:02e0a0aed4ec 206 break;
<> 150:02e0a0aed4ec 207 case 1:
<> 150:02e0a0aed4ec 208 NVIC_SetVector(UART1_IRQn, (uint32_t)uart1_handler);
<> 150:02e0a0aed4ec 209 NVIC_EnableIRQ(UART1_IRQn);
<> 150:02e0a0aed4ec 210 break;
<> 150:02e0a0aed4ec 211 case 2:
<> 150:02e0a0aed4ec 212 NVIC_SetVector(UART2_IRQn, (uint32_t)uart2_handler);
<> 150:02e0a0aed4ec 213 NVIC_EnableIRQ(UART2_IRQn);
<> 150:02e0a0aed4ec 214 break;
<> 150:02e0a0aed4ec 215 default:
<> 150:02e0a0aed4ec 216 MBED_ASSERT(0);
<> 150:02e0a0aed4ec 217 }
<> 150:02e0a0aed4ec 218
<> 150:02e0a0aed4ec 219 if (irq == RxIrq) {
<> 150:02e0a0aed4ec 220 // Enable RX FIFO Threshold Interrupt
<> 150:02e0a0aed4ec 221 if (enable) {
<> 150:02e0a0aed4ec 222 // Clear pending interrupts
<> 150:02e0a0aed4ec 223 obj->uart->intfl = obj->uart->intfl;
<> 150:02e0a0aed4ec 224 obj->uart->inten |= (MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY | UART_ERRORS);
<> 150:02e0a0aed4ec 225 } else {
<> 150:02e0a0aed4ec 226 // Clear pending interrupts
<> 150:02e0a0aed4ec 227 obj->uart->intfl = obj->uart->intfl;
<> 150:02e0a0aed4ec 228 obj->uart->inten &= ~(MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY | UART_ERRORS);
<> 150:02e0a0aed4ec 229 }
<> 150:02e0a0aed4ec 230 } else if (irq == TxIrq) {
<> 150:02e0a0aed4ec 231 // Set TX Almost Empty level to interrupt when empty
<> 150:02e0a0aed4ec 232 MXC_SET_FIELD(&obj->uart->tx_fifo_ctrl, MXC_F_UART_RX_FIFO_CTRL_FIFO_AF_LVL,
<> 150:02e0a0aed4ec 233 (MXC_UART_FIFO_DEPTH - 1) << MXC_F_UART_TX_FIFO_CTRL_FIFO_AE_LVL_POS);
<> 150:02e0a0aed4ec 234
<> 150:02e0a0aed4ec 235 // Enable TX Almost Empty Interrupt
<> 150:02e0a0aed4ec 236 if (enable) {
<> 150:02e0a0aed4ec 237 // Clear pending interrupts
<> 150:02e0a0aed4ec 238 obj->uart->intfl = obj->uart->intfl;
<> 150:02e0a0aed4ec 239 obj->uart->inten |= MXC_F_UART_INTFL_TX_FIFO_AE;
<> 150:02e0a0aed4ec 240 } else {
<> 150:02e0a0aed4ec 241 // Clear pending interrupts
<> 150:02e0a0aed4ec 242 obj->uart->intfl = obj->uart->intfl;
<> 150:02e0a0aed4ec 243 obj->uart->inten &= ~MXC_F_UART_INTFL_TX_FIFO_AE;
<> 150:02e0a0aed4ec 244 }
<> 150:02e0a0aed4ec 245 } else {
<> 150:02e0a0aed4ec 246 MBED_ASSERT(0);
<> 150:02e0a0aed4ec 247 }
<> 150:02e0a0aed4ec 248 }
<> 150:02e0a0aed4ec 249
<> 150:02e0a0aed4ec 250 //******************************************************************************
<> 150:02e0a0aed4ec 251 int serial_getc(serial_t *obj)
<> 150:02e0a0aed4ec 252 {
<> 150:02e0a0aed4ec 253 int c = 0;
<> 150:02e0a0aed4ec 254
<> 150:02e0a0aed4ec 255 if (obj->rx != NC) {
<> 150:02e0a0aed4ec 256 // Wait for data to be available
<> 150:02e0a0aed4ec 257 while ((obj->uart->rx_fifo_ctrl & MXC_F_UART_RX_FIFO_CTRL_FIFO_ENTRY) == 0);
<> 150:02e0a0aed4ec 258
<> 150:02e0a0aed4ec 259 c = obj->fifo->rx;
<> 150:02e0a0aed4ec 260 }
<> 150:02e0a0aed4ec 261
<> 150:02e0a0aed4ec 262 return c;
<> 150:02e0a0aed4ec 263 }
<> 150:02e0a0aed4ec 264
<> 150:02e0a0aed4ec 265 //******************************************************************************
<> 150:02e0a0aed4ec 266 void serial_putc(serial_t *obj, int c)
<> 150:02e0a0aed4ec 267 {
<> 150:02e0a0aed4ec 268 if (obj->tx != NC) {
<> 150:02e0a0aed4ec 269 // Wait for room in the FIFO without blocking interrupts.
<> 150:02e0a0aed4ec 270 while (UART_NumWriteAvail(obj->uart) == 0);
<> 150:02e0a0aed4ec 271
<> 150:02e0a0aed4ec 272 // Must clear before every write to the buffer to know that the FIFO
<> 150:02e0a0aed4ec 273 // is empty when the TX DONE bit is set
<> 150:02e0a0aed4ec 274 obj->uart->intfl = MXC_F_UART_INTFL_TX_DONE;
<> 150:02e0a0aed4ec 275 obj->fifo->tx = (uint8_t)c;
<> 150:02e0a0aed4ec 276 }
<> 150:02e0a0aed4ec 277 }
<> 150:02e0a0aed4ec 278
<> 150:02e0a0aed4ec 279 //******************************************************************************
<> 150:02e0a0aed4ec 280 int serial_readable(serial_t *obj)
<> 150:02e0a0aed4ec 281 {
<> 150:02e0a0aed4ec 282 return UART_NumReadAvail(obj->uart);
<> 150:02e0a0aed4ec 283 }
<> 150:02e0a0aed4ec 284
<> 150:02e0a0aed4ec 285 //******************************************************************************
<> 150:02e0a0aed4ec 286 int serial_writable(serial_t *obj)
<> 150:02e0a0aed4ec 287 {
<> 150:02e0a0aed4ec 288 return UART_NumWriteAvail(obj->uart);
<> 150:02e0a0aed4ec 289 }
<> 150:02e0a0aed4ec 290
<> 150:02e0a0aed4ec 291 //******************************************************************************
<> 150:02e0a0aed4ec 292 void serial_clear(serial_t *obj)
<> 150:02e0a0aed4ec 293 {
<> 150:02e0a0aed4ec 294 // Clear the RX and TX FIFOs
<> 150:02e0a0aed4ec 295 UART_DrainRX(obj->uart);
<> 150:02e0a0aed4ec 296 UART_DrainTX(obj->uart);
<> 150:02e0a0aed4ec 297 }
<> 150:02e0a0aed4ec 298
<> 150:02e0a0aed4ec 299 //******************************************************************************
<> 150:02e0a0aed4ec 300 void serial_break_set(serial_t *obj)
<> 150:02e0a0aed4ec 301 {
<> 150:02e0a0aed4ec 302 // Make sure that nothing is being sent
<> 150:02e0a0aed4ec 303 while (((obj->uart->tx_fifo_ctrl & MXC_F_UART_TX_FIFO_CTRL_FIFO_ENTRY)
<> 150:02e0a0aed4ec 304 >> MXC_F_UART_TX_FIFO_CTRL_FIFO_ENTRY_POS) > 0);
<> 150:02e0a0aed4ec 305 while (!(obj->uart->intfl & MXC_F_UART_INTFL_TX_DONE));
<> 150:02e0a0aed4ec 306
<> 150:02e0a0aed4ec 307 // Configure TX to output 0
<> 150:02e0a0aed4ec 308 usurp_pin(obj->tx, 0);
<> 150:02e0a0aed4ec 309
<> 150:02e0a0aed4ec 310 // GPIO is setup now, but we need to unmap UART from the pin
<> 150:02e0a0aed4ec 311 pin_function_t *pin_func = (pin_function_t *)pinmap_find_function(obj->tx, PinMap_UART_TX);
<> 150:02e0a0aed4ec 312 *pin_func->reg_req &= ~MXC_F_IOMAN_UART_REQ_IO_REQ;
<> 150:02e0a0aed4ec 313 MBED_ASSERT((*pin_func->reg_ack & MXC_F_IOMAN_UART_ACK_IO_ACK) == 0);
<> 150:02e0a0aed4ec 314 }
<> 150:02e0a0aed4ec 315
<> 150:02e0a0aed4ec 316 //******************************************************************************
<> 150:02e0a0aed4ec 317 void serial_break_clear(serial_t *obj)
<> 150:02e0a0aed4ec 318 {
<> 150:02e0a0aed4ec 319 // Configure TX to output 1
<> 150:02e0a0aed4ec 320 usurp_pin(obj->tx, 1);
<> 150:02e0a0aed4ec 321 // Return TX to UART control
<> 150:02e0a0aed4ec 322 serial_pinout_tx(obj->tx);
<> 150:02e0a0aed4ec 323 }
<> 150:02e0a0aed4ec 324
<> 150:02e0a0aed4ec 325 //******************************************************************************
<> 150:02e0a0aed4ec 326 void serial_pinout_tx(PinName tx)
<> 150:02e0a0aed4ec 327 {
<> 150:02e0a0aed4ec 328 pinmap_pinout(tx, PinMap_UART_TX);
<> 150:02e0a0aed4ec 329 }
<> 150:02e0a0aed4ec 330
<> 150:02e0a0aed4ec 331 //******************************************************************************
<> 150:02e0a0aed4ec 332 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
<> 150:02e0a0aed4ec 333 {
<> 150:02e0a0aed4ec 334 pin_function_t rtscts_pin_func = {0};
<> 150:02e0a0aed4ec 335
<> 150:02e0a0aed4ec 336 obj->cfg.cts = 0;
<> 150:02e0a0aed4ec 337 obj->cfg.rts = 0;
<> 150:02e0a0aed4ec 338
<> 150:02e0a0aed4ec 339 if ((FlowControlCTS == type) || (FlowControlRTSCTS == type)) {
<> 150:02e0a0aed4ec 340 UARTName uart_cts = (UARTName)pinmap_peripheral(txflow, PinMap_UART_CTS);
<> 150:02e0a0aed4ec 341 UARTName uart = (UARTName)pinmap_merge(uart_cts, (UARTName)obj->uart);
<> 150:02e0a0aed4ec 342 // Assert pin is usable with existing uart
<> 150:02e0a0aed4ec 343 MBED_ASSERT(uart != (UARTName)NC);
<> 150:02e0a0aed4ec 344
<> 150:02e0a0aed4ec 345 pin_function_t *pin_func;
<> 150:02e0a0aed4ec 346 pin_func = (pin_function_t *)pinmap_find_function(txflow, PinMap_UART_CTS);
<> 150:02e0a0aed4ec 347 rtscts_pin_func.req_val |= pin_func->req_val;
<> 150:02e0a0aed4ec 348
<> 150:02e0a0aed4ec 349 obj->cfg.cts = 1;
<> 150:02e0a0aed4ec 350 }
<> 150:02e0a0aed4ec 351
<> 150:02e0a0aed4ec 352 if ((FlowControlRTS == type) || (FlowControlRTSCTS == type)) {
<> 150:02e0a0aed4ec 353 UARTName uart_rts = (UARTName)pinmap_peripheral(rxflow, PinMap_UART_RTS);
<> 150:02e0a0aed4ec 354 UARTName uart = (UARTName)pinmap_merge(uart_rts, (UARTName)obj->uart);
<> 150:02e0a0aed4ec 355 MBED_ASSERT(uart != (UARTName)NC);
<> 150:02e0a0aed4ec 356
<> 150:02e0a0aed4ec 357 pin_function_t *pin_func;
<> 150:02e0a0aed4ec 358 pin_func = (pin_function_t *)pinmap_find_function(rxflow, PinMap_UART_RTS);
<> 150:02e0a0aed4ec 359 rtscts_pin_func.req_val |= pin_func->req_val;
<> 150:02e0a0aed4ec 360
<> 150:02e0a0aed4ec 361 obj->cfg.rts = 1;
<> 150:02e0a0aed4ec 362 }
<> 150:02e0a0aed4ec 363
<> 150:02e0a0aed4ec 364 obj->sys_cfg.io_cfg.req_val.value |= rtscts_pin_func.req_val;
<> 150:02e0a0aed4ec 365
<> 150:02e0a0aed4ec 366 int retval = UART_Init(obj->uart, &obj->cfg, &obj->sys_cfg);
<> 150:02e0a0aed4ec 367 MBED_ASSERT(retval == E_NO_ERROR);
<> 150:02e0a0aed4ec 368 }
<> 150:02e0a0aed4ec 369
<> 150:02e0a0aed4ec 370 //******************************************************************************
<> 150:02e0a0aed4ec 371 static void usurp_pin(PinName pin, int state)
<> 150:02e0a0aed4ec 372 {
<> 150:02e0a0aed4ec 373 gpio_t gpio;
<> 150:02e0a0aed4ec 374 gpio_init_out(&gpio, pin);
<> 150:02e0a0aed4ec 375 gpio_write(&gpio, state);
<> 150:02e0a0aed4ec 376 }