Forked mbed-dev as I use an 20 pins stm32F042 and not the 32 pins version
Fork of mbed-dev by
targets/TARGET_NXP/TARGET_LPC82X/pwmout_api.c@153:0a78729d3229, 2017-01-22 (annotated)
- Committer:
- riktw
- Date:
- Sun Jan 22 22:20:36 2017 +0000
- Revision:
- 153:0a78729d3229
- Parent:
- 149:156823d33999
Back to 8Mhz clock. Revision 1.0
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /* mbed Microcontroller Library |
<> | 144:ef7eb2e8f9f7 | 2 | * Copyright (c) 2006-2013 ARM Limited |
<> | 144:ef7eb2e8f9f7 | 3 | * |
<> | 144:ef7eb2e8f9f7 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 144:ef7eb2e8f9f7 | 5 | * you may not use this file except in compliance with the License. |
<> | 144:ef7eb2e8f9f7 | 6 | * You may obtain a copy of the License at |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 144:ef7eb2e8f9f7 | 9 | * |
<> | 144:ef7eb2e8f9f7 | 10 | * Unless required by applicable law or agreed to in writing, software |
<> | 144:ef7eb2e8f9f7 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 144:ef7eb2e8f9f7 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 144:ef7eb2e8f9f7 | 13 | * See the License for the specific language governing permissions and |
<> | 144:ef7eb2e8f9f7 | 14 | * limitations under the License. |
<> | 144:ef7eb2e8f9f7 | 15 | */ |
<> | 144:ef7eb2e8f9f7 | 16 | #include "mbed_assert.h" |
<> | 144:ef7eb2e8f9f7 | 17 | #include "pwmout_api.h" |
<> | 144:ef7eb2e8f9f7 | 18 | #include "cmsis.h" |
<> | 144:ef7eb2e8f9f7 | 19 | #include "pinmap.h" |
<> | 144:ef7eb2e8f9f7 | 20 | #include "mbed_error.h" |
<> | 144:ef7eb2e8f9f7 | 21 | |
<> | 144:ef7eb2e8f9f7 | 22 | #if DEVICE_PWMOUT |
<> | 144:ef7eb2e8f9f7 | 23 | |
<> | 144:ef7eb2e8f9f7 | 24 | // bit flags for used SCTs |
<> | 144:ef7eb2e8f9f7 | 25 | static unsigned char sct_used = 0; |
<> | 144:ef7eb2e8f9f7 | 26 | |
<> | 144:ef7eb2e8f9f7 | 27 | static int get_available_sct() |
<> | 144:ef7eb2e8f9f7 | 28 | { |
<> | 144:ef7eb2e8f9f7 | 29 | int i; |
<> | 144:ef7eb2e8f9f7 | 30 | for (i = 0; i < 4; i++) { |
<> | 144:ef7eb2e8f9f7 | 31 | if ((sct_used & (1 << i)) == 0) |
<> | 144:ef7eb2e8f9f7 | 32 | return i; |
<> | 144:ef7eb2e8f9f7 | 33 | } |
<> | 144:ef7eb2e8f9f7 | 34 | return -1; |
<> | 144:ef7eb2e8f9f7 | 35 | } |
<> | 144:ef7eb2e8f9f7 | 36 | |
<> | 144:ef7eb2e8f9f7 | 37 | void pwmout_init(pwmout_t* obj, PinName pin) |
<> | 144:ef7eb2e8f9f7 | 38 | { |
<> | 144:ef7eb2e8f9f7 | 39 | MBED_ASSERT(pin != (PinName)NC); |
<> | 144:ef7eb2e8f9f7 | 40 | |
<> | 144:ef7eb2e8f9f7 | 41 | int sct_n = get_available_sct(); |
<> | 144:ef7eb2e8f9f7 | 42 | if (sct_n == -1) { |
<> | 144:ef7eb2e8f9f7 | 43 | error("No available SCT"); |
<> | 144:ef7eb2e8f9f7 | 44 | } |
<> | 144:ef7eb2e8f9f7 | 45 | |
<> | 144:ef7eb2e8f9f7 | 46 | sct_used |= (1 << sct_n); |
<> | 144:ef7eb2e8f9f7 | 47 | |
<> | 144:ef7eb2e8f9f7 | 48 | obj->pwm = (LPC_SCT_Type*)LPC_SCT; |
<> | 144:ef7eb2e8f9f7 | 49 | obj->pwm_ch = sct_n; |
<> | 144:ef7eb2e8f9f7 | 50 | |
<> | 144:ef7eb2e8f9f7 | 51 | LPC_SCT_Type* pwm = obj->pwm; |
<> | 144:ef7eb2e8f9f7 | 52 | |
<> | 144:ef7eb2e8f9f7 | 53 | // Enable the SCT clock |
<> | 144:ef7eb2e8f9f7 | 54 | LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 8); |
<> | 144:ef7eb2e8f9f7 | 55 | |
<> | 144:ef7eb2e8f9f7 | 56 | // Clear peripheral reset the SCT: |
<> | 144:ef7eb2e8f9f7 | 57 | LPC_SYSCON->PRESETCTRL |= (1 << 8); |
<> | 144:ef7eb2e8f9f7 | 58 | |
<> | 144:ef7eb2e8f9f7 | 59 | switch(sct_n) { |
<> | 144:ef7eb2e8f9f7 | 60 | case 0: |
<> | 144:ef7eb2e8f9f7 | 61 | // SCT_OUT0 |
<> | 144:ef7eb2e8f9f7 | 62 | LPC_SWM->PINASSIGN[7] &= ~0xFF000000; |
<> | 144:ef7eb2e8f9f7 | 63 | LPC_SWM->PINASSIGN[7] |= ((pin >> PIN_SHIFT) << 24); |
<> | 144:ef7eb2e8f9f7 | 64 | break; |
<> | 144:ef7eb2e8f9f7 | 65 | case 1: |
<> | 144:ef7eb2e8f9f7 | 66 | // SCT_OUT1 |
<> | 144:ef7eb2e8f9f7 | 67 | LPC_SWM->PINASSIGN[8] &= ~0x000000FF; |
<> | 144:ef7eb2e8f9f7 | 68 | LPC_SWM->PINASSIGN[8] |= (pin >> PIN_SHIFT); |
<> | 144:ef7eb2e8f9f7 | 69 | break; |
<> | 144:ef7eb2e8f9f7 | 70 | case 2: |
<> | 144:ef7eb2e8f9f7 | 71 | // SCT2_OUT2 |
<> | 144:ef7eb2e8f9f7 | 72 | LPC_SWM->PINASSIGN[8] &= ~0x0000FF00; |
<> | 144:ef7eb2e8f9f7 | 73 | LPC_SWM->PINASSIGN[8] |= ((pin >> PIN_SHIFT) << 8); |
<> | 144:ef7eb2e8f9f7 | 74 | break; |
<> | 144:ef7eb2e8f9f7 | 75 | case 3: |
<> | 144:ef7eb2e8f9f7 | 76 | // SCT3_OUT3 |
<> | 144:ef7eb2e8f9f7 | 77 | LPC_SWM->PINASSIGN[8] &= ~0x00FF0000; |
<> | 144:ef7eb2e8f9f7 | 78 | LPC_SWM->PINASSIGN[8] |= ((pin >> PIN_SHIFT) << 16); |
<> | 144:ef7eb2e8f9f7 | 79 | break; |
<> | 144:ef7eb2e8f9f7 | 80 | default: |
<> | 144:ef7eb2e8f9f7 | 81 | break; |
<> | 144:ef7eb2e8f9f7 | 82 | } |
<> | 144:ef7eb2e8f9f7 | 83 | |
<> | 144:ef7eb2e8f9f7 | 84 | // Unified 32-bit counter, autolimit |
<> | 144:ef7eb2e8f9f7 | 85 | pwm->CONFIG |= ((0x3 << 17) | 0x01); |
<> | 144:ef7eb2e8f9f7 | 86 | |
<> | 144:ef7eb2e8f9f7 | 87 | // halt and clear the counter |
<> | 144:ef7eb2e8f9f7 | 88 | pwm->CTRL |= (1 << 2) | (1 << 3); |
<> | 144:ef7eb2e8f9f7 | 89 | |
<> | 144:ef7eb2e8f9f7 | 90 | // System Clock -> us_ticker (1)MHz |
<> | 144:ef7eb2e8f9f7 | 91 | pwm->CTRL &= ~(0x7F << 5); |
<> | 144:ef7eb2e8f9f7 | 92 | pwm->CTRL |= (((SystemCoreClock/1000000 - 1) & 0x7F) << 5); |
<> | 144:ef7eb2e8f9f7 | 93 | |
<> | 144:ef7eb2e8f9f7 | 94 | // Set event number |
<> | 144:ef7eb2e8f9f7 | 95 | pwm->OUT[sct_n].SET = (1 << ((sct_n * 2) + 0)); |
<> | 144:ef7eb2e8f9f7 | 96 | pwm->OUT[sct_n].CLR = (1 << ((sct_n * 2) + 1)); |
<> | 144:ef7eb2e8f9f7 | 97 | |
<> | 144:ef7eb2e8f9f7 | 98 | pwm->EVENT[(sct_n * 2) + 0].CTRL = (1 << 12) | ((sct_n * 2) + 0); // match event |
<> | 144:ef7eb2e8f9f7 | 99 | pwm->EVENT[(sct_n * 2) + 0].STATE = 0xFFFFFFFF; |
<> | 144:ef7eb2e8f9f7 | 100 | pwm->EVENT[(sct_n * 2) + 1].CTRL = (1 << 12) | ((sct_n * 2) + 1); |
<> | 144:ef7eb2e8f9f7 | 101 | pwm->EVENT[(sct_n * 2) + 1].STATE = 0xFFFFFFFF; |
<> | 144:ef7eb2e8f9f7 | 102 | |
<> | 144:ef7eb2e8f9f7 | 103 | // default to 20ms: standard for servos, and fine for e.g. brightness control |
<> | 144:ef7eb2e8f9f7 | 104 | pwmout_period_ms(obj, 20); |
<> | 144:ef7eb2e8f9f7 | 105 | pwmout_write (obj, 0); |
<> | 144:ef7eb2e8f9f7 | 106 | } |
<> | 144:ef7eb2e8f9f7 | 107 | |
<> | 144:ef7eb2e8f9f7 | 108 | void pwmout_free(pwmout_t* obj) |
<> | 144:ef7eb2e8f9f7 | 109 | { |
<> | 144:ef7eb2e8f9f7 | 110 | // Disable the SCT clock |
<> | 144:ef7eb2e8f9f7 | 111 | LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 8); |
<> | 144:ef7eb2e8f9f7 | 112 | sct_used &= ~(1 << obj->pwm_ch); |
<> | 144:ef7eb2e8f9f7 | 113 | } |
<> | 144:ef7eb2e8f9f7 | 114 | |
<> | 144:ef7eb2e8f9f7 | 115 | void pwmout_write(pwmout_t* obj, float value) |
<> | 144:ef7eb2e8f9f7 | 116 | { |
<> | 144:ef7eb2e8f9f7 | 117 | if (value < 0.0f) { |
<> | 144:ef7eb2e8f9f7 | 118 | value = 0.0; |
<> | 144:ef7eb2e8f9f7 | 119 | } else if (value > 1.0f) { |
<> | 144:ef7eb2e8f9f7 | 120 | value = 1.0f; |
<> | 144:ef7eb2e8f9f7 | 121 | } |
<> | 144:ef7eb2e8f9f7 | 122 | uint32_t t_on = (uint32_t)((float)(obj->pwm->MATCHREL[obj->pwm_ch * 2] + 1) * value); |
<> | 144:ef7eb2e8f9f7 | 123 | if (t_on > 0) { // duty is not 0% |
<> | 144:ef7eb2e8f9f7 | 124 | if (value != 1.0f) { // duty is not 100% |
<> | 144:ef7eb2e8f9f7 | 125 | obj->pwm->MATCHREL[(obj->pwm_ch * 2) + 1] = t_on - 1; |
<> | 144:ef7eb2e8f9f7 | 126 | // unhalt the counter |
<> | 144:ef7eb2e8f9f7 | 127 | obj->pwm->CTRL &= ~(1 << 2); |
<> | 144:ef7eb2e8f9f7 | 128 | } else { // duty is 100% |
<> | 144:ef7eb2e8f9f7 | 129 | // halt and clear the counter |
<> | 144:ef7eb2e8f9f7 | 130 | obj->pwm->CTRL |= (1 << 2) | (1 << 3); |
<> | 144:ef7eb2e8f9f7 | 131 | // output level tied to high |
<> | 144:ef7eb2e8f9f7 | 132 | obj->pwm->OUTPUT |= (1 << obj->pwm_ch); |
<> | 144:ef7eb2e8f9f7 | 133 | } |
<> | 144:ef7eb2e8f9f7 | 134 | } else { // duty is 0% |
<> | 144:ef7eb2e8f9f7 | 135 | // halt and clear the counter |
<> | 144:ef7eb2e8f9f7 | 136 | obj->pwm->CTRL |= (1 << 2) | (1 << 3); |
<> | 144:ef7eb2e8f9f7 | 137 | // output level tied to low |
<> | 144:ef7eb2e8f9f7 | 138 | obj->pwm->OUTPUT &= ~(1 << obj->pwm_ch); |
<> | 144:ef7eb2e8f9f7 | 139 | } |
<> | 144:ef7eb2e8f9f7 | 140 | } |
<> | 144:ef7eb2e8f9f7 | 141 | |
<> | 144:ef7eb2e8f9f7 | 142 | float pwmout_read(pwmout_t* obj) |
<> | 144:ef7eb2e8f9f7 | 143 | { |
<> | 144:ef7eb2e8f9f7 | 144 | uint32_t t_off = obj->pwm->MATCHREL[(obj->pwm_ch * 2) + 0] + 1; |
<> | 144:ef7eb2e8f9f7 | 145 | uint32_t t_on = obj->pwm->MATCHREL[(obj->pwm_ch * 2) + 1] + 1; |
<> | 144:ef7eb2e8f9f7 | 146 | float v = (float)t_on/(float)t_off; |
<> | 144:ef7eb2e8f9f7 | 147 | return (v > 1.0f) ? (1.0f) : (v); |
<> | 144:ef7eb2e8f9f7 | 148 | } |
<> | 144:ef7eb2e8f9f7 | 149 | |
<> | 144:ef7eb2e8f9f7 | 150 | void pwmout_period(pwmout_t* obj, float seconds) |
<> | 144:ef7eb2e8f9f7 | 151 | { |
<> | 144:ef7eb2e8f9f7 | 152 | pwmout_period_us(obj, seconds * 1000000.0f); |
<> | 144:ef7eb2e8f9f7 | 153 | } |
<> | 144:ef7eb2e8f9f7 | 154 | |
<> | 144:ef7eb2e8f9f7 | 155 | void pwmout_period_ms(pwmout_t* obj, int ms) |
<> | 144:ef7eb2e8f9f7 | 156 | { |
<> | 144:ef7eb2e8f9f7 | 157 | pwmout_period_us(obj, ms * 1000); |
<> | 144:ef7eb2e8f9f7 | 158 | } |
<> | 144:ef7eb2e8f9f7 | 159 | |
<> | 144:ef7eb2e8f9f7 | 160 | // Set the PWM period, keeping the duty cycle the same. |
<> | 144:ef7eb2e8f9f7 | 161 | void pwmout_period_us(pwmout_t* obj, int us) |
<> | 144:ef7eb2e8f9f7 | 162 | { |
<> | 144:ef7eb2e8f9f7 | 163 | // The period are off by one for MATCHREL, so +1 to get actual value |
<> | 144:ef7eb2e8f9f7 | 164 | uint32_t t_off = obj->pwm->MATCHREL[(obj->pwm_ch * 2) + 0] + 1; |
<> | 144:ef7eb2e8f9f7 | 165 | uint32_t t_on = obj->pwm->MATCHREL[(obj->pwm_ch * 2) + 1] + 1; |
<> | 144:ef7eb2e8f9f7 | 166 | float v = (float)t_on/(float)t_off; |
<> | 144:ef7eb2e8f9f7 | 167 | obj->pwm->MATCHREL[(obj->pwm_ch * 2) + 0] = (uint32_t)us - 1; |
<> | 144:ef7eb2e8f9f7 | 168 | if (us > 0) { // PWM period is not 0 |
<> | 144:ef7eb2e8f9f7 | 169 | obj->pwm->MATCHREL[(obj->pwm_ch * 2) + 1] = (uint32_t)((float)us * (float)v) - 1; |
<> | 144:ef7eb2e8f9f7 | 170 | // unhalt the counter |
<> | 144:ef7eb2e8f9f7 | 171 | obj->pwm->CTRL &= ~(1 << 2); |
<> | 144:ef7eb2e8f9f7 | 172 | } else { // PWM period is 0 |
<> | 144:ef7eb2e8f9f7 | 173 | // halt and clear the counter |
<> | 144:ef7eb2e8f9f7 | 174 | obj->pwm->CTRL |= (1 << 2) | (1 << 3); |
<> | 144:ef7eb2e8f9f7 | 175 | // output level tied to low |
<> | 144:ef7eb2e8f9f7 | 176 | obj->pwm->OUTPUT &= ~(1 << obj->pwm_ch); |
<> | 144:ef7eb2e8f9f7 | 177 | } |
<> | 144:ef7eb2e8f9f7 | 178 | } |
<> | 144:ef7eb2e8f9f7 | 179 | |
<> | 144:ef7eb2e8f9f7 | 180 | void pwmout_pulsewidth(pwmout_t* obj, float seconds) |
<> | 144:ef7eb2e8f9f7 | 181 | { |
<> | 144:ef7eb2e8f9f7 | 182 | pwmout_pulsewidth_us(obj, seconds * 1000000.0f); |
<> | 144:ef7eb2e8f9f7 | 183 | } |
<> | 144:ef7eb2e8f9f7 | 184 | |
<> | 144:ef7eb2e8f9f7 | 185 | void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) |
<> | 144:ef7eb2e8f9f7 | 186 | { |
<> | 144:ef7eb2e8f9f7 | 187 | pwmout_pulsewidth_us(obj, ms * 1000); |
<> | 144:ef7eb2e8f9f7 | 188 | } |
<> | 144:ef7eb2e8f9f7 | 189 | |
<> | 144:ef7eb2e8f9f7 | 190 | void pwmout_pulsewidth_us(pwmout_t* obj, int us) |
<> | 144:ef7eb2e8f9f7 | 191 | { |
<> | 144:ef7eb2e8f9f7 | 192 | if (us > 0) { // PWM peried is not 0 |
<> | 144:ef7eb2e8f9f7 | 193 | obj->pwm->MATCHREL[(obj->pwm_ch * 2) + 1] = (uint32_t)us - 1; |
<> | 144:ef7eb2e8f9f7 | 194 | obj->pwm->CTRL &= ~(1 << 2); |
<> | 144:ef7eb2e8f9f7 | 195 | } else { //PWM period is 0 |
<> | 144:ef7eb2e8f9f7 | 196 | // halt and clear the counter |
<> | 144:ef7eb2e8f9f7 | 197 | obj->pwm->CTRL |= (1 << 2) | (1 << 3); |
<> | 144:ef7eb2e8f9f7 | 198 | // output level tied to low |
<> | 144:ef7eb2e8f9f7 | 199 | obj->pwm->OUTPUT &= ~(1 << obj->pwm_ch); |
<> | 144:ef7eb2e8f9f7 | 200 | } |
<> | 144:ef7eb2e8f9f7 | 201 | } |
<> | 144:ef7eb2e8f9f7 | 202 | |
<> | 144:ef7eb2e8f9f7 | 203 | #endif |