Forked mbed-dev as I use an 20 pins stm32F042 and not the 32 pins version
Fork of mbed-dev by
targets/TARGET_Freescale/TARGET_KLXX/gpio_api.c@153:0a78729d3229, 2017-01-22 (annotated)
- Committer:
- riktw
- Date:
- Sun Jan 22 22:20:36 2017 +0000
- Revision:
- 153:0a78729d3229
- Parent:
- 149:156823d33999
Back to 8Mhz clock. Revision 1.0
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /* mbed Microcontroller Library |
<> | 144:ef7eb2e8f9f7 | 2 | * Copyright (c) 2006-2013 ARM Limited |
<> | 144:ef7eb2e8f9f7 | 3 | * |
<> | 144:ef7eb2e8f9f7 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 144:ef7eb2e8f9f7 | 5 | * you may not use this file except in compliance with the License. |
<> | 144:ef7eb2e8f9f7 | 6 | * You may obtain a copy of the License at |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 144:ef7eb2e8f9f7 | 9 | * |
<> | 144:ef7eb2e8f9f7 | 10 | * Unless required by applicable law or agreed to in writing, software |
<> | 144:ef7eb2e8f9f7 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 144:ef7eb2e8f9f7 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 144:ef7eb2e8f9f7 | 13 | * See the License for the specific language governing permissions and |
<> | 144:ef7eb2e8f9f7 | 14 | * limitations under the License. |
<> | 144:ef7eb2e8f9f7 | 15 | */ |
<> | 144:ef7eb2e8f9f7 | 16 | #include "mbed_assert.h" |
<> | 144:ef7eb2e8f9f7 | 17 | #include "gpio_api.h" |
<> | 144:ef7eb2e8f9f7 | 18 | #include "pinmap.h" |
<> | 144:ef7eb2e8f9f7 | 19 | |
<> | 144:ef7eb2e8f9f7 | 20 | uint32_t gpio_set(PinName pin) { |
<> | 144:ef7eb2e8f9f7 | 21 | MBED_ASSERT(pin != (PinName)NC); |
<> | 144:ef7eb2e8f9f7 | 22 | pin_function(pin, 1); |
<> | 144:ef7eb2e8f9f7 | 23 | return 1 << ((pin & 0x7F) >> 2); |
<> | 144:ef7eb2e8f9f7 | 24 | } |
<> | 144:ef7eb2e8f9f7 | 25 | |
<> | 144:ef7eb2e8f9f7 | 26 | void gpio_init(gpio_t *obj, PinName pin) { |
<> | 144:ef7eb2e8f9f7 | 27 | obj->pin = pin; |
<> | 144:ef7eb2e8f9f7 | 28 | if (pin == (PinName)NC) |
<> | 144:ef7eb2e8f9f7 | 29 | return; |
<> | 144:ef7eb2e8f9f7 | 30 | |
<> | 144:ef7eb2e8f9f7 | 31 | obj->mask = gpio_set(pin); |
<> | 144:ef7eb2e8f9f7 | 32 | |
<> | 144:ef7eb2e8f9f7 | 33 | unsigned int port = (unsigned int)pin >> PORT_SHIFT; |
<> | 144:ef7eb2e8f9f7 | 34 | |
<> | 144:ef7eb2e8f9f7 | 35 | #if defined(TARGET_KL43Z) |
<> | 144:ef7eb2e8f9f7 | 36 | GPIO_Type *reg = (GPIO_Type *)(GPIOA_BASE + port * 0x40); |
<> | 144:ef7eb2e8f9f7 | 37 | #else |
<> | 144:ef7eb2e8f9f7 | 38 | FGPIO_Type *reg = (FGPIO_Type *)(FPTA_BASE + port * 0x40); |
<> | 144:ef7eb2e8f9f7 | 39 | #endif |
<> | 144:ef7eb2e8f9f7 | 40 | obj->reg_set = ®->PSOR; |
<> | 144:ef7eb2e8f9f7 | 41 | obj->reg_clr = ®->PCOR; |
<> | 144:ef7eb2e8f9f7 | 42 | obj->reg_in = ®->PDIR; |
<> | 144:ef7eb2e8f9f7 | 43 | obj->reg_dir = ®->PDDR; |
<> | 144:ef7eb2e8f9f7 | 44 | } |
<> | 144:ef7eb2e8f9f7 | 45 | |
<> | 144:ef7eb2e8f9f7 | 46 | void gpio_mode(gpio_t *obj, PinMode mode) { |
<> | 144:ef7eb2e8f9f7 | 47 | pin_mode(obj->pin, mode); |
<> | 144:ef7eb2e8f9f7 | 48 | } |
<> | 144:ef7eb2e8f9f7 | 49 | |
<> | 144:ef7eb2e8f9f7 | 50 | void gpio_dir(gpio_t *obj, PinDirection direction) { |
<> | 144:ef7eb2e8f9f7 | 51 | MBED_ASSERT(obj->pin != (PinName)NC); |
<> | 144:ef7eb2e8f9f7 | 52 | switch (direction) { |
<> | 144:ef7eb2e8f9f7 | 53 | case PIN_INPUT : |
<> | 144:ef7eb2e8f9f7 | 54 | *obj->reg_dir &= ~obj->mask; |
<> | 144:ef7eb2e8f9f7 | 55 | break; |
<> | 144:ef7eb2e8f9f7 | 56 | case PIN_OUTPUT: |
<> | 144:ef7eb2e8f9f7 | 57 | *obj->reg_dir |= obj->mask; |
<> | 144:ef7eb2e8f9f7 | 58 | break; |
<> | 144:ef7eb2e8f9f7 | 59 | } |
<> | 144:ef7eb2e8f9f7 | 60 | } |