cleaned version of TFT + Ethernet
Dependents: XPL-App4_cleanup XPL-App5
Watchdog.cpp@0:9688737bf8cd, 2018-10-09 (annotated)
- Committer:
- richnash
- Date:
- Tue Oct 09 17:37:23 2018 +0000
- Revision:
- 0:9688737bf8cd
move to cli to explore D11 fix
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
richnash | 0:9688737bf8cd | 1 | /// @file Watchdog.cpp provides the interface to the Watchdog module |
richnash | 0:9688737bf8cd | 2 | /// |
richnash | 0:9688737bf8cd | 3 | /// This provides basic Watchdog service for the mbed. You can configure |
richnash | 0:9688737bf8cd | 4 | /// various timeout intervals that meet your system needs. Additionally, |
richnash | 0:9688737bf8cd | 5 | /// it is possible to identify if the Watchdog was the cause of any |
richnash | 0:9688737bf8cd | 6 | /// system restart. |
richnash | 0:9688737bf8cd | 7 | /// |
richnash | 0:9688737bf8cd | 8 | /// Adapted from Simon's Watchdog code from http://mbed.org/forum/mbed/topic/508/ |
richnash | 0:9688737bf8cd | 9 | /// |
richnash | 0:9688737bf8cd | 10 | /// @note Copyright © 2011 by Smartware Computing, all rights reserved. |
richnash | 0:9688737bf8cd | 11 | /// This software may be used to derive new software, as long as |
richnash | 0:9688737bf8cd | 12 | /// this copyright statement remains in the source file. |
richnash | 0:9688737bf8cd | 13 | /// @author David Smart |
richnash | 0:9688737bf8cd | 14 | /// |
richnash | 0:9688737bf8cd | 15 | /// @note Copyright © 2015 by NBRemond, all rights reserved. |
richnash | 0:9688737bf8cd | 16 | /// This software may be used to derive new software, as long as |
richnash | 0:9688737bf8cd | 17 | /// this copyright statement remains in the source file. |
richnash | 0:9688737bf8cd | 18 | /// |
richnash | 0:9688737bf8cd | 19 | /// Added support for STM32 Nucleo platforms |
richnash | 0:9688737bf8cd | 20 | /// |
richnash | 0:9688737bf8cd | 21 | /// @author Bernaérd Remond |
richnash | 0:9688737bf8cd | 22 | /// |
richnash | 0:9688737bf8cd | 23 | |
richnash | 0:9688737bf8cd | 24 | //#define LPC |
richnash | 0:9688737bf8cd | 25 | #define ST_NUCLEO |
richnash | 0:9688737bf8cd | 26 | |
richnash | 0:9688737bf8cd | 27 | |
richnash | 0:9688737bf8cd | 28 | #include "mbed.h" |
richnash | 0:9688737bf8cd | 29 | #include "Watchdog.h" |
richnash | 0:9688737bf8cd | 30 | |
richnash | 0:9688737bf8cd | 31 | |
richnash | 0:9688737bf8cd | 32 | /// Watchdog gets instantiated at the module level |
richnash | 0:9688737bf8cd | 33 | Watchdog::Watchdog() { |
richnash | 0:9688737bf8cd | 34 | #ifdef LPC |
richnash | 0:9688737bf8cd | 35 | wdreset = (LPC_WDT->WDMOD >> 2) & 1; // capture the cause of the previous reset |
richnash | 0:9688737bf8cd | 36 | #endif |
richnash | 0:9688737bf8cd | 37 | #ifdef ST_NUCLEO |
richnash | 0:9688737bf8cd | 38 | // capture the cause of the previous reset |
richnash | 0:9688737bf8cd | 39 | /* Check if the system has resumed from IWDG reset */ |
richnash | 0:9688737bf8cd | 40 | if (__HAL_RCC_GET_FLAG(RCC_FLAG_IWDGRST)) { |
richnash | 0:9688737bf8cd | 41 | //if (RCC_GetFlagStatus(RCC_FLAG_IWDGRST)) { |
richnash | 0:9688737bf8cd | 42 | wdreset = true; |
richnash | 0:9688737bf8cd | 43 | } |
richnash | 0:9688737bf8cd | 44 | else { |
richnash | 0:9688737bf8cd | 45 | wdreset = false; |
richnash | 0:9688737bf8cd | 46 | } |
richnash | 0:9688737bf8cd | 47 | |
richnash | 0:9688737bf8cd | 48 | // wdreset = false; |
richnash | 0:9688737bf8cd | 49 | #endif |
richnash | 0:9688737bf8cd | 50 | |
richnash | 0:9688737bf8cd | 51 | } |
richnash | 0:9688737bf8cd | 52 | |
richnash | 0:9688737bf8cd | 53 | /// Load timeout value in watchdog timer and enable |
richnash | 0:9688737bf8cd | 54 | void Watchdog::Configure(float timeout) { |
richnash | 0:9688737bf8cd | 55 | #ifdef LPC |
richnash | 0:9688737bf8cd | 56 | LPC_WDT->WDCLKSEL = 0x1; // Set CLK src to PCLK |
richnash | 0:9688737bf8cd | 57 | uint32_t clk = SystemCoreClock / 16; // WD has a fixed /4 prescaler, PCLK default is /4 |
richnash | 0:9688737bf8cd | 58 | LPC_WDT->WDTC = (uint32_t)(timeout * (float)clk); |
richnash | 0:9688737bf8cd | 59 | LPC_WDT->WDMOD = 0x3; // Enabled and Reset |
richnash | 0:9688737bf8cd | 60 | #endif |
richnash | 0:9688737bf8cd | 61 | #ifdef ST_NUCLEO |
richnash | 0:9688737bf8cd | 62 | // see http://embedded-lab.com/blog/?p=9662 |
richnash | 0:9688737bf8cd | 63 | #define LsiFreq (45000) |
richnash | 0:9688737bf8cd | 64 | |
richnash | 0:9688737bf8cd | 65 | uint16_t PrescalerCode; |
richnash | 0:9688737bf8cd | 66 | uint16_t Prescaler; |
richnash | 0:9688737bf8cd | 67 | uint16_t ReloadValue; |
richnash | 0:9688737bf8cd | 68 | float Calculated_timeout; |
richnash | 0:9688737bf8cd | 69 | |
richnash | 0:9688737bf8cd | 70 | if ((timeout * (LsiFreq/4)) < 0x7FF) { |
richnash | 0:9688737bf8cd | 71 | PrescalerCode = IWDG_PRESCALER_4; |
richnash | 0:9688737bf8cd | 72 | Prescaler = 4; |
richnash | 0:9688737bf8cd | 73 | } |
richnash | 0:9688737bf8cd | 74 | else if ((timeout * (LsiFreq/8)) < 0xFF0) { |
richnash | 0:9688737bf8cd | 75 | PrescalerCode = IWDG_PRESCALER_8; |
richnash | 0:9688737bf8cd | 76 | Prescaler = 8; |
richnash | 0:9688737bf8cd | 77 | } |
richnash | 0:9688737bf8cd | 78 | else if ((timeout * (LsiFreq/16)) < 0xFF0) { |
richnash | 0:9688737bf8cd | 79 | PrescalerCode = IWDG_PRESCALER_16; |
richnash | 0:9688737bf8cd | 80 | Prescaler = 16; |
richnash | 0:9688737bf8cd | 81 | } |
richnash | 0:9688737bf8cd | 82 | else if ((timeout * (LsiFreq/32)) < 0xFF0) { |
richnash | 0:9688737bf8cd | 83 | PrescalerCode = IWDG_PRESCALER_32; |
richnash | 0:9688737bf8cd | 84 | Prescaler = 32; |
richnash | 0:9688737bf8cd | 85 | } |
richnash | 0:9688737bf8cd | 86 | else if ((timeout * (LsiFreq/64)) < 0xFF0) { |
richnash | 0:9688737bf8cd | 87 | PrescalerCode = IWDG_PRESCALER_64; |
richnash | 0:9688737bf8cd | 88 | Prescaler = 64; |
richnash | 0:9688737bf8cd | 89 | } |
richnash | 0:9688737bf8cd | 90 | else if ((timeout * (LsiFreq/128)) < 0xFF0) { |
richnash | 0:9688737bf8cd | 91 | PrescalerCode = IWDG_PRESCALER_128; |
richnash | 0:9688737bf8cd | 92 | Prescaler = 128; |
richnash | 0:9688737bf8cd | 93 | } |
richnash | 0:9688737bf8cd | 94 | else { |
richnash | 0:9688737bf8cd | 95 | PrescalerCode = IWDG_PRESCALER_256; |
richnash | 0:9688737bf8cd | 96 | Prescaler = 256; |
richnash | 0:9688737bf8cd | 97 | } |
richnash | 0:9688737bf8cd | 98 | |
richnash | 0:9688737bf8cd | 99 | // specifies the IWDG Reload value. This parameter must be a number between 0 and 0x0FFF. |
richnash | 0:9688737bf8cd | 100 | ReloadValue = (uint32_t)(timeout * (LsiFreq/Prescaler)); |
richnash | 0:9688737bf8cd | 101 | |
richnash | 0:9688737bf8cd | 102 | Calculated_timeout = ((float)(Prescaler * ReloadValue)) / LsiFreq; |
richnash | 0:9688737bf8cd | 103 | printf("WATCHDOG set with prescaler:%d reload value: 0x%X - timeout:%f\r\n",Prescaler, ReloadValue, Calculated_timeout); |
richnash | 0:9688737bf8cd | 104 | |
richnash | 0:9688737bf8cd | 105 | IWDG->KR = 0x5555; //Disable write protection of IWDG registers |
richnash | 0:9688737bf8cd | 106 | IWDG->PR = PrescalerCode; //Set PR value |
richnash | 0:9688737bf8cd | 107 | IWDG->RLR = ReloadValue; //Set RLR value |
richnash | 0:9688737bf8cd | 108 | IWDG->KR = 0xAAAA; //Reload IWDG |
richnash | 0:9688737bf8cd | 109 | IWDG->KR = 0xCCCC; //Start IWDG - See more at: http://embedded-lab.com/blog/?p=9662#sthash.6VNxVSn0.dpuf |
richnash | 0:9688737bf8cd | 110 | #endif |
richnash | 0:9688737bf8cd | 111 | |
richnash | 0:9688737bf8cd | 112 | Service(); |
richnash | 0:9688737bf8cd | 113 | } |
richnash | 0:9688737bf8cd | 114 | |
richnash | 0:9688737bf8cd | 115 | /// "Service", "kick" or "feed" the dog - reset the watchdog timer |
richnash | 0:9688737bf8cd | 116 | /// by writing this required bit pattern |
richnash | 0:9688737bf8cd | 117 | void Watchdog::Service() { |
richnash | 0:9688737bf8cd | 118 | #ifdef LPC |
richnash | 0:9688737bf8cd | 119 | LPC_WDT->WDFEED = 0xAA; |
richnash | 0:9688737bf8cd | 120 | LPC_WDT->WDFEED = 0x55; |
richnash | 0:9688737bf8cd | 121 | #endif |
richnash | 0:9688737bf8cd | 122 | #ifdef ST_NUCLEO |
richnash | 0:9688737bf8cd | 123 | IWDG->KR = 0xAAAA; //Reload IWDG - See more at: http://embedded-lab.com/blog/?p=9662#sthash.6VNxVSn0.dpuf |
richnash | 0:9688737bf8cd | 124 | #endif |
richnash | 0:9688737bf8cd | 125 | } |
richnash | 0:9688737bf8cd | 126 | |
richnash | 0:9688737bf8cd | 127 | /// get the flag to indicate if the watchdog causes the reset |
richnash | 0:9688737bf8cd | 128 | bool Watchdog::WatchdogCausedReset() { |
richnash | 0:9688737bf8cd | 129 | return wdreset; |
richnash | 0:9688737bf8cd | 130 | } |
richnash | 0:9688737bf8cd | 131 | |
richnash | 0:9688737bf8cd | 132 |