meh

Fork of mbed by mbed official

Committer:
Kojto
Date:
Tue Oct 28 16:40:41 2014 +0000
Revision:
90:cb3d968589d8
Parent:
85:024bf7f99721
Child:
99:dbbf35b96557
Release 90 of the mbed library

Changes:

- Freescale KSDK update (v1.0)
- K22 - new target addition
- KL43Z - new target addition
- Nucleo F091RC - new target addition
- Nucleo L152RE - STM32Cube driver
- Nordic - Softdevice v7.1.0
- Nvic files - BSD License
- LPC824 - various HAL fixes
- Nucleo F411RE - CMSIS - IAR files

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32f4xx_hal_dcmi.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
Kojto 90:cb3d968589d8 5 * @version V1.1.0
Kojto 90:cb3d968589d8 6 * @date 19-June-2014
emilmont 77:869cf507173a 7 * @brief Header file of DCMI HAL module.
emilmont 77:869cf507173a 8 ******************************************************************************
emilmont 77:869cf507173a 9 * @attention
emilmont 77:869cf507173a 10 *
emilmont 77:869cf507173a 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 12 *
emilmont 77:869cf507173a 13 * Redistribution and use in source and binary forms, with or without modification,
emilmont 77:869cf507173a 14 * are permitted provided that the following conditions are met:
emilmont 77:869cf507173a 15 * 1. Redistributions of source code must retain the above copyright notice,
emilmont 77:869cf507173a 16 * this list of conditions and the following disclaimer.
emilmont 77:869cf507173a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
emilmont 77:869cf507173a 18 * this list of conditions and the following disclaimer in the documentation
emilmont 77:869cf507173a 19 * and/or other materials provided with the distribution.
emilmont 77:869cf507173a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
emilmont 77:869cf507173a 21 * may be used to endorse or promote products derived from this software
emilmont 77:869cf507173a 22 * without specific prior written permission.
emilmont 77:869cf507173a 23 *
emilmont 77:869cf507173a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
emilmont 77:869cf507173a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
emilmont 77:869cf507173a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
emilmont 77:869cf507173a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
emilmont 77:869cf507173a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
emilmont 77:869cf507173a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
emilmont 77:869cf507173a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emilmont 77:869cf507173a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
emilmont 77:869cf507173a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
emilmont 77:869cf507173a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 34 *
emilmont 77:869cf507173a 35 ******************************************************************************
emilmont 77:869cf507173a 36 */
emilmont 77:869cf507173a 37
emilmont 77:869cf507173a 38 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 39 #ifndef __STM32F4xx_HAL_DCMI_H
emilmont 77:869cf507173a 40 #define __STM32F4xx_HAL_DCMI_H
emilmont 77:869cf507173a 41
emilmont 77:869cf507173a 42 #ifdef __cplusplus
emilmont 77:869cf507173a 43 extern "C" {
emilmont 77:869cf507173a 44 #endif
emilmont 77:869cf507173a 45
emilmont 77:869cf507173a 46 #if defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
emilmont 77:869cf507173a 47 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 48 #include "stm32f4xx_hal_def.h"
emilmont 77:869cf507173a 49
emilmont 77:869cf507173a 50
emilmont 77:869cf507173a 51 /** @addtogroup STM32F4xx_HAL_Driver
emilmont 77:869cf507173a 52 * @{
emilmont 77:869cf507173a 53 */
emilmont 77:869cf507173a 54
emilmont 77:869cf507173a 55 /** @addtogroup DCMI
emilmont 77:869cf507173a 56 * @{
emilmont 77:869cf507173a 57 */
emilmont 77:869cf507173a 58
emilmont 77:869cf507173a 59 /* Exported types ------------------------------------------------------------*/
emilmont 77:869cf507173a 60
emilmont 77:869cf507173a 61 /**
bogdanm 85:024bf7f99721 62 * @brief DCMI Error source
bogdanm 85:024bf7f99721 63 */
emilmont 77:869cf507173a 64 typedef enum
emilmont 77:869cf507173a 65 {
emilmont 77:869cf507173a 66 DCMI_ERROR_SYNC = 1, /*!< Synchronisation error */
emilmont 77:869cf507173a 67 DCMI_OVERRUN = 2, /*!< DCMI Overrun */
bogdanm 85:024bf7f99721 68 }DCMI_ErrorTypeDef;
emilmont 77:869cf507173a 69
emilmont 77:869cf507173a 70 /**
bogdanm 85:024bf7f99721 71 * @brief DCMI Embedded Synchronisation CODE Init structure definition
emilmont 77:869cf507173a 72 */
emilmont 77:869cf507173a 73 typedef struct
emilmont 77:869cf507173a 74 {
emilmont 77:869cf507173a 75 uint8_t FrameStartCode; /*!< Specifies the code of the frame start delimiter. */
emilmont 77:869cf507173a 76 uint8_t LineStartCode; /*!< Specifies the code of the line start delimiter. */
emilmont 77:869cf507173a 77 uint8_t LineEndCode; /*!< Specifies the code of the line end delimiter. */
emilmont 77:869cf507173a 78 uint8_t FrameEndCode; /*!< Specifies the code of the frame end delimiter. */
emilmont 77:869cf507173a 79 }DCMI_CodesInitTypeDef;
emilmont 77:869cf507173a 80
emilmont 77:869cf507173a 81 /**
bogdanm 85:024bf7f99721 82 * @brief DCMI Init structure definition
emilmont 77:869cf507173a 83 */
emilmont 77:869cf507173a 84 typedef struct
emilmont 77:869cf507173a 85 {
emilmont 77:869cf507173a 86 uint32_t SynchroMode; /*!< Specifies the Synchronization Mode: Hardware or Embedded.
emilmont 77:869cf507173a 87 This parameter can be a value of @ref DCMI_Synchronization_Mode */
emilmont 77:869cf507173a 88
emilmont 77:869cf507173a 89 uint32_t PCKPolarity; /*!< Specifies the Pixel clock polarity: Falling or Rising.
emilmont 77:869cf507173a 90 This parameter can be a value of @ref DCMI_PIXCK_Polarity */
emilmont 77:869cf507173a 91
emilmont 77:869cf507173a 92 uint32_t VSPolarity; /*!< Specifies the Vertical synchronization polarity: High or Low.
emilmont 77:869cf507173a 93 This parameter can be a value of @ref DCMI_VSYNC_Polarity */
emilmont 77:869cf507173a 94
emilmont 77:869cf507173a 95 uint32_t HSPolarity; /*!< Specifies the Horizontal synchronization polarity: High or Low.
emilmont 77:869cf507173a 96 This parameter can be a value of @ref DCMI_HSYNC_Polarity */
emilmont 77:869cf507173a 97
emilmont 77:869cf507173a 98 uint32_t CaptureRate; /*!< Specifies the frequency of frame capture: All, 1/2 or 1/4.
emilmont 77:869cf507173a 99 This parameter can be a value of @ref DCMI_Capture_Rate */
emilmont 77:869cf507173a 100
emilmont 77:869cf507173a 101 uint32_t ExtendedDataMode; /*!< Specifies the data width: 8-bit, 10-bit, 12-bit or 14-bit.
emilmont 77:869cf507173a 102 This parameter can be a value of @ref DCMI_Extended_Data_Mode */
bogdanm 85:024bf7f99721 103
emilmont 77:869cf507173a 104 DCMI_CodesInitTypeDef SyncroCode; /*!< Specifies the code of the frame start delimiter. */
bogdanm 85:024bf7f99721 105
emilmont 77:869cf507173a 106 uint32_t JPEGMode; /*!< Enable or Disable the JPEG mode.
bogdanm 85:024bf7f99721 107 This parameter can be a value of @ref DCMI_MODE_JPEG */
bogdanm 85:024bf7f99721 108
emilmont 77:869cf507173a 109 }DCMI_InitTypeDef;
emilmont 77:869cf507173a 110
emilmont 77:869cf507173a 111 /**
bogdanm 85:024bf7f99721 112 * @brief HAL DCMI State structures definition
emilmont 77:869cf507173a 113 */
emilmont 77:869cf507173a 114 typedef enum
emilmont 77:869cf507173a 115 {
emilmont 77:869cf507173a 116 HAL_DCMI_STATE_RESET = 0x00, /*!< DCMI not yet initialized or disabled */
emilmont 77:869cf507173a 117 HAL_DCMI_STATE_READY = 0x01, /*!< DCMI initialized and ready for use */
emilmont 77:869cf507173a 118 HAL_DCMI_STATE_BUSY = 0x02, /*!< DCMI internal processing is ongoing */
emilmont 77:869cf507173a 119 HAL_DCMI_STATE_TIMEOUT = 0x03, /*!< DCMI timeout state */
emilmont 77:869cf507173a 120 HAL_DCMI_STATE_ERROR = 0x04 /*!< DCMI error state */
emilmont 77:869cf507173a 121 }HAL_DCMI_StateTypeDef;
emilmont 77:869cf507173a 122
emilmont 77:869cf507173a 123 /**
bogdanm 85:024bf7f99721 124 * @brief DCMI handle Structure definition
bogdanm 85:024bf7f99721 125 */
emilmont 77:869cf507173a 126 typedef struct
bogdanm 85:024bf7f99721 127 {
emilmont 77:869cf507173a 128 DCMI_TypeDef *Instance; /*!< DCMI Register base address */
bogdanm 85:024bf7f99721 129
emilmont 77:869cf507173a 130 DCMI_InitTypeDef Init; /*!< DCMI parameters */
bogdanm 85:024bf7f99721 131
emilmont 77:869cf507173a 132 HAL_LockTypeDef Lock; /*!< DCMI locking object */
bogdanm 85:024bf7f99721 133
emilmont 77:869cf507173a 134 __IO HAL_DCMI_StateTypeDef State; /*!< DCMI state */
bogdanm 85:024bf7f99721 135
emilmont 77:869cf507173a 136 __IO uint32_t XferCount; /*!< DMA transfer counter */
bogdanm 85:024bf7f99721 137
emilmont 77:869cf507173a 138 __IO uint32_t XferSize; /*!< DMA transfer size */
bogdanm 85:024bf7f99721 139
bogdanm 85:024bf7f99721 140 uint32_t XferTransferNumber; /*!< DMA transfer number */
emilmont 77:869cf507173a 141
bogdanm 85:024bf7f99721 142 uint32_t pBuffPtr; /*!< Pointer to DMA output buffer */
bogdanm 85:024bf7f99721 143
emilmont 77:869cf507173a 144 DMA_HandleTypeDef *DMA_Handle; /*!< Pointer to the DMA handler */
emilmont 77:869cf507173a 145
bogdanm 85:024bf7f99721 146 __IO uint32_t ErrorCode; /*!< DCMI Error code */
bogdanm 85:024bf7f99721 147
bogdanm 85:024bf7f99721 148 }DCMI_HandleTypeDef;
emilmont 77:869cf507173a 149
emilmont 77:869cf507173a 150 /* Exported constants --------------------------------------------------------*/
emilmont 77:869cf507173a 151
emilmont 77:869cf507173a 152 /** @defgroup DCMI_Exported_Constants
emilmont 77:869cf507173a 153 * @{
emilmont 77:869cf507173a 154 */
emilmont 77:869cf507173a 155
emilmont 77:869cf507173a 156 /** @defgroup DCMI_Error_Code
emilmont 77:869cf507173a 157 * @{
emilmont 77:869cf507173a 158 */
emilmont 77:869cf507173a 159 #define HAL_DCMI_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
emilmont 77:869cf507173a 160 #define HAL_DCMI_ERROR_OVF ((uint32_t)0x00000001) /*!< Overflow error */
bogdanm 85:024bf7f99721 161 #define HAL_DCMI_ERROR_SYNC ((uint32_t)0x00000002) /*!< Synchronization error */
emilmont 77:869cf507173a 162 #define HAL_DCMI_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */
emilmont 77:869cf507173a 163 /**
emilmont 77:869cf507173a 164 * @}
bogdanm 85:024bf7f99721 165 */
emilmont 77:869cf507173a 166
bogdanm 85:024bf7f99721 167 /** @defgroup DCMI_Capture_Mode
emilmont 77:869cf507173a 168 * @{
emilmont 77:869cf507173a 169 */
emilmont 77:869cf507173a 170 #define DCMI_MODE_CONTINUOUS ((uint32_t)0x00000000) /*!< The received data are transferred continuously
emilmont 77:869cf507173a 171 into the destination memory through the DMA */
emilmont 77:869cf507173a 172 #define DCMI_MODE_SNAPSHOT ((uint32_t)DCMI_CR_CM) /*!< Once activated, the interface waits for the start of
emilmont 77:869cf507173a 173 frame and then transfers a single frame through the DMA */
emilmont 77:869cf507173a 174
emilmont 77:869cf507173a 175 #define IS_DCMI_CAPTURE_MODE(MODE)(((MODE) == DCMI_MODE_CONTINUOUS) || \
emilmont 77:869cf507173a 176 ((MODE) == DCMI_MODE_SNAPSHOT))
emilmont 77:869cf507173a 177 /**
emilmont 77:869cf507173a 178 * @}
bogdanm 85:024bf7f99721 179 */
emilmont 77:869cf507173a 180
emilmont 77:869cf507173a 181 /** @defgroup DCMI_Synchronization_Mode
emilmont 77:869cf507173a 182 * @{
emilmont 77:869cf507173a 183 */
emilmont 77:869cf507173a 184 #define DCMI_SYNCHRO_HARDWARE ((uint32_t)0x00000000) /*!< Hardware synchronization data capture (frame/line start/stop)
emilmont 77:869cf507173a 185 is synchronized with the HSYNC/VSYNC signals */
emilmont 77:869cf507173a 186 #define DCMI_SYNCHRO_EMBEDDED ((uint32_t)DCMI_CR_ESS) /*!< Embedded synchronization data capture is synchronized with
emilmont 77:869cf507173a 187 synchronization codes embedded in the data flow */
bogdanm 85:024bf7f99721 188
emilmont 77:869cf507173a 189 #define IS_DCMI_SYNCHRO(MODE)(((MODE) == DCMI_SYNCHRO_HARDWARE) || \
emilmont 77:869cf507173a 190 ((MODE) == DCMI_SYNCHRO_EMBEDDED))
emilmont 77:869cf507173a 191 /**
emilmont 77:869cf507173a 192 * @}
bogdanm 85:024bf7f99721 193 */
emilmont 77:869cf507173a 194
bogdanm 85:024bf7f99721 195 /** @defgroup DCMI_PIXCK_Polarity
emilmont 77:869cf507173a 196 * @{
bogdanm 85:024bf7f99721 197 */
emilmont 77:869cf507173a 198 #define DCMI_PCKPOLARITY_FALLING ((uint32_t)0x00000000) /*!< Pixel clock active on Falling edge */
emilmont 77:869cf507173a 199 #define DCMI_PCKPOLARITY_RISING ((uint32_t)DCMI_CR_PCKPOL) /*!< Pixel clock active on Rising edge */
emilmont 77:869cf507173a 200
emilmont 77:869cf507173a 201 #define IS_DCMI_PCKPOLARITY(POLARITY)(((POLARITY) == DCMI_PCKPOLARITY_FALLING) || \
emilmont 77:869cf507173a 202 ((POLARITY) == DCMI_PCKPOLARITY_RISING))
emilmont 77:869cf507173a 203 /**
emilmont 77:869cf507173a 204 * @}
bogdanm 85:024bf7f99721 205 */
emilmont 77:869cf507173a 206
bogdanm 85:024bf7f99721 207 /** @defgroup DCMI_VSYNC_Polarity
emilmont 77:869cf507173a 208 * @{
bogdanm 85:024bf7f99721 209 */
emilmont 77:869cf507173a 210 #define DCMI_VSPOLARITY_LOW ((uint32_t)0x00000000) /*!< Vertical synchronization active Low */
emilmont 77:869cf507173a 211 #define DCMI_VSPOLARITY_HIGH ((uint32_t)DCMI_CR_VSPOL) /*!< Vertical synchronization active High */
emilmont 77:869cf507173a 212
emilmont 77:869cf507173a 213 #define IS_DCMI_VSPOLARITY(POLARITY)(((POLARITY) == DCMI_VSPOLARITY_LOW) || \
emilmont 77:869cf507173a 214 ((POLARITY) == DCMI_VSPOLARITY_HIGH))
emilmont 77:869cf507173a 215 /**
emilmont 77:869cf507173a 216 * @}
bogdanm 85:024bf7f99721 217 */
emilmont 77:869cf507173a 218
bogdanm 85:024bf7f99721 219 /** @defgroup DCMI_HSYNC_Polarity
emilmont 77:869cf507173a 220 * @{
emilmont 77:869cf507173a 221 */
emilmont 77:869cf507173a 222 #define DCMI_HSPOLARITY_LOW ((uint32_t)0x00000000) /*!< Horizontal synchronization active Low */
emilmont 77:869cf507173a 223 #define DCMI_HSPOLARITY_HIGH ((uint32_t)DCMI_CR_HSPOL) /*!< Horizontal synchronization active High */
emilmont 77:869cf507173a 224
emilmont 77:869cf507173a 225 #define IS_DCMI_HSPOLARITY(POLARITY)(((POLARITY) == DCMI_HSPOLARITY_LOW) || \
emilmont 77:869cf507173a 226 ((POLARITY) == DCMI_HSPOLARITY_HIGH))
emilmont 77:869cf507173a 227 /**
emilmont 77:869cf507173a 228 * @}
bogdanm 85:024bf7f99721 229 */
emilmont 77:869cf507173a 230
emilmont 77:869cf507173a 231 /** @defgroup DCMI_MODE_JPEG
emilmont 77:869cf507173a 232 * @{
bogdanm 85:024bf7f99721 233 */
emilmont 77:869cf507173a 234 #define DCMI_JPEG_DISABLE ((uint32_t)0x00000000) /*!< Mode JPEG Disabled */
emilmont 77:869cf507173a 235 #define DCMI_JPEG_ENABLE ((uint32_t)DCMI_CR_JPEG) /*!< Mode JPEG Enabled */
emilmont 77:869cf507173a 236
emilmont 77:869cf507173a 237 #define IS_DCMI_MODE_JPEG(JPEG_MODE)(((JPEG_MODE) == DCMI_JPEG_DISABLE) || \
emilmont 77:869cf507173a 238 ((JPEG_MODE) == DCMI_JPEG_ENABLE))
emilmont 77:869cf507173a 239 /**
emilmont 77:869cf507173a 240 * @}
bogdanm 85:024bf7f99721 241 */
emilmont 77:869cf507173a 242
emilmont 77:869cf507173a 243 /** @defgroup DCMI_Capture_Rate
emilmont 77:869cf507173a 244 * @{
bogdanm 85:024bf7f99721 245 */
emilmont 77:869cf507173a 246 #define DCMI_CR_ALL_FRAME ((uint32_t)0x00000000) /*!< All frames are captured */
emilmont 77:869cf507173a 247 #define DCMI_CR_ALTERNATE_2_FRAME ((uint32_t)DCMI_CR_FCRC_0) /*!< Every alternate frame captured */
emilmont 77:869cf507173a 248 #define DCMI_CR_ALTERNATE_4_FRAME ((uint32_t)DCMI_CR_FCRC_1) /*!< One frame in 4 frames captured */
emilmont 77:869cf507173a 249
emilmont 77:869cf507173a 250 #define IS_DCMI_CAPTURE_RATE(RATE) (((RATE) == DCMI_CR_ALL_FRAME) || \
emilmont 77:869cf507173a 251 ((RATE) == DCMI_CR_ALTERNATE_2_FRAME) || \
emilmont 77:869cf507173a 252 ((RATE) == DCMI_CR_ALTERNATE_4_FRAME))
emilmont 77:869cf507173a 253 /**
emilmont 77:869cf507173a 254 * @}
bogdanm 85:024bf7f99721 255 */
emilmont 77:869cf507173a 256
emilmont 77:869cf507173a 257 /** @defgroup DCMI_Extended_Data_Mode
emilmont 77:869cf507173a 258 * @{
bogdanm 85:024bf7f99721 259 */
emilmont 77:869cf507173a 260 #define DCMI_EXTEND_DATA_8B ((uint32_t)0x00000000) /*!< Interface captures 8-bit data on every pixel clock */
emilmont 77:869cf507173a 261 #define DCMI_EXTEND_DATA_10B ((uint32_t)DCMI_CR_EDM_0) /*!< Interface captures 10-bit data on every pixel clock */
emilmont 77:869cf507173a 262 #define DCMI_EXTEND_DATA_12B ((uint32_t)DCMI_CR_EDM_1) /*!< Interface captures 12-bit data on every pixel clock */
emilmont 77:869cf507173a 263 #define DCMI_EXTEND_DATA_14B ((uint32_t)(DCMI_CR_EDM_0 | DCMI_CR_EDM_1)) /*!< Interface captures 14-bit data on every pixel clock */
emilmont 77:869cf507173a 264
emilmont 77:869cf507173a 265 #define IS_DCMI_EXTENDED_DATA(DATA)(((DATA) == DCMI_EXTEND_DATA_8B) || \
emilmont 77:869cf507173a 266 ((DATA) == DCMI_EXTEND_DATA_10B) || \
emilmont 77:869cf507173a 267 ((DATA) == DCMI_EXTEND_DATA_12B) || \
emilmont 77:869cf507173a 268 ((DATA) == DCMI_EXTEND_DATA_14B))
emilmont 77:869cf507173a 269 /**
emilmont 77:869cf507173a 270 * @}
bogdanm 85:024bf7f99721 271 */
emilmont 77:869cf507173a 272
emilmont 77:869cf507173a 273 /** @defgroup DCMI_Window_Coordinate
emilmont 77:869cf507173a 274 * @{
bogdanm 85:024bf7f99721 275 */
emilmont 77:869cf507173a 276 #define DCMI_WINDOW_COORDINATE ((uint32_t)0x3FFF) /*!< Window coordinate */
emilmont 77:869cf507173a 277
emilmont 77:869cf507173a 278 #define IS_DCMI_WINDOW_COORDINATE(COORDINATE) ((COORDINATE) <= DCMI_WINDOW_COORDINATE)
emilmont 77:869cf507173a 279 /**
emilmont 77:869cf507173a 280 * @}
emilmont 77:869cf507173a 281 */
emilmont 77:869cf507173a 282
emilmont 77:869cf507173a 283 /** @defgroup DCMI_Window_Height
emilmont 77:869cf507173a 284 * @{
emilmont 77:869cf507173a 285 */
emilmont 77:869cf507173a 286 #define DCMI_WINDOW_HEIGHT ((uint32_t)0x1FFF) /*!< Window Height */
emilmont 77:869cf507173a 287
emilmont 77:869cf507173a 288 #define IS_DCMI_WINDOW_HEIGHT(HEIGHT) ((HEIGHT) <= DCMI_WINDOW_HEIGHT)
emilmont 77:869cf507173a 289 /**
emilmont 77:869cf507173a 290 * @}
bogdanm 85:024bf7f99721 291 */
emilmont 77:869cf507173a 292
bogdanm 85:024bf7f99721 293 /** @defgroup DCMI_interrupt_sources
emilmont 77:869cf507173a 294 * @{
bogdanm 85:024bf7f99721 295 */
emilmont 77:869cf507173a 296 #define DCMI_IT_FRAME ((uint32_t)DCMI_IER_FRAME_IE)
emilmont 77:869cf507173a 297 #define DCMI_IT_OVF ((uint32_t)DCMI_IER_OVF_IE)
emilmont 77:869cf507173a 298 #define DCMI_IT_ERR ((uint32_t)DCMI_IER_ERR_IE)
emilmont 77:869cf507173a 299 #define DCMI_IT_VSYNC ((uint32_t)DCMI_IER_VSYNC_IE)
emilmont 77:869cf507173a 300 #define DCMI_IT_LINE ((uint32_t)DCMI_IER_LINE_IE)
emilmont 77:869cf507173a 301
emilmont 77:869cf507173a 302 #define IS_DCMI_CONFIG_IT(IT) ((((IT) & (uint16_t)0xFFE0) == 0x0000) && ((IT) != 0x0000))
emilmont 77:869cf507173a 303
emilmont 77:869cf507173a 304 #define IS_DCMI_GET_IT(IT) (((IT) == DCMI_IT_FRAME) || \
emilmont 77:869cf507173a 305 ((IT) == DCMI_IT_OVF) || \
emilmont 77:869cf507173a 306 ((IT) == DCMI_IT_ERR) || \
emilmont 77:869cf507173a 307 ((IT) == DCMI_IT_VSYNC) || \
emilmont 77:869cf507173a 308 ((IT) == DCMI_IT_LINE))
emilmont 77:869cf507173a 309 /**
emilmont 77:869cf507173a 310 * @}
bogdanm 85:024bf7f99721 311 */
emilmont 77:869cf507173a 312
bogdanm 85:024bf7f99721 313 /** @defgroup DCMI_Flags
emilmont 77:869cf507173a 314 * @{
bogdanm 85:024bf7f99721 315 */
bogdanm 85:024bf7f99721 316
emilmont 77:869cf507173a 317 /**
bogdanm 85:024bf7f99721 318 * @brief DCMI SR register
emilmont 77:869cf507173a 319 */
emilmont 77:869cf507173a 320 #define DCMI_FLAG_HSYNC ((uint32_t)0x2001)
emilmont 77:869cf507173a 321 #define DCMI_FLAG_VSYNC ((uint32_t)0x2002)
emilmont 77:869cf507173a 322 #define DCMI_FLAG_FNE ((uint32_t)0x2004)
emilmont 77:869cf507173a 323 /**
emilmont 77:869cf507173a 324 * @brief DCMI RISR register
emilmont 77:869cf507173a 325 */
emilmont 77:869cf507173a 326 #define DCMI_FLAG_FRAMERI ((uint32_t)DCMI_RISR_FRAME_RIS)
emilmont 77:869cf507173a 327 #define DCMI_FLAG_OVFRI ((uint32_t)DCMI_RISR_OVF_RIS)
emilmont 77:869cf507173a 328 #define DCMI_FLAG_ERRRI ((uint32_t)DCMI_RISR_ERR_RIS)
emilmont 77:869cf507173a 329 #define DCMI_FLAG_VSYNCRI ((uint32_t)DCMI_RISR_VSYNC_RIS)
emilmont 77:869cf507173a 330 #define DCMI_FLAG_LINERI ((uint32_t)DCMI_RISR_LINE_RIS)
emilmont 77:869cf507173a 331 /**
emilmont 77:869cf507173a 332 * @brief DCMI MISR register
emilmont 77:869cf507173a 333 */
emilmont 77:869cf507173a 334 #define DCMI_FLAG_FRAMEMI ((uint32_t)0x1001)
emilmont 77:869cf507173a 335 #define DCMI_FLAG_OVFMI ((uint32_t)0x1002)
emilmont 77:869cf507173a 336 #define DCMI_FLAG_ERRMI ((uint32_t)0x1004)
emilmont 77:869cf507173a 337 #define DCMI_FLAG_VSYNCMI ((uint32_t)0x1008)
emilmont 77:869cf507173a 338 #define DCMI_FLAG_LINEMI ((uint32_t)0x1010)
emilmont 77:869cf507173a 339 #define IS_DCMI_GET_FLAG(FLAG) (((FLAG) == DCMI_FLAG_HSYNC) || \
emilmont 77:869cf507173a 340 ((FLAG) == DCMI_FLAG_VSYNC) || \
emilmont 77:869cf507173a 341 ((FLAG) == DCMI_FLAG_FNE) || \
emilmont 77:869cf507173a 342 ((FLAG) == DCMI_FLAG_FRAMERI) || \
emilmont 77:869cf507173a 343 ((FLAG) == DCMI_FLAG_OVFRI) || \
emilmont 77:869cf507173a 344 ((FLAG) == DCMI_FLAG_ERRRI) || \
emilmont 77:869cf507173a 345 ((FLAG) == DCMI_FLAG_VSYNCRI) || \
emilmont 77:869cf507173a 346 ((FLAG) == DCMI_FLAG_LINERI) || \
emilmont 77:869cf507173a 347 ((FLAG) == DCMI_FLAG_FRAMEMI) || \
emilmont 77:869cf507173a 348 ((FLAG) == DCMI_FLAG_OVFMI) || \
emilmont 77:869cf507173a 349 ((FLAG) == DCMI_FLAG_ERRMI) || \
emilmont 77:869cf507173a 350 ((FLAG) == DCMI_FLAG_VSYNCMI) || \
emilmont 77:869cf507173a 351 ((FLAG) == DCMI_FLAG_LINEMI))
emilmont 77:869cf507173a 352
emilmont 77:869cf507173a 353 #define IS_DCMI_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFE0) == 0x0000) && ((FLAG) != 0x0000))
emilmont 77:869cf507173a 354 /**
emilmont 77:869cf507173a 355 * @}
emilmont 77:869cf507173a 356 */
emilmont 77:869cf507173a 357
emilmont 77:869cf507173a 358 /**
emilmont 77:869cf507173a 359 * @}
emilmont 77:869cf507173a 360 */
emilmont 77:869cf507173a 361
emilmont 77:869cf507173a 362 /* Exported macro ------------------------------------------------------------*/
bogdanm 85:024bf7f99721 363
bogdanm 85:024bf7f99721 364 /** @brief Reset DCMI handle state
bogdanm 85:024bf7f99721 365 * @param __HANDLE__: specifies the DCMI handle.
bogdanm 85:024bf7f99721 366 * @retval None
bogdanm 85:024bf7f99721 367 */
bogdanm 85:024bf7f99721 368 #define __HAL_DCMI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DCMI_STATE_RESET)
bogdanm 85:024bf7f99721 369
emilmont 77:869cf507173a 370 /**
emilmont 77:869cf507173a 371 * @brief Enable the DCMI.
emilmont 77:869cf507173a 372 * @param __HANDLE__: DCMI handle
emilmont 77:869cf507173a 373 * @retval None
emilmont 77:869cf507173a 374 */
emilmont 77:869cf507173a 375 #define __HAL_DCMI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DCMI_CR_ENABLE)
emilmont 77:869cf507173a 376
emilmont 77:869cf507173a 377 /**
emilmont 77:869cf507173a 378 * @brief Disable the DCMI.
emilmont 77:869cf507173a 379 * @param __HANDLE__: DCMI handle
emilmont 77:869cf507173a 380 * @retval None
emilmont 77:869cf507173a 381 */
emilmont 77:869cf507173a 382 #define __HAL_DCMI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(DCMI_CR_ENABLE))
emilmont 77:869cf507173a 383
emilmont 77:869cf507173a 384 /* Interrupt & Flag management */
emilmont 77:869cf507173a 385 /**
emilmont 77:869cf507173a 386 * @brief Get the DCMI pending flags.
emilmont 77:869cf507173a 387 * @param __HANDLE__: DCMI handle
emilmont 77:869cf507173a 388 * @param __FLAG__: Get the specified flag.
emilmont 77:869cf507173a 389 * This parameter can be any combination of the following values:
emilmont 77:869cf507173a 390 * @arg DCMI_FLAG_FRAMERI: Frame capture complete flag mask
emilmont 77:869cf507173a 391 * @arg DCMI_FLAG_OVFRI: Overflow flag mask
emilmont 77:869cf507173a 392 * @arg DCMI_FLAG_ERRRI: Synchronization error flag mask
emilmont 77:869cf507173a 393 * @arg DCMI_FLAG_VSYNCRI: VSYNC flag mask
emilmont 77:869cf507173a 394 * @arg DCMI_FLAG_LINERI: Line flag mask
emilmont 77:869cf507173a 395 * @retval The state of FLAG.
emilmont 77:869cf507173a 396 */
emilmont 77:869cf507173a 397 #define __HAL_DCMI_GET_FLAG(__HANDLE__, __FLAG__)\
emilmont 77:869cf507173a 398 ((((__FLAG__) & 0x3000) == 0x0)? ((__HANDLE__)->Instance->RISR & (__FLAG__)) :\
emilmont 77:869cf507173a 399 (((__FLAG__) & 0x2000) == 0x0)? ((__HANDLE__)->Instance->MISR & (__FLAG__)) : ((__HANDLE__)->Instance->SR & (__FLAG__)))
emilmont 77:869cf507173a 400
emilmont 77:869cf507173a 401 /**
emilmont 77:869cf507173a 402 * @brief Clear the DCMI pending flags.
emilmont 77:869cf507173a 403 * @param __HANDLE__: DCMI handle
emilmont 77:869cf507173a 404 * @param __FLAG__: specifies the flag to clear.
emilmont 77:869cf507173a 405 * This parameter can be any combination of the following values:
emilmont 77:869cf507173a 406 * @arg DCMI_FLAG_FRAMERI: Frame capture complete flag mask
emilmont 77:869cf507173a 407 * @arg DCMI_FLAG_OVFRI: Overflow flag mask
emilmont 77:869cf507173a 408 * @arg DCMI_FLAG_ERRRI: Synchronization error flag mask
emilmont 77:869cf507173a 409 * @arg DCMI_FLAG_VSYNCRI: VSYNC flag mask
emilmont 77:869cf507173a 410 * @arg DCMI_FLAG_LINERI: Line flag mask
emilmont 77:869cf507173a 411 * @retval None
emilmont 77:869cf507173a 412 */
Kojto 90:cb3d968589d8 413 #define __HAL_DCMI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
emilmont 77:869cf507173a 414
emilmont 77:869cf507173a 415 /**
emilmont 77:869cf507173a 416 * @brief Enable the specified DCMI interrupts.
emilmont 77:869cf507173a 417 * @param __HANDLE__: DCMI handle
emilmont 77:869cf507173a 418 * @param __INTERRUPT__: specifies the DCMI interrupt sources to be enabled.
emilmont 77:869cf507173a 419 * This parameter can be any combination of the following values:
emilmont 77:869cf507173a 420 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
emilmont 77:869cf507173a 421 * @arg DCMI_IT_OVF: Overflow interrupt mask
emilmont 77:869cf507173a 422 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
emilmont 77:869cf507173a 423 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
emilmont 77:869cf507173a 424 * @arg DCMI_IT_LINE: Line interrupt mask
emilmont 77:869cf507173a 425 * @retval None
emilmont 77:869cf507173a 426 */
emilmont 77:869cf507173a 427 #define __HAL_DCMI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
emilmont 77:869cf507173a 428
emilmont 77:869cf507173a 429 /**
emilmont 77:869cf507173a 430 * @brief Disable the specified DCMI interrupts.
emilmont 77:869cf507173a 431 * @param __HANDLE__: DCMI handle
emilmont 77:869cf507173a 432 * @param __INTERRUPT__: specifies the DCMI interrupt sources to be enabled.
emilmont 77:869cf507173a 433 * This parameter can be any combination of the following values:
emilmont 77:869cf507173a 434 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
emilmont 77:869cf507173a 435 * @arg DCMI_IT_OVF: Overflow interrupt mask
emilmont 77:869cf507173a 436 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
emilmont 77:869cf507173a 437 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
emilmont 77:869cf507173a 438 * @arg DCMI_IT_LINE: Line interrupt mask
emilmont 77:869cf507173a 439 * @retval None
emilmont 77:869cf507173a 440 */
emilmont 77:869cf507173a 441 #define __HAL_DCMI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= ~(__INTERRUPT__))
emilmont 77:869cf507173a 442
emilmont 77:869cf507173a 443 /**
emilmont 77:869cf507173a 444 * @brief Check whether the specified DCMI interrupt has occurred or not.
emilmont 77:869cf507173a 445 * @param __HANDLE__: DCMI handle
emilmont 77:869cf507173a 446 * @param __INTERRUPT__: specifies the DCMI interrupt source to check.
emilmont 77:869cf507173a 447 * This parameter can be one of the following values:
emilmont 77:869cf507173a 448 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
emilmont 77:869cf507173a 449 * @arg DCMI_IT_OVF: Overflow interrupt mask
emilmont 77:869cf507173a 450 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
emilmont 77:869cf507173a 451 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
emilmont 77:869cf507173a 452 * @arg DCMI_IT_LINE: Line interrupt mask
emilmont 77:869cf507173a 453 * @retval The state of INTERRUPT.
emilmont 77:869cf507173a 454 */
bogdanm 81:7d30d6019079 455 #define __HAL_DCMI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->MISR & (__INTERRUPT__))
emilmont 77:869cf507173a 456
bogdanm 85:024bf7f99721 457 /* Exported functions --------------------------------------------------------*/
emilmont 77:869cf507173a 458
bogdanm 85:024bf7f99721 459 /* Initialization and de-initialization functions *****************************/
emilmont 77:869cf507173a 460 HAL_StatusTypeDef HAL_DCMI_Init(DCMI_HandleTypeDef *hdcmi);
emilmont 77:869cf507173a 461 HAL_StatusTypeDef HAL_DCMI_DeInit(DCMI_HandleTypeDef *hdcmi);
bogdanm 81:7d30d6019079 462 void HAL_DCMI_MspInit(DCMI_HandleTypeDef* hdcmi);
bogdanm 81:7d30d6019079 463 void HAL_DCMI_MspDeInit(DCMI_HandleTypeDef* hdcmi);
emilmont 77:869cf507173a 464
bogdanm 85:024bf7f99721 465 /* IO operation functions *****************************************************/
emilmont 77:869cf507173a 466 HAL_StatusTypeDef HAL_DCMI_Start_DMA(DCMI_HandleTypeDef* hdcmi, uint32_t DCMI_Mode, uint32_t pData, uint32_t Length);
emilmont 77:869cf507173a 467 HAL_StatusTypeDef HAL_DCMI_Stop(DCMI_HandleTypeDef* hdcmi);
bogdanm 81:7d30d6019079 468 void HAL_DCMI_ErrorCallback(DCMI_HandleTypeDef *hdcmi);
bogdanm 81:7d30d6019079 469 void HAL_DCMI_LineEventCallback(DCMI_HandleTypeDef *hdcmi);
bogdanm 81:7d30d6019079 470 void HAL_DCMI_FrameEventCallback(DCMI_HandleTypeDef *hdcmi);
bogdanm 81:7d30d6019079 471 void HAL_DCMI_VsyncEventCallback(DCMI_HandleTypeDef *hdcmi);
emilmont 77:869cf507173a 472 void HAL_DCMI_IRQHandler(DCMI_HandleTypeDef *hdcmi);
emilmont 77:869cf507173a 473
bogdanm 85:024bf7f99721 474 /* Peripheral Control functions ***********************************************/
emilmont 77:869cf507173a 475 HAL_StatusTypeDef HAL_DCMI_ConfigCROP(DCMI_HandleTypeDef *hdcmi, uint32_t X0, uint32_t Y0, uint32_t XSize, uint32_t YSize);
emilmont 77:869cf507173a 476 HAL_StatusTypeDef HAL_DCMI_EnableCROP(DCMI_HandleTypeDef *hdcmi);
emilmont 77:869cf507173a 477 HAL_StatusTypeDef HAL_DCMI_DisableCROP(DCMI_HandleTypeDef *hdcmi);
emilmont 77:869cf507173a 478
bogdanm 85:024bf7f99721 479 /* Peripheral State functions *************************************************/
emilmont 77:869cf507173a 480 HAL_DCMI_StateTypeDef HAL_DCMI_GetState(DCMI_HandleTypeDef *hdcmi);
emilmont 77:869cf507173a 481 uint32_t HAL_DCMI_GetError(DCMI_HandleTypeDef *hdcmi);
emilmont 77:869cf507173a 482
emilmont 77:869cf507173a 483 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
emilmont 77:869cf507173a 484 /**
emilmont 77:869cf507173a 485 * @}
emilmont 77:869cf507173a 486 */
emilmont 77:869cf507173a 487
emilmont 77:869cf507173a 488 /**
emilmont 77:869cf507173a 489 * @}
emilmont 77:869cf507173a 490 */
emilmont 77:869cf507173a 491
emilmont 77:869cf507173a 492 #ifdef __cplusplus
emilmont 77:869cf507173a 493 }
emilmont 77:869cf507173a 494 #endif
emilmont 77:869cf507173a 495
emilmont 77:869cf507173a 496 #endif /* __STM32F4xx_HAL_DCMI_H */
emilmont 77:869cf507173a 497
emilmont 77:869cf507173a 498 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/