Ricardo Benitez / mbed

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TARGET_NUCLEO_F401RE/stm32f4xx_hal_dac.h@90:cb3d968589d8, 2014-10-28 (annotated)

Committer:
Kojto
Date:
Tue Oct 28 16:40:41 2014 +0000
Revision:
90:cb3d968589d8
Parent:
85:024bf7f99721
Child:
99:dbbf35b96557
Release 90 of the mbed library



Changes:



- Freescale KSDK update (v1.0)

- K22 - new target addition

- KL43Z - new target addition

- Nucleo F091RC - new target addition

- Nucleo L152RE - STM32Cube driver

- Nordic - Softdevice v7.1.0

- Nvic files - BSD License

- LPC824 - various HAL fixes

- Nucleo F411RE - CMSIS - IAR files

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32f4xx_hal_dac.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
Kojto 90:cb3d968589d8 5 * @version V1.1.0
Kojto 90:cb3d968589d8 6 * @date 19-June-2014
emilmont 77:869cf507173a 7 * @brief Header file of DAC HAL module.
emilmont 77:869cf507173a 8 ******************************************************************************
emilmont 77:869cf507173a 9 * @attention
emilmont 77:869cf507173a 10 *
emilmont 77:869cf507173a 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 12 *
emilmont 77:869cf507173a 13 * Redistribution and use in source and binary forms, with or without modification,
emilmont 77:869cf507173a 14 * are permitted provided that the following conditions are met:
emilmont 77:869cf507173a 15 * 1. Redistributions of source code must retain the above copyright notice,
emilmont 77:869cf507173a 16 * this list of conditions and the following disclaimer.
emilmont 77:869cf507173a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
emilmont 77:869cf507173a 18 * this list of conditions and the following disclaimer in the documentation
emilmont 77:869cf507173a 19 * and/or other materials provided with the distribution.
emilmont 77:869cf507173a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
emilmont 77:869cf507173a 21 * may be used to endorse or promote products derived from this software
emilmont 77:869cf507173a 22 * without specific prior written permission.
emilmont 77:869cf507173a 23 *
emilmont 77:869cf507173a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
emilmont 77:869cf507173a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
emilmont 77:869cf507173a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
emilmont 77:869cf507173a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
emilmont 77:869cf507173a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
emilmont 77:869cf507173a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
emilmont 77:869cf507173a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emilmont 77:869cf507173a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
emilmont 77:869cf507173a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
emilmont 77:869cf507173a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 34 *
emilmont 77:869cf507173a 35 ******************************************************************************
emilmont 77:869cf507173a 36 */
emilmont 77:869cf507173a 37
emilmont 77:869cf507173a 38 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 39 #ifndef __STM32F4xx_HAL_DAC_H
emilmont 77:869cf507173a 40 #define __STM32F4xx_HAL_DAC_H
emilmont 77:869cf507173a 41
emilmont 77:869cf507173a 42 #ifdef __cplusplus
emilmont 77:869cf507173a 43 extern "C" {
emilmont 77:869cf507173a 44 #endif
emilmont 77:869cf507173a 45
emilmont 77:869cf507173a 46 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
emilmont 77:869cf507173a 47
emilmont 77:869cf507173a 48 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 49 #include "stm32f4xx_hal_def.h"
emilmont 77:869cf507173a 50
emilmont 77:869cf507173a 51 /** @addtogroup STM32F4xx_HAL_Driver
emilmont 77:869cf507173a 52 * @{
emilmont 77:869cf507173a 53 */
emilmont 77:869cf507173a 54
emilmont 77:869cf507173a 55 /** @addtogroup DAC
emilmont 77:869cf507173a 56 * @{
emilmont 77:869cf507173a 57 */
emilmont 77:869cf507173a 58
emilmont 77:869cf507173a 59 /* Exported types ------------------------------------------------------------*/
emilmont 77:869cf507173a 60
emilmont 77:869cf507173a 61 /**
bogdanm 85:024bf7f99721 62 * @brief HAL State structures definition
bogdanm 85:024bf7f99721 63 */
emilmont 77:869cf507173a 64 typedef enum
emilmont 77:869cf507173a 65 {
emilmont 77:869cf507173a 66 HAL_DAC_STATE_RESET = 0x00, /*!< DAC not yet initialized or disabled */
emilmont 77:869cf507173a 67 HAL_DAC_STATE_READY = 0x01, /*!< DAC initialized and ready for use */
emilmont 77:869cf507173a 68 HAL_DAC_STATE_BUSY = 0x02, /*!< DAC internal processing is ongoing */
emilmont 77:869cf507173a 69 HAL_DAC_STATE_TIMEOUT = 0x03, /*!< DAC timeout state */
emilmont 77:869cf507173a 70 HAL_DAC_STATE_ERROR = 0x04 /*!< DAC error state */
emilmont 77:869cf507173a 71 }HAL_DAC_StateTypeDef;
emilmont 77:869cf507173a 72
emilmont 77:869cf507173a 73 /**
bogdanm 85:024bf7f99721 74 * @brief DAC handle Structure definition
bogdanm 85:024bf7f99721 75 */
emilmont 77:869cf507173a 76 typedef struct
emilmont 77:869cf507173a 77 {
emilmont 77:869cf507173a 78 DAC_TypeDef *Instance; /*!< Register base address */
bogdanm 85:024bf7f99721 79
emilmont 77:869cf507173a 80 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */
emilmont 77:869cf507173a 81
emilmont 77:869cf507173a 82 HAL_LockTypeDef Lock; /*!< DAC locking object */
bogdanm 85:024bf7f99721 83
emilmont 77:869cf507173a 84 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */
bogdanm 85:024bf7f99721 85
bogdanm 85:024bf7f99721 86 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */
bogdanm 85:024bf7f99721 87
emilmont 77:869cf507173a 88 __IO uint32_t ErrorCode; /*!< DAC Error code */
bogdanm 85:024bf7f99721 89
emilmont 77:869cf507173a 90 }DAC_HandleTypeDef;
emilmont 77:869cf507173a 91
emilmont 77:869cf507173a 92 /**
bogdanm 85:024bf7f99721 93 * @brief DAC Configuration regular Channel structure definition
bogdanm 85:024bf7f99721 94 */
emilmont 77:869cf507173a 95 typedef struct
emilmont 77:869cf507173a 96 {
emilmont 77:869cf507173a 97 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
emilmont 77:869cf507173a 98 This parameter can be a value of @ref DAC_trigger_selection */
bogdanm 85:024bf7f99721 99
emilmont 77:869cf507173a 100 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
emilmont 77:869cf507173a 101 This parameter can be a value of @ref DAC_output_buffer */
emilmont 77:869cf507173a 102 }DAC_ChannelConfTypeDef;
emilmont 77:869cf507173a 103
emilmont 77:869cf507173a 104 /* Exported constants --------------------------------------------------------*/
emilmont 77:869cf507173a 105
emilmont 77:869cf507173a 106 /** @defgroup DAC_Error_Code
emilmont 77:869cf507173a 107 * @{
emilmont 77:869cf507173a 108 */
emilmont 77:869cf507173a 109 #define HAL_DAC_ERROR_NONE 0x00 /*!< No error */
emilmont 77:869cf507173a 110 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01 /*!< DAC channel1 DAM underrun error */
emilmont 77:869cf507173a 111 #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02 /*!< DAC channel2 DAM underrun error */
bogdanm 85:024bf7f99721 112 #define HAL_DAC_ERROR_DMA 0x04 /*!< DMA error */
emilmont 77:869cf507173a 113 /**
emilmont 77:869cf507173a 114 * @}
emilmont 77:869cf507173a 115 */
bogdanm 85:024bf7f99721 116
bogdanm 85:024bf7f99721 117 /** @defgroup DAC_trigger_selection
emilmont 77:869cf507173a 118 * @{
emilmont 77:869cf507173a 119 */
emilmont 77:869cf507173a 120
emilmont 77:869cf507173a 121 #define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC1_DHRxxxx register
emilmont 77:869cf507173a 122 has been loaded, and not by external trigger */
emilmont 77:869cf507173a 123 #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
emilmont 77:869cf507173a 124 #define DAC_TRIGGER_T4_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
emilmont 77:869cf507173a 125 #define DAC_TRIGGER_T5_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */
emilmont 77:869cf507173a 126 #define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */
emilmont 77:869cf507173a 127 #define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
emilmont 77:869cf507173a 128 #define DAC_TRIGGER_T8_TRGO ((uint32_t)(DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */
emilmont 77:869cf507173a 129
emilmont 77:869cf507173a 130 #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
emilmont 77:869cf507173a 131 #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */
emilmont 77:869cf507173a 132
emilmont 77:869cf507173a 133 #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \
emilmont 77:869cf507173a 134 ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
emilmont 77:869cf507173a 135 ((TRIGGER) == DAC_TRIGGER_T8_TRGO) || \
emilmont 77:869cf507173a 136 ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \
emilmont 77:869cf507173a 137 ((TRIGGER) == DAC_TRIGGER_T5_TRGO) || \
emilmont 77:869cf507173a 138 ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
emilmont 77:869cf507173a 139 ((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \
emilmont 77:869cf507173a 140 ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
emilmont 77:869cf507173a 141 ((TRIGGER) == DAC_TRIGGER_SOFTWARE))
emilmont 77:869cf507173a 142 /**
emilmont 77:869cf507173a 143 * @}
emilmont 77:869cf507173a 144 */
emilmont 77:869cf507173a 145
emilmont 77:869cf507173a 146 /** @defgroup DAC_output_buffer
emilmont 77:869cf507173a 147 * @{
emilmont 77:869cf507173a 148 */
emilmont 77:869cf507173a 149 #define DAC_OUTPUTBUFFER_ENABLE ((uint32_t)0x00000000)
emilmont 77:869cf507173a 150 #define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_CR_BOFF1)
emilmont 77:869cf507173a 151
emilmont 77:869cf507173a 152 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \
emilmont 77:869cf507173a 153 ((STATE) == DAC_OUTPUTBUFFER_DISABLE))
emilmont 77:869cf507173a 154 /**
emilmont 77:869cf507173a 155 * @}
emilmont 77:869cf507173a 156 */
emilmont 77:869cf507173a 157
emilmont 77:869cf507173a 158 /** @defgroup DAC_Channel_selection
emilmont 77:869cf507173a 159 * @{
emilmont 77:869cf507173a 160 */
emilmont 77:869cf507173a 161 #define DAC_CHANNEL_1 ((uint32_t)0x00000000)
emilmont 77:869cf507173a 162 #define DAC_CHANNEL_2 ((uint32_t)0x00000010)
emilmont 77:869cf507173a 163
emilmont 77:869cf507173a 164 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \
emilmont 77:869cf507173a 165 ((CHANNEL) == DAC_CHANNEL_2))
emilmont 77:869cf507173a 166 /**
emilmont 77:869cf507173a 167 * @}
emilmont 77:869cf507173a 168 */
emilmont 77:869cf507173a 169
emilmont 77:869cf507173a 170 /** @defgroup DAC_data_alignement
emilmont 77:869cf507173a 171 * @{
emilmont 77:869cf507173a 172 */
emilmont 77:869cf507173a 173 #define DAC_ALIGN_12B_R ((uint32_t)0x00000000)
emilmont 77:869cf507173a 174 #define DAC_ALIGN_12B_L ((uint32_t)0x00000004)
emilmont 77:869cf507173a 175 #define DAC_ALIGN_8B_R ((uint32_t)0x00000008)
emilmont 77:869cf507173a 176
emilmont 77:869cf507173a 177 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
emilmont 77:869cf507173a 178 ((ALIGN) == DAC_ALIGN_12B_L) || \
emilmont 77:869cf507173a 179 ((ALIGN) == DAC_ALIGN_8B_R))
emilmont 77:869cf507173a 180 /**
emilmont 77:869cf507173a 181 * @}
emilmont 77:869cf507173a 182 */
emilmont 77:869cf507173a 183
emilmont 77:869cf507173a 184 /** @defgroup DAC_data
emilmont 77:869cf507173a 185 * @{
emilmont 77:869cf507173a 186 */
bogdanm 85:024bf7f99721 187 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0)
emilmont 77:869cf507173a 188 /**
emilmont 77:869cf507173a 189 * @}
emilmont 77:869cf507173a 190 */
emilmont 77:869cf507173a 191
emilmont 77:869cf507173a 192 /** @defgroup DAC_flags_definition
emilmont 77:869cf507173a 193 * @{
emilmont 77:869cf507173a 194 */
emilmont 77:869cf507173a 195 #define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
bogdanm 85:024bf7f99721 196 #define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
emilmont 77:869cf507173a 197
emilmont 77:869cf507173a 198 #define IS_DAC_FLAG(FLAG) (((FLAG) == DAC_FLAG_DMAUDR1) || \
emilmont 77:869cf507173a 199 ((FLAG) == DAC_FLAG_DMAUDR2))
emilmont 77:869cf507173a 200 /**
emilmont 77:869cf507173a 201 * @}
emilmont 77:869cf507173a 202 */
emilmont 77:869cf507173a 203
emilmont 77:869cf507173a 204 /** @defgroup DAC_IT_definition
emilmont 77:869cf507173a 205 * @{
emilmont 77:869cf507173a 206 */
emilmont 77:869cf507173a 207 #define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
bogdanm 85:024bf7f99721 208 #define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
emilmont 77:869cf507173a 209
emilmont 77:869cf507173a 210 #define IS_DAC_IT(IT) (((IT) == DAC_IT_DMAUDR1) || \
emilmont 77:869cf507173a 211 ((IT) == DAC_IT_DMAUDR2))
emilmont 77:869cf507173a 212 /**
emilmont 77:869cf507173a 213 * @}
emilmont 77:869cf507173a 214 */
emilmont 77:869cf507173a 215
emilmont 77:869cf507173a 216 /* Exported macro ------------------------------------------------------------*/
bogdanm 85:024bf7f99721 217
bogdanm 85:024bf7f99721 218 /** @brief Reset DAC handle state
bogdanm 85:024bf7f99721 219 * @param __HANDLE__: specifies the DAC handle.
bogdanm 85:024bf7f99721 220 * @retval None
bogdanm 85:024bf7f99721 221 */
bogdanm 85:024bf7f99721 222 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
bogdanm 85:024bf7f99721 223
bogdanm 85:024bf7f99721 224 /** @brief Enable the DAC channel
bogdanm 85:024bf7f99721 225 * @param __HANDLE__: specifies the DAC handle.
bogdanm 85:024bf7f99721 226 * @param __DAC_Channel__: specifies the DAC channel
bogdanm 85:024bf7f99721 227 * @retval None
bogdanm 85:024bf7f99721 228 */
emilmont 77:869cf507173a 229 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \
emilmont 77:869cf507173a 230 ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__)))
emilmont 77:869cf507173a 231
bogdanm 85:024bf7f99721 232 /** @brief Disable the DAC channel
bogdanm 85:024bf7f99721 233 * @param __HANDLE__: specifies the DAC handle
bogdanm 85:024bf7f99721 234 * @param __DAC_Channel__: specifies the DAC channel.
bogdanm 85:024bf7f99721 235 * @retval None
bogdanm 85:024bf7f99721 236 */
emilmont 77:869cf507173a 237 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \
emilmont 77:869cf507173a 238 ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__)))
bogdanm 85:024bf7f99721 239
bogdanm 85:024bf7f99721 240 /** @brief Set DHR12R1 alignment
bogdanm 85:024bf7f99721 241 * @param __ALIGNEMENT__: specifies the DAC alignement
bogdanm 85:024bf7f99721 242 * @retval None
bogdanm 85:024bf7f99721 243 */
emilmont 77:869cf507173a 244 #define __HAL_DHR12R1_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000008) + (__ALIGNEMENT__))
emilmont 77:869cf507173a 245
bogdanm 85:024bf7f99721 246 /** @brief Set DHR12R2 alignment
bogdanm 85:024bf7f99721 247 * @param __ALIGNEMENT__: specifies the DAC alignement
bogdanm 85:024bf7f99721 248 * @retval None
bogdanm 85:024bf7f99721 249 */
emilmont 77:869cf507173a 250 #define __HAL_DHR12R2_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000014) + (__ALIGNEMENT__))
emilmont 77:869cf507173a 251
bogdanm 85:024bf7f99721 252 /** @brief Set DHR12RD alignment
bogdanm 85:024bf7f99721 253 * @param __ALIGNEMENT__: specifies the DAC alignement
bogdanm 85:024bf7f99721 254 * @retval None
bogdanm 85:024bf7f99721 255 */
emilmont 77:869cf507173a 256 #define __HAL_DHR12RD_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000020) + (__ALIGNEMENT__))
emilmont 77:869cf507173a 257
bogdanm 85:024bf7f99721 258 /** @brief Enable the DAC interrupt
bogdanm 85:024bf7f99721 259 * @param __HANDLE__: specifies the DAC handle
bogdanm 85:024bf7f99721 260 * @param __INTERRUPT__: specifies the DAC interrupt.
bogdanm 85:024bf7f99721 261 * @retval None
bogdanm 85:024bf7f99721 262 */
emilmont 77:869cf507173a 263 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
emilmont 77:869cf507173a 264
bogdanm 85:024bf7f99721 265 /** @brief Disable the DAC interrupt
bogdanm 85:024bf7f99721 266 * @param __HANDLE__: specifies the DAC handle
bogdanm 85:024bf7f99721 267 * @param __INTERRUPT__: specifies the DAC interrupt.
bogdanm 85:024bf7f99721 268 * @retval None
bogdanm 85:024bf7f99721 269 */
emilmont 77:869cf507173a 270 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
emilmont 77:869cf507173a 271
bogdanm 85:024bf7f99721 272 /** @brief Get the selected DAC's flag status.
bogdanm 85:024bf7f99721 273 * @param __HANDLE__: specifies the DAC handle.
bogdanm 85:024bf7f99721 274 * @retval None
bogdanm 85:024bf7f99721 275 */
emilmont 77:869cf507173a 276 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
emilmont 77:869cf507173a 277
bogdanm 85:024bf7f99721 278 /** @brief Clear the DAC's flag.
bogdanm 85:024bf7f99721 279 * @param __HANDLE__: specifies the DAC handle.
bogdanm 85:024bf7f99721 280 * @retval None
bogdanm 85:024bf7f99721 281 */
Kojto 90:cb3d968589d8 282 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__))
emilmont 77:869cf507173a 283
emilmont 77:869cf507173a 284 /* Include DAC HAL Extension module */
bogdanm 85:024bf7f99721 285 #include "stm32f4xx_hal_dac_ex.h"
emilmont 77:869cf507173a 286
bogdanm 85:024bf7f99721 287 /* Exported functions --------------------------------------------------------*/
bogdanm 85:024bf7f99721 288 /* Initialization/de-initialization functions *********************************/
emilmont 77:869cf507173a 289 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac);
emilmont 77:869cf507173a 290 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac);
bogdanm 81:7d30d6019079 291 void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac);
bogdanm 81:7d30d6019079 292 void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac);
emilmont 77:869cf507173a 293
bogdanm 85:024bf7f99721 294 /* I/O operation functions ****************************************************/
emilmont 77:869cf507173a 295 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel);
emilmont 77:869cf507173a 296 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel);
emilmont 77:869cf507173a 297 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment);
emilmont 77:869cf507173a 298 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel);
emilmont 77:869cf507173a 299 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel);
emilmont 77:869cf507173a 300
bogdanm 85:024bf7f99721 301 /* Peripheral Control functions ***********************************************/
emilmont 77:869cf507173a 302 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel);
emilmont 77:869cf507173a 303 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
emilmont 77:869cf507173a 304
bogdanm 85:024bf7f99721 305 /* Peripheral State functions *************************************************/
emilmont 77:869cf507173a 306 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac);
emilmont 77:869cf507173a 307 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac);
emilmont 77:869cf507173a 308 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
emilmont 77:869cf507173a 309
bogdanm 81:7d30d6019079 310 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac);
bogdanm 81:7d30d6019079 311 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac);
bogdanm 81:7d30d6019079 312 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
bogdanm 81:7d30d6019079 313 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac);
emilmont 77:869cf507173a 314
emilmont 77:869cf507173a 315 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
emilmont 77:869cf507173a 316
emilmont 77:869cf507173a 317 /**
emilmont 77:869cf507173a 318 * @}
emilmont 77:869cf507173a 319 */
emilmont 77:869cf507173a 320
emilmont 77:869cf507173a 321 /**
emilmont 77:869cf507173a 322 * @}
emilmont 77:869cf507173a 323 */
emilmont 77:869cf507173a 324
emilmont 77:869cf507173a 325 #ifdef __cplusplus
emilmont 77:869cf507173a 326 }
emilmont 77:869cf507173a 327 #endif
emilmont 77:869cf507173a 328
emilmont 77:869cf507173a 329 #endif /*__STM32F4xx_HAL_DAC_H */
emilmont 77:869cf507173a 330
emilmont 77:869cf507173a 331 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/