meh

Fork of mbed by mbed official

Committer:
emilmont
Date:
Fri Feb 14 14:36:43 2014 +0000
Revision:
77:869cf507173a
Child:
81:7d30d6019079
Release 77 of the mbed library

Main changes:
* Add target NUCLEO_F030R8
* Add target NUCLEO_F401RE
* Add target NUCLEO_F103RB
* Add target NUCLEO_L152RE

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32f4xx_hal_can.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
emilmont 77:869cf507173a 5 * @version V1.0.0RC2
emilmont 77:869cf507173a 6 * @date 04-February-2014
emilmont 77:869cf507173a 7 * @brief Header file of CAN HAL module.
emilmont 77:869cf507173a 8 ******************************************************************************
emilmont 77:869cf507173a 9 * @attention
emilmont 77:869cf507173a 10 *
emilmont 77:869cf507173a 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 12 *
emilmont 77:869cf507173a 13 * Redistribution and use in source and binary forms, with or without modification,
emilmont 77:869cf507173a 14 * are permitted provided that the following conditions are met:
emilmont 77:869cf507173a 15 * 1. Redistributions of source code must retain the above copyright notice,
emilmont 77:869cf507173a 16 * this list of conditions and the following disclaimer.
emilmont 77:869cf507173a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
emilmont 77:869cf507173a 18 * this list of conditions and the following disclaimer in the documentation
emilmont 77:869cf507173a 19 * and/or other materials provided with the distribution.
emilmont 77:869cf507173a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
emilmont 77:869cf507173a 21 * may be used to endorse or promote products derived from this software
emilmont 77:869cf507173a 22 * without specific prior written permission.
emilmont 77:869cf507173a 23 *
emilmont 77:869cf507173a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
emilmont 77:869cf507173a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
emilmont 77:869cf507173a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
emilmont 77:869cf507173a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
emilmont 77:869cf507173a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
emilmont 77:869cf507173a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
emilmont 77:869cf507173a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emilmont 77:869cf507173a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
emilmont 77:869cf507173a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
emilmont 77:869cf507173a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 34 *
emilmont 77:869cf507173a 35 ******************************************************************************
emilmont 77:869cf507173a 36 */
emilmont 77:869cf507173a 37
emilmont 77:869cf507173a 38 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 39 #ifndef __STM32F4xx_HAL_CAN_H
emilmont 77:869cf507173a 40 #define __STM32F4xx_HAL_CAN_H
emilmont 77:869cf507173a 41
emilmont 77:869cf507173a 42 #ifdef __cplusplus
emilmont 77:869cf507173a 43 extern "C" {
emilmont 77:869cf507173a 44 #endif
emilmont 77:869cf507173a 45
emilmont 77:869cf507173a 46 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
emilmont 77:869cf507173a 47 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 48 #include "stm32f4xx_hal_def.h"
emilmont 77:869cf507173a 49
emilmont 77:869cf507173a 50 /** @addtogroup STM32F4xx_HAL_Driver
emilmont 77:869cf507173a 51 * @{
emilmont 77:869cf507173a 52 */
emilmont 77:869cf507173a 53
emilmont 77:869cf507173a 54 /** @addtogroup CAN
emilmont 77:869cf507173a 55 * @{
emilmont 77:869cf507173a 56 */
emilmont 77:869cf507173a 57
emilmont 77:869cf507173a 58 /* Exported types ------------------------------------------------------------*/
emilmont 77:869cf507173a 59
emilmont 77:869cf507173a 60 /**
emilmont 77:869cf507173a 61 * @brief HAL State structures definition
emilmont 77:869cf507173a 62 */
emilmont 77:869cf507173a 63 typedef enum
emilmont 77:869cf507173a 64 {
emilmont 77:869cf507173a 65 HAL_CAN_STATE_RESET = 0x00, /*!< CAN not yet initialized or disabled */
emilmont 77:869cf507173a 66 HAL_CAN_STATE_READY = 0x01, /*!< CAN initialized and ready for use */
emilmont 77:869cf507173a 67 HAL_CAN_STATE_BUSY = 0x02, /*!< CAN process is ongoing */
emilmont 77:869cf507173a 68 HAL_CAN_STATE_BUSY_TX = 0x12, /*!< CAN process is ongoing */
emilmont 77:869cf507173a 69 HAL_CAN_STATE_BUSY_RX = 0x22, /*!< CAN process is ongoing */
emilmont 77:869cf507173a 70 HAL_CAN_STATE_BUSY_TX_RX = 0x32, /*!< CAN process is ongoing */
emilmont 77:869cf507173a 71 HAL_CAN_STATE_TIMEOUT = 0x03, /*!< Timeout state */
emilmont 77:869cf507173a 72 HAL_CAN_STATE_ERROR = 0x04 /*!< CAN error state */
emilmont 77:869cf507173a 73
emilmont 77:869cf507173a 74 }HAL_CAN_StateTypeDef;
emilmont 77:869cf507173a 75
emilmont 77:869cf507173a 76 /**
emilmont 77:869cf507173a 77 * @brief CAN init structure definition
emilmont 77:869cf507173a 78 */
emilmont 77:869cf507173a 79 typedef struct
emilmont 77:869cf507173a 80 {
emilmont 77:869cf507173a 81 uint32_t Prescaler; /*!< Specifies the length of a time quantum.
emilmont 77:869cf507173a 82 This parameter must be a number between Min_Data = 1 and Max_Data = 1024 */
emilmont 77:869cf507173a 83
emilmont 77:869cf507173a 84 uint32_t Mode; /*!< Specifies the CAN operating mode.
emilmont 77:869cf507173a 85 This parameter can be a value of @ref CAN_operating_mode */
emilmont 77:869cf507173a 86
emilmont 77:869cf507173a 87 uint32_t SJW; /*!< Specifies the maximum number of time quanta
emilmont 77:869cf507173a 88 the CAN hardware is allowed to lengthen or
emilmont 77:869cf507173a 89 shorten a bit to perform resynchronization.
emilmont 77:869cf507173a 90 This parameter can be a value of @ref CAN_synchronisation_jump_width */
emilmont 77:869cf507173a 91
emilmont 77:869cf507173a 92 uint32_t BS1; /*!< Specifies the number of time quanta in Bit Segment 1.
emilmont 77:869cf507173a 93 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */
emilmont 77:869cf507173a 94
emilmont 77:869cf507173a 95 uint32_t BS2; /*!< Specifies the number of time quanta in Bit Segment 2.
emilmont 77:869cf507173a 96 This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */
emilmont 77:869cf507173a 97
emilmont 77:869cf507173a 98 uint32_t TTCM; /*!< Enable or disable the time triggered communication mode.
emilmont 77:869cf507173a 99 This parameter can be set to ENABLE or DISABLE. */
emilmont 77:869cf507173a 100
emilmont 77:869cf507173a 101 uint32_t ABOM; /*!< Enable or disable the automatic bus-off management.
emilmont 77:869cf507173a 102 This parameter can be set to ENABLE or DISABLE */
emilmont 77:869cf507173a 103
emilmont 77:869cf507173a 104 uint32_t AWUM; /*!< Enable or disable the automatic wake-up mode.
emilmont 77:869cf507173a 105 This parameter can be set to ENABLE or DISABLE */
emilmont 77:869cf507173a 106
emilmont 77:869cf507173a 107 uint32_t NART; /*!< Enable or disable the non-automatic retransmission mode.
emilmont 77:869cf507173a 108 This parameter can be set to ENABLE or DISABLE */
emilmont 77:869cf507173a 109
emilmont 77:869cf507173a 110 uint32_t RFLM; /*!< Enable or disable the receive FIFO Locked mode.
emilmont 77:869cf507173a 111 This parameter can be set to ENABLE or DISABLE */
emilmont 77:869cf507173a 112
emilmont 77:869cf507173a 113 uint32_t TXFP; /*!< Enable or disable the transmit FIFO priority.
emilmont 77:869cf507173a 114 This parameter can be set to ENABLE or DISABLE */
emilmont 77:869cf507173a 115 }CAN_InitTypeDef;
emilmont 77:869cf507173a 116
emilmont 77:869cf507173a 117 /**
emilmont 77:869cf507173a 118 * @brief CAN filter configuration structure definition
emilmont 77:869cf507173a 119 */
emilmont 77:869cf507173a 120 typedef struct
emilmont 77:869cf507173a 121 {
emilmont 77:869cf507173a 122 uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit
emilmont 77:869cf507173a 123 configuration, first one for a 16-bit configuration).
emilmont 77:869cf507173a 124 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
emilmont 77:869cf507173a 125
emilmont 77:869cf507173a 126 uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit
emilmont 77:869cf507173a 127 configuration, second one for a 16-bit configuration).
emilmont 77:869cf507173a 128 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
emilmont 77:869cf507173a 129
emilmont 77:869cf507173a 130 uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number,
emilmont 77:869cf507173a 131 according to the mode (MSBs for a 32-bit configuration,
emilmont 77:869cf507173a 132 first one for a 16-bit configuration).
emilmont 77:869cf507173a 133 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
emilmont 77:869cf507173a 134
emilmont 77:869cf507173a 135 uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number,
emilmont 77:869cf507173a 136 according to the mode (LSBs for a 32-bit configuration,
emilmont 77:869cf507173a 137 second one for a 16-bit configuration).
emilmont 77:869cf507173a 138 This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
emilmont 77:869cf507173a 139
emilmont 77:869cf507173a 140 uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter.
emilmont 77:869cf507173a 141 This parameter can be a value of @ref CAN_filter_FIFO */
emilmont 77:869cf507173a 142
emilmont 77:869cf507173a 143 uint32_t FilterNumber; /*!< Specifies the filter which will be initialized.
emilmont 77:869cf507173a 144 This parameter must be a number between Min_Data = 0 and Max_Data = 27 */
emilmont 77:869cf507173a 145
emilmont 77:869cf507173a 146 uint32_t FilterMode; /*!< Specifies the filter mode to be initialized.
emilmont 77:869cf507173a 147 This parameter can be a value of @ref CAN_filter_mode */
emilmont 77:869cf507173a 148
emilmont 77:869cf507173a 149 uint32_t FilterScale; /*!< Specifies the filter scale.
emilmont 77:869cf507173a 150 This parameter can be a value of @ref CAN_filter_scale */
emilmont 77:869cf507173a 151
emilmont 77:869cf507173a 152 uint32_t FilterActivation; /*!< Enable or disable the filter.
emilmont 77:869cf507173a 153 This parameter can be set to ENABLE or DISABLE. */
emilmont 77:869cf507173a 154
emilmont 77:869cf507173a 155 uint32_t BankNumber; /*!< Select the start slave bank filter
emilmont 77:869cf507173a 156 This parameter must be a number between Min_Data = 0 and Max_Data = 28 */
emilmont 77:869cf507173a 157
emilmont 77:869cf507173a 158 }CAN_FilterConfTypeDef;
emilmont 77:869cf507173a 159
emilmont 77:869cf507173a 160 /**
emilmont 77:869cf507173a 161 * @brief CAN Tx message structure definition
emilmont 77:869cf507173a 162 */
emilmont 77:869cf507173a 163 typedef struct
emilmont 77:869cf507173a 164 {
emilmont 77:869cf507173a 165 uint32_t StdId; /*!< Specifies the standard identifier.
emilmont 77:869cf507173a 166 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
emilmont 77:869cf507173a 167
emilmont 77:869cf507173a 168 uint32_t ExtId; /*!< Specifies the extended identifier.
emilmont 77:869cf507173a 169 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
emilmont 77:869cf507173a 170
emilmont 77:869cf507173a 171 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted.
emilmont 77:869cf507173a 172 This parameter can be a value of @ref CAN_identifier_type */
emilmont 77:869cf507173a 173
emilmont 77:869cf507173a 174 uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted.
emilmont 77:869cf507173a 175 This parameter can be a value of @ref CAN_remote_transmission_request */
emilmont 77:869cf507173a 176
emilmont 77:869cf507173a 177 uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted.
emilmont 77:869cf507173a 178 This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
emilmont 77:869cf507173a 179
emilmont 77:869cf507173a 180 uint32_t Data[8]; /*!< Contains the data to be transmitted.
emilmont 77:869cf507173a 181 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
emilmont 77:869cf507173a 182
emilmont 77:869cf507173a 183 }CanTxMsgTypeDef;
emilmont 77:869cf507173a 184
emilmont 77:869cf507173a 185 /**
emilmont 77:869cf507173a 186 * @brief CAN Rx message structure definition
emilmont 77:869cf507173a 187 */
emilmont 77:869cf507173a 188 typedef struct
emilmont 77:869cf507173a 189 {
emilmont 77:869cf507173a 190 uint32_t StdId; /*!< Specifies the standard identifier.
emilmont 77:869cf507173a 191 This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
emilmont 77:869cf507173a 192
emilmont 77:869cf507173a 193 uint32_t ExtId; /*!< Specifies the extended identifier.
emilmont 77:869cf507173a 194 This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
emilmont 77:869cf507173a 195
emilmont 77:869cf507173a 196 uint32_t IDE; /*!< Specifies the type of identifier for the message that will be received.
emilmont 77:869cf507173a 197 This parameter can be a value of @ref CAN_identifier_type */
emilmont 77:869cf507173a 198
emilmont 77:869cf507173a 199 uint32_t RTR; /*!< Specifies the type of frame for the received message.
emilmont 77:869cf507173a 200 This parameter can be a value of @ref CAN_remote_transmission_request */
emilmont 77:869cf507173a 201
emilmont 77:869cf507173a 202 uint32_t DLC; /*!< Specifies the length of the frame that will be received.
emilmont 77:869cf507173a 203 This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
emilmont 77:869cf507173a 204
emilmont 77:869cf507173a 205 uint32_t Data[8]; /*!< Contains the data to be received.
emilmont 77:869cf507173a 206 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
emilmont 77:869cf507173a 207
emilmont 77:869cf507173a 208 uint32_t FMI; /*!< Specifies the index of the filter the message stored in the mailbox passes through.
emilmont 77:869cf507173a 209 This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
emilmont 77:869cf507173a 210
emilmont 77:869cf507173a 211 uint32_t FIFONumber; /*!< Specifies the receive FIFO number.
emilmont 77:869cf507173a 212 This parameter can be CAN_FIFO0 or CAN_FIFO1 */
emilmont 77:869cf507173a 213
emilmont 77:869cf507173a 214 }CanRxMsgTypeDef;
emilmont 77:869cf507173a 215
emilmont 77:869cf507173a 216 /**
emilmont 77:869cf507173a 217 * @brief CAN handle Structure definition
emilmont 77:869cf507173a 218 */
emilmont 77:869cf507173a 219 typedef struct
emilmont 77:869cf507173a 220 {
emilmont 77:869cf507173a 221 CAN_TypeDef *Instance; /*!< Register base address */
emilmont 77:869cf507173a 222
emilmont 77:869cf507173a 223 CAN_InitTypeDef Init; /*!< CAN required parameters */
emilmont 77:869cf507173a 224
emilmont 77:869cf507173a 225 CanTxMsgTypeDef* pTxMsg; /*!< Pointer to transmit structure */
emilmont 77:869cf507173a 226
emilmont 77:869cf507173a 227 CanRxMsgTypeDef* pRxMsg; /*!< Pointer to reception structure */
emilmont 77:869cf507173a 228
emilmont 77:869cf507173a 229 __IO HAL_CAN_StateTypeDef State; /*!< CAN communication state */
emilmont 77:869cf507173a 230
emilmont 77:869cf507173a 231 HAL_LockTypeDef Lock; /*!< CAN locking object */
emilmont 77:869cf507173a 232
emilmont 77:869cf507173a 233 __IO uint32_t ErrorCode; /*!< CAN Error code */
emilmont 77:869cf507173a 234
emilmont 77:869cf507173a 235 }CAN_HandleTypeDef;
emilmont 77:869cf507173a 236
emilmont 77:869cf507173a 237 /* Exported constants --------------------------------------------------------*/
emilmont 77:869cf507173a 238
emilmont 77:869cf507173a 239 /** @defgroup CAN_Exported_Constants
emilmont 77:869cf507173a 240 * @{
emilmont 77:869cf507173a 241 */
emilmont 77:869cf507173a 242
emilmont 77:869cf507173a 243 /** @defgroup HAL CAN Error Code
emilmont 77:869cf507173a 244 * @{
emilmont 77:869cf507173a 245 */
emilmont 77:869cf507173a 246 #define HAL_CAN_ERROR_NONE 0x00 /*!< No error */
emilmont 77:869cf507173a 247 #define HAL_CAN_ERROR_EWG 0x01 /*!< EWG error */
emilmont 77:869cf507173a 248 #define HAL_CAN_ERROR_EPV 0x02 /*!< EPV error */
emilmont 77:869cf507173a 249 #define HAL_CAN_ERROR_BOF 0x04 /*!< BOF error */
emilmont 77:869cf507173a 250 #define HAL_CAN_ERROR_STF 0x08 /*!< Stuff error */
emilmont 77:869cf507173a 251 #define HAL_CAN_ERROR_FOR 0x10 /*!< Form error */
emilmont 77:869cf507173a 252 #define HAL_CAN_ERROR_ACK 0x20 /*!< Acknowledgment error */
emilmont 77:869cf507173a 253 #define HAL_CAN_ERROR_BR 0x40 /*!< Bit recessive */
emilmont 77:869cf507173a 254 #define HAL_CAN_ERROR_BD 0x80 /*!< LEC dominant */
emilmont 77:869cf507173a 255 #define HAL_CAN_ERROR_CRC 0x100 /*!< LEC transfer error */
emilmont 77:869cf507173a 256 /**
emilmont 77:869cf507173a 257 * @}
emilmont 77:869cf507173a 258 */
emilmont 77:869cf507173a 259
emilmont 77:869cf507173a 260
emilmont 77:869cf507173a 261 /** @defgroup CAN_InitStatus
emilmont 77:869cf507173a 262 * @{
emilmont 77:869cf507173a 263 */
emilmont 77:869cf507173a 264 #define CAN_INITSTATUS_FAILED ((uint8_t)0x00) /*!< CAN initialization failed */
emilmont 77:869cf507173a 265 #define CAN_INITSTATUS_SUCCESS ((uint8_t)0x01) /*!< CAN initialization OK */
emilmont 77:869cf507173a 266 /**
emilmont 77:869cf507173a 267 * @}
emilmont 77:869cf507173a 268 */
emilmont 77:869cf507173a 269
emilmont 77:869cf507173a 270 /** @defgroup CAN_operating_mode
emilmont 77:869cf507173a 271 * @{
emilmont 77:869cf507173a 272 */
emilmont 77:869cf507173a 273 #define CAN_MODE_NORMAL ((uint32_t)0x00000000) /*!< Normal mode */
emilmont 77:869cf507173a 274 #define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */
emilmont 77:869cf507173a 275 #define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */
emilmont 77:869cf507173a 276 #define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with silent mode */
emilmont 77:869cf507173a 277
emilmont 77:869cf507173a 278 #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \
emilmont 77:869cf507173a 279 ((MODE) == CAN_MODE_LOOPBACK)|| \
emilmont 77:869cf507173a 280 ((MODE) == CAN_MODE_SILENT) || \
emilmont 77:869cf507173a 281 ((MODE) == CAN_MODE_SILENT_LOOPBACK))
emilmont 77:869cf507173a 282 /**
emilmont 77:869cf507173a 283 * @}
emilmont 77:869cf507173a 284 */
emilmont 77:869cf507173a 285
emilmont 77:869cf507173a 286
emilmont 77:869cf507173a 287 /** @defgroup CAN_synchronisation_jump_width
emilmont 77:869cf507173a 288 * @{
emilmont 77:869cf507173a 289 */
emilmont 77:869cf507173a 290 #define CAN_SJW_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */
emilmont 77:869cf507173a 291 #define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /*!< 2 time quantum */
emilmont 77:869cf507173a 292 #define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /*!< 3 time quantum */
emilmont 77:869cf507173a 293 #define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /*!< 4 time quantum */
emilmont 77:869cf507173a 294
emilmont 77:869cf507173a 295 #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ)|| \
emilmont 77:869cf507173a 296 ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ))
emilmont 77:869cf507173a 297 /**
emilmont 77:869cf507173a 298 * @}
emilmont 77:869cf507173a 299 */
emilmont 77:869cf507173a 300
emilmont 77:869cf507173a 301 /** @defgroup CAN_time_quantum_in_bit_segment_1
emilmont 77:869cf507173a 302 * @{
emilmont 77:869cf507173a 303 */
emilmont 77:869cf507173a 304 #define CAN_BS1_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */
emilmont 77:869cf507173a 305 #define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /*!< 2 time quantum */
emilmont 77:869cf507173a 306 #define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /*!< 3 time quantum */
emilmont 77:869cf507173a 307 #define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 4 time quantum */
emilmont 77:869cf507173a 308 #define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /*!< 5 time quantum */
emilmont 77:869cf507173a 309 #define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 6 time quantum */
emilmont 77:869cf507173a 310 #define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 7 time quantum */
emilmont 77:869cf507173a 311 #define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 8 time quantum */
emilmont 77:869cf507173a 312 #define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /*!< 9 time quantum */
emilmont 77:869cf507173a 313 #define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0)) /*!< 10 time quantum */
emilmont 77:869cf507173a 314 #define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1)) /*!< 11 time quantum */
emilmont 77:869cf507173a 315 #define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 12 time quantum */
emilmont 77:869cf507173a 316 #define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2)) /*!< 13 time quantum */
emilmont 77:869cf507173a 317 #define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 14 time quantum */
emilmont 77:869cf507173a 318 #define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 15 time quantum */
emilmont 77:869cf507173a 319 #define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */
emilmont 77:869cf507173a 320
emilmont 77:869cf507173a 321 #define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ)
emilmont 77:869cf507173a 322 /**
emilmont 77:869cf507173a 323 * @}
emilmont 77:869cf507173a 324 */
emilmont 77:869cf507173a 325
emilmont 77:869cf507173a 326 /** @defgroup CAN_time_quantum_in_bit_segment_2
emilmont 77:869cf507173a 327 * @{
emilmont 77:869cf507173a 328 */
emilmont 77:869cf507173a 329 #define CAN_BS2_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */
emilmont 77:869cf507173a 330 #define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /*!< 2 time quantum */
emilmont 77:869cf507173a 331 #define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /*!< 3 time quantum */
emilmont 77:869cf507173a 332 #define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) /*!< 4 time quantum */
emilmont 77:869cf507173a 333 #define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /*!< 5 time quantum */
emilmont 77:869cf507173a 334 #define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0)) /*!< 6 time quantum */
emilmont 77:869cf507173a 335 #define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1)) /*!< 7 time quantum */
emilmont 77:869cf507173a 336 #define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /*!< 8 time quantum */
emilmont 77:869cf507173a 337
emilmont 77:869cf507173a 338 #define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ)
emilmont 77:869cf507173a 339 /**
emilmont 77:869cf507173a 340 * @}
emilmont 77:869cf507173a 341 */
emilmont 77:869cf507173a 342
emilmont 77:869cf507173a 343 /** @defgroup CAN_clock_prescaler
emilmont 77:869cf507173a 344 * @{
emilmont 77:869cf507173a 345 */
emilmont 77:869cf507173a 346 #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 1024))
emilmont 77:869cf507173a 347 /**
emilmont 77:869cf507173a 348 * @}
emilmont 77:869cf507173a 349 */
emilmont 77:869cf507173a 350
emilmont 77:869cf507173a 351 /** @defgroup CAN_filter_number
emilmont 77:869cf507173a 352 * @{
emilmont 77:869cf507173a 353 */
emilmont 77:869cf507173a 354 #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27)
emilmont 77:869cf507173a 355 /**
emilmont 77:869cf507173a 356 * @}
emilmont 77:869cf507173a 357 */
emilmont 77:869cf507173a 358
emilmont 77:869cf507173a 359 /** @defgroup CAN_filter_mode
emilmont 77:869cf507173a 360 * @{
emilmont 77:869cf507173a 361 */
emilmont 77:869cf507173a 362 #define CAN_FILTERMODE_IDMASK ((uint8_t)0x00) /*!< Identifier mask mode */
emilmont 77:869cf507173a 363 #define CAN_FILTERMODE_IDLIST ((uint8_t)0x01) /*!< Identifier list mode */
emilmont 77:869cf507173a 364
emilmont 77:869cf507173a 365 #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \
emilmont 77:869cf507173a 366 ((MODE) == CAN_FILTERMODE_IDLIST))
emilmont 77:869cf507173a 367 /**
emilmont 77:869cf507173a 368 * @}
emilmont 77:869cf507173a 369 */
emilmont 77:869cf507173a 370
emilmont 77:869cf507173a 371 /** @defgroup CAN_filter_scale
emilmont 77:869cf507173a 372 * @{
emilmont 77:869cf507173a 373 */
emilmont 77:869cf507173a 374 #define CAN_FILTERSCALE_16BIT ((uint8_t)0x00) /*!< Two 16-bit filters */
emilmont 77:869cf507173a 375 #define CAN_FILTERSCALE_32BIT ((uint8_t)0x01) /*!< One 32-bit filter */
emilmont 77:869cf507173a 376
emilmont 77:869cf507173a 377 #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \
emilmont 77:869cf507173a 378 ((SCALE) == CAN_FILTERSCALE_32BIT))
emilmont 77:869cf507173a 379 /**
emilmont 77:869cf507173a 380 * @}
emilmont 77:869cf507173a 381 */
emilmont 77:869cf507173a 382
emilmont 77:869cf507173a 383 /** @defgroup CAN_filter_FIFO
emilmont 77:869cf507173a 384 * @{
emilmont 77:869cf507173a 385 */
emilmont 77:869cf507173a 386 #define CAN_FILTER_FIFO0 ((uint8_t)0x00) /*!< Filter FIFO 0 assignment for filter x */
emilmont 77:869cf507173a 387 #define CAN_FILTER_FIFO1 ((uint8_t)0x01) /*!< Filter FIFO 1 assignment for filter x */
emilmont 77:869cf507173a 388
emilmont 77:869cf507173a 389 #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \
emilmont 77:869cf507173a 390 ((FIFO) == CAN_FILTER_FIFO1))
emilmont 77:869cf507173a 391
emilmont 77:869cf507173a 392 /* Legacy defines */
emilmont 77:869cf507173a 393 #define CAN_FilterFIFO0 CAN_FILTER_FIFO0
emilmont 77:869cf507173a 394 #define CAN_FilterFIFO1 CAN_FILTER_FIFO1
emilmont 77:869cf507173a 395 /**
emilmont 77:869cf507173a 396 * @}
emilmont 77:869cf507173a 397 */
emilmont 77:869cf507173a 398
emilmont 77:869cf507173a 399 /** @defgroup CAN_Start_bank_filter_for_slave_CAN
emilmont 77:869cf507173a 400 * @{
emilmont 77:869cf507173a 401 */
emilmont 77:869cf507173a 402 #define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28)
emilmont 77:869cf507173a 403 /**
emilmont 77:869cf507173a 404 * @}
emilmont 77:869cf507173a 405 */
emilmont 77:869cf507173a 406
emilmont 77:869cf507173a 407 /** @defgroup CAN_Tx
emilmont 77:869cf507173a 408 * @{
emilmont 77:869cf507173a 409 */
emilmont 77:869cf507173a 410 #define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02))
emilmont 77:869cf507173a 411 #define IS_CAN_STDID(STDID) ((STDID) <= ((uint32_t)0x7FF))
emilmont 77:869cf507173a 412 #define IS_CAN_EXTID(EXTID) ((EXTID) <= ((uint32_t)0x1FFFFFFF))
emilmont 77:869cf507173a 413 #define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08))
emilmont 77:869cf507173a 414 /**
emilmont 77:869cf507173a 415 * @}
emilmont 77:869cf507173a 416 */
emilmont 77:869cf507173a 417
emilmont 77:869cf507173a 418 /** @defgroup CAN_identifier_type
emilmont 77:869cf507173a 419 * @{
emilmont 77:869cf507173a 420 */
emilmont 77:869cf507173a 421 #define CAN_ID_STD ((uint32_t)0x00000000) /*!< Standard Id */
emilmont 77:869cf507173a 422 #define CAN_ID_EXT ((uint32_t)0x00000004) /*!< Extended Id */
emilmont 77:869cf507173a 423 #define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \
emilmont 77:869cf507173a 424 ((IDTYPE) == CAN_ID_EXT))
emilmont 77:869cf507173a 425 /**
emilmont 77:869cf507173a 426 * @}
emilmont 77:869cf507173a 427 */
emilmont 77:869cf507173a 428
emilmont 77:869cf507173a 429 /** @defgroup CAN_remote_transmission_request
emilmont 77:869cf507173a 430 * @{
emilmont 77:869cf507173a 431 */
emilmont 77:869cf507173a 432 #define CAN_RTR_DATA ((uint32_t)0x00000000) /*!< Data frame */
emilmont 77:869cf507173a 433 #define CAN_RTR_REMOTE ((uint32_t)0x00000002) /*!< Remote frame */
emilmont 77:869cf507173a 434 #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE))
emilmont 77:869cf507173a 435
emilmont 77:869cf507173a 436 /**
emilmont 77:869cf507173a 437 * @}
emilmont 77:869cf507173a 438 */
emilmont 77:869cf507173a 439
emilmont 77:869cf507173a 440 /** @defgroup CAN_transmit_constants
emilmont 77:869cf507173a 441 * @{
emilmont 77:869cf507173a 442 */
emilmont 77:869cf507173a 443 #define CAN_TXSTATUS_FAILED ((uint8_t)0x00) /*!< CAN transmission failed */
emilmont 77:869cf507173a 444 #define CAN_TXSTATUS_OK ((uint8_t)0x01) /*!< CAN transmission succeeded */
emilmont 77:869cf507173a 445 #define CAN_TXSTATUS_PENDING ((uint8_t)0x02) /*!< CAN transmission pending */
emilmont 77:869cf507173a 446 #define CAN_TXSTATUS_NOMAILBOX ((uint8_t)0x04) /*!< CAN cell did not provide CAN_TxStatus_NoMailBox */
emilmont 77:869cf507173a 447
emilmont 77:869cf507173a 448 /**
emilmont 77:869cf507173a 449 * @}
emilmont 77:869cf507173a 450 */
emilmont 77:869cf507173a 451
emilmont 77:869cf507173a 452 /** @defgroup CAN_receive_FIFO_number_constants
emilmont 77:869cf507173a 453 * @{
emilmont 77:869cf507173a 454 */
emilmont 77:869cf507173a 455 #define CAN_FIFO0 ((uint8_t)0x00) /*!< CAN FIFO 0 used to receive */
emilmont 77:869cf507173a 456 #define CAN_FIFO1 ((uint8_t)0x01) /*!< CAN FIFO 1 used to receive */
emilmont 77:869cf507173a 457
emilmont 77:869cf507173a 458 #define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1))
emilmont 77:869cf507173a 459 /**
emilmont 77:869cf507173a 460 * @}
emilmont 77:869cf507173a 461 */
emilmont 77:869cf507173a 462
emilmont 77:869cf507173a 463 /** @defgroup CAN_flags
emilmont 77:869cf507173a 464 * @{
emilmont 77:869cf507173a 465 */
emilmont 77:869cf507173a 466 /* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus()
emilmont 77:869cf507173a 467 and CAN_ClearFlag() functions. */
emilmont 77:869cf507173a 468 /* If the flag is 0x1XXXXXXX, it means that it can only be used with
emilmont 77:869cf507173a 469 CAN_GetFlagStatus() function. */
emilmont 77:869cf507173a 470
emilmont 77:869cf507173a 471 /* Transmit Flags */
emilmont 77:869cf507173a 472 #define CAN_FLAG_RQCP0 ((uint32_t)0x00000500) /*!< Request MailBox0 flag */
emilmont 77:869cf507173a 473 #define CAN_FLAG_RQCP1 ((uint32_t)0x00000508) /*!< Request MailBox1 flag */
emilmont 77:869cf507173a 474 #define CAN_FLAG_RQCP2 ((uint32_t)0x00000510) /*!< Request MailBox2 flag */
emilmont 77:869cf507173a 475 #define CAN_FLAG_TXOK0 ((uint32_t)0x00000501) /*!< Transmission OK MailBox0 flag */
emilmont 77:869cf507173a 476 #define CAN_FLAG_TXOK1 ((uint32_t)0x00000509) /*!< Transmission OK MailBox1 flag */
emilmont 77:869cf507173a 477 #define CAN_FLAG_TXOK2 ((uint32_t)0x00000511) /*!< Transmission OK MailBox2 flag */
emilmont 77:869cf507173a 478 #define CAN_FLAG_TME0 ((uint32_t)0x0000051A) /*!< Transmit mailbox 0 empty flag */
emilmont 77:869cf507173a 479 #define CAN_FLAG_TME1 ((uint32_t)0x0000051B) /*!< Transmit mailbox 0 empty flag */
emilmont 77:869cf507173a 480 #define CAN_FLAG_TME2 ((uint32_t)0x0000051C) /*!< Transmit mailbox 0 empty flag */
emilmont 77:869cf507173a 481
emilmont 77:869cf507173a 482 /* Receive Flags */
emilmont 77:869cf507173a 483 #define CAN_FLAG_FF0 ((uint32_t)0x00000203) /*!< FIFO 0 Full flag */
emilmont 77:869cf507173a 484 #define CAN_FLAG_FOV0 ((uint32_t)0x00000204) /*!< FIFO 0 Overrun flag */
emilmont 77:869cf507173a 485
emilmont 77:869cf507173a 486 #define CAN_FLAG_FF1 ((uint32_t)0x00000403) /*!< FIFO 1 Full flag */
emilmont 77:869cf507173a 487 #define CAN_FLAG_FOV1 ((uint32_t)0x00000404) /*!< FIFO 1 Overrun flag */
emilmont 77:869cf507173a 488
emilmont 77:869cf507173a 489 /* Operating Mode Flags */
emilmont 77:869cf507173a 490 #define CAN_FLAG_WKU ((uint32_t)0x00000103) /*!< Wake up flag */
emilmont 77:869cf507173a 491 #define CAN_FLAG_SLAK ((uint32_t)0x00000101) /*!< Sleep acknowledge flag */
emilmont 77:869cf507173a 492 #define CAN_FLAG_SLAKI ((uint32_t)0x00000104) /*!< Sleep acknowledge flag */
emilmont 77:869cf507173a 493 /* @note When SLAK interrupt is disabled (SLKIE=0), no polling on SLAKI is possible.
emilmont 77:869cf507173a 494 In this case the SLAK bit can be polled.*/
emilmont 77:869cf507173a 495
emilmont 77:869cf507173a 496 /* Error Flags */
emilmont 77:869cf507173a 497 #define CAN_FLAG_EWG ((uint32_t)0x00000300) /*!< Error warning flag */
emilmont 77:869cf507173a 498 #define CAN_FLAG_EPV ((uint32_t)0x00000301) /*!< Error passive flag */
emilmont 77:869cf507173a 499 #define CAN_FLAG_BOF ((uint32_t)0x00000302) /*!< Bus-Off flag */
emilmont 77:869cf507173a 500
emilmont 77:869cf507173a 501 #define IS_CAN_GET_FLAG(FLAG) (((FLAG) == CAN_FLAG_RQCP2) || ((FLAG) == CAN_FLAG_BOF) || \
emilmont 77:869cf507173a 502 ((FLAG) == CAN_FLAG_EPV) || ((FLAG) == CAN_FLAG_EWG) || \
emilmont 77:869cf507173a 503 ((FLAG) == CAN_FLAG_WKU) || ((FLAG) == CAN_FLAG_FOV0) || \
emilmont 77:869cf507173a 504 ((FLAG) == CAN_FLAG_FF0) || ((FLAG) == CAN_FLAG_SLAK) || \
emilmont 77:869cf507173a 505 ((FLAG) == CAN_FLAG_FOV1) || ((FLAG) == CAN_FLAG_FF1) || \
emilmont 77:869cf507173a 506 ((FLAG) == CAN_FLAG_RQCP1) || ((FLAG) == CAN_FLAG_RQCP0))
emilmont 77:869cf507173a 507
emilmont 77:869cf507173a 508
emilmont 77:869cf507173a 509 #define IS_CAN_CLEAR_FLAG(FLAG)(((FLAG) == CAN_FLAG_SLAK) || ((FLAG) == CAN_FLAG_RQCP2) || \
emilmont 77:869cf507173a 510 ((FLAG) == CAN_FLAG_RQCP1) || ((FLAG) == CAN_FLAG_RQCP0) || \
emilmont 77:869cf507173a 511 ((FLAG) == CAN_FLAG_FF0) || ((FLAG) == CAN_FLAG_FOV0) || \
emilmont 77:869cf507173a 512 ((FLAG) == CAN_FLAG_FF1) || ((FLAG) == CAN_FLAG_FOV1) || \
emilmont 77:869cf507173a 513 ((FLAG) == CAN_FLAG_WKU))
emilmont 77:869cf507173a 514 /**
emilmont 77:869cf507173a 515 * @}
emilmont 77:869cf507173a 516 */
emilmont 77:869cf507173a 517
emilmont 77:869cf507173a 518
emilmont 77:869cf507173a 519 /** @defgroup CAN_interrupts
emilmont 77:869cf507173a 520 * @{
emilmont 77:869cf507173a 521 */
emilmont 77:869cf507173a 522 #define CAN_IT_TME ((uint32_t)CAN_IER_TMEIE) /*!< Transmit mailbox empty interrupt */
emilmont 77:869cf507173a 523
emilmont 77:869cf507173a 524 /* Receive Interrupts */
emilmont 77:869cf507173a 525 #define CAN_IT_FMP0 ((uint32_t)CAN_IER_FMPIE0) /*!< FIFO 0 message pending interrupt */
emilmont 77:869cf507173a 526 #define CAN_IT_FF0 ((uint32_t)CAN_IER_FFIE0) /*!< FIFO 0 full interrupt */
emilmont 77:869cf507173a 527 #define CAN_IT_FOV0 ((uint32_t)CAN_IER_FOVIE0) /*!< FIFO 0 overrun interrupt */
emilmont 77:869cf507173a 528 #define CAN_IT_FMP1 ((uint32_t)CAN_IER_FMPIE1) /*!< FIFO 1 message pending interrupt */
emilmont 77:869cf507173a 529 #define CAN_IT_FF1 ((uint32_t)CAN_IER_FFIE1) /*!< FIFO 1 full interrupt */
emilmont 77:869cf507173a 530 #define CAN_IT_FOV1 ((uint32_t)CAN_IER_FOVIE1) /*!< FIFO 1 overrun interrupt */
emilmont 77:869cf507173a 531
emilmont 77:869cf507173a 532 /* Operating Mode Interrupts */
emilmont 77:869cf507173a 533 #define CAN_IT_WKU ((uint32_t)CAN_IER_WKUIE) /*!< Wake-up interrupt */
emilmont 77:869cf507173a 534 #define CAN_IT_SLK ((uint32_t)CAN_IER_SLKIE) /*!< Sleep acknowledge interrupt */
emilmont 77:869cf507173a 535
emilmont 77:869cf507173a 536 /* Error Interrupts */
emilmont 77:869cf507173a 537 #define CAN_IT_EWG ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt */
emilmont 77:869cf507173a 538 #define CAN_IT_EPV ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt */
emilmont 77:869cf507173a 539 #define CAN_IT_BOF ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt */
emilmont 77:869cf507173a 540 #define CAN_IT_LEC ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */
emilmont 77:869cf507173a 541 #define CAN_IT_ERR ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt */
emilmont 77:869cf507173a 542
emilmont 77:869cf507173a 543 /* Flags named as Interrupts : kept only for FW compatibility */
emilmont 77:869cf507173a 544 #define CAN_IT_RQCP0 CAN_IT_TME
emilmont 77:869cf507173a 545 #define CAN_IT_RQCP1 CAN_IT_TME
emilmont 77:869cf507173a 546 #define CAN_IT_RQCP2 CAN_IT_TME
emilmont 77:869cf507173a 547
emilmont 77:869cf507173a 548 #define IS_CAN_IT(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FMP0) ||\
emilmont 77:869cf507173a 549 ((IT) == CAN_IT_FF0) || ((IT) == CAN_IT_FOV0) ||\
emilmont 77:869cf507173a 550 ((IT) == CAN_IT_FMP1) || ((IT) == CAN_IT_FF1) ||\
emilmont 77:869cf507173a 551 ((IT) == CAN_IT_FOV1) || ((IT) == CAN_IT_EWG) ||\
emilmont 77:869cf507173a 552 ((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF) ||\
emilmont 77:869cf507173a 553 ((IT) == CAN_IT_LEC) || ((IT) == CAN_IT_ERR) ||\
emilmont 77:869cf507173a 554 ((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK))
emilmont 77:869cf507173a 555
emilmont 77:869cf507173a 556 #define IS_CAN_CLEAR_IT(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FF0) ||\
emilmont 77:869cf507173a 557 ((IT) == CAN_IT_FOV0)|| ((IT) == CAN_IT_FF1) ||\
emilmont 77:869cf507173a 558 ((IT) == CAN_IT_FOV1)|| ((IT) == CAN_IT_EWG) ||\
emilmont 77:869cf507173a 559 ((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF) ||\
emilmont 77:869cf507173a 560 ((IT) == CAN_IT_LEC) || ((IT) == CAN_IT_ERR) ||\
emilmont 77:869cf507173a 561 ((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK))
emilmont 77:869cf507173a 562 /**
emilmont 77:869cf507173a 563 * @}
emilmont 77:869cf507173a 564 */
emilmont 77:869cf507173a 565
emilmont 77:869cf507173a 566 /* Time out for INAK bit */
emilmont 77:869cf507173a 567 #define INAK_TIMEOUT ((uint32_t)0x0000FFFF)
emilmont 77:869cf507173a 568 /* Time out for SLAK bit */
emilmont 77:869cf507173a 569 #define SLAK_TIMEOUT ((uint32_t)0x0000FFFF)
emilmont 77:869cf507173a 570
emilmont 77:869cf507173a 571 /* Mailboxes definition */
emilmont 77:869cf507173a 572 #define CAN_TXMAILBOX_0 ((uint8_t)0x00)
emilmont 77:869cf507173a 573 #define CAN_TXMAILBOX_1 ((uint8_t)0x01)
emilmont 77:869cf507173a 574 #define CAN_TXMAILBOX_2 ((uint8_t)0x02)
emilmont 77:869cf507173a 575
emilmont 77:869cf507173a 576 /**
emilmont 77:869cf507173a 577 * @}
emilmont 77:869cf507173a 578 */
emilmont 77:869cf507173a 579
emilmont 77:869cf507173a 580 /* Exported macro ------------------------------------------------------------*/
emilmont 77:869cf507173a 581
emilmont 77:869cf507173a 582 /**
emilmont 77:869cf507173a 583 * @brief Enable the specified CAN interrupts.
emilmont 77:869cf507173a 584 * @param __HANDLE__: CAN handle
emilmont 77:869cf507173a 585 * @param __INTERRUPT__: CAN Interrupt
emilmont 77:869cf507173a 586 * @retval None
emilmont 77:869cf507173a 587 */
emilmont 77:869cf507173a 588 #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
emilmont 77:869cf507173a 589
emilmont 77:869cf507173a 590 /**
emilmont 77:869cf507173a 591 * @brief Disable the specified CAN interrupts.
emilmont 77:869cf507173a 592 * @param __HANDLE__: CAN handle
emilmont 77:869cf507173a 593 * @param __INTERRUPT__: CAN Interrupt
emilmont 77:869cf507173a 594 * @retval None
emilmont 77:869cf507173a 595 */
emilmont 77:869cf507173a 596 #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
emilmont 77:869cf507173a 597
emilmont 77:869cf507173a 598 /**
emilmont 77:869cf507173a 599 * @brief Return the number of pending received messages.
emilmont 77:869cf507173a 600 * @param __HANDLE__: CAN handle
emilmont 77:869cf507173a 601 * @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
emilmont 77:869cf507173a 602 * @retval The number of pending message.
emilmont 77:869cf507173a 603 */
emilmont 77:869cf507173a 604 #define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
emilmont 77:869cf507173a 605 ((uint8_t)((__HANDLE__)->Instance->RF0R&(uint32_t)0x03)) : ((uint8_t)((__HANDLE__)->Instance->RF1R&(uint32_t)0x03)))
emilmont 77:869cf507173a 606
emilmont 77:869cf507173a 607 /** @brief Check whether the specified CAN flag is set or not.
emilmont 77:869cf507173a 608 * @param __HANDLE__: CAN Handle
emilmont 77:869cf507173a 609 * @param __FLAG__: specifies the flag to check.
emilmont 77:869cf507173a 610 * This parameter can be one of the following values:
emilmont 77:869cf507173a 611 * @arg CAN_TSR_RQCP0: Request MailBox0 Flag
emilmont 77:869cf507173a 612 * @arg CAN_TSR_RQCP1: Request MailBox1 Flag
emilmont 77:869cf507173a 613 * @arg CAN_TSR_RQCP2: Request MailBox2 Flag
emilmont 77:869cf507173a 614 * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
emilmont 77:869cf507173a 615 * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
emilmont 77:869cf507173a 616 * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
emilmont 77:869cf507173a 617 * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
emilmont 77:869cf507173a 618 * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
emilmont 77:869cf507173a 619 * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
emilmont 77:869cf507173a 620 * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
emilmont 77:869cf507173a 621 * @arg CAN_FLAG_FF0: FIFO 0 Full Flag
emilmont 77:869cf507173a 622 * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
emilmont 77:869cf507173a 623 * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
emilmont 77:869cf507173a 624 * @arg CAN_FLAG_FF1: FIFO 1 Full Flag
emilmont 77:869cf507173a 625 * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
emilmont 77:869cf507173a 626 * @arg CAN_FLAG_WKU: Wake up Flag
emilmont 77:869cf507173a 627 * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
emilmont 77:869cf507173a 628 * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
emilmont 77:869cf507173a 629 * @arg CAN_FLAG_EWG: Error Warning Flag
emilmont 77:869cf507173a 630 * @arg CAN_FLAG_EPV: Error Passive Flag
emilmont 77:869cf507173a 631 * @arg CAN_FLAG_BOF: Bus-Off Flag
emilmont 77:869cf507173a 632 * @retval The new state of __FLAG__ (TRUE or FALSE).
emilmont 77:869cf507173a 633 */
emilmont 77:869cf507173a 634 #define CAN_FLAG_MASK ((uint32_t)0x000000FF)
emilmont 77:869cf507173a 635 #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \
emilmont 77:869cf507173a 636 ((((__FLAG__) >> 8) == 5)? ((((__HANDLE__)->Instance->TSR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
emilmont 77:869cf507173a 637 (((__FLAG__) >> 8) == 2)? ((((__HANDLE__)->Instance->RF0R) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
emilmont 77:869cf507173a 638 (((__FLAG__) >> 8) == 4)? ((((__HANDLE__)->Instance->RF1R) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
emilmont 77:869cf507173a 639 (((__FLAG__) >> 8) == 1)? ((((__HANDLE__)->Instance->MSR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
emilmont 77:869cf507173a 640 ((((__HANDLE__)->Instance->ESR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))))
emilmont 77:869cf507173a 641
emilmont 77:869cf507173a 642 /** @brief Clear the specified CAN pending flag.
emilmont 77:869cf507173a 643 * @param __HANDLE__: CAN Handle.
emilmont 77:869cf507173a 644 * @param __FLAG__: specifies the flag to check.
emilmont 77:869cf507173a 645 * This parameter can be one of the following values:
emilmont 77:869cf507173a 646 * @arg CAN_TSR_RQCP0: Request MailBox0 Flag
emilmont 77:869cf507173a 647 * @arg CAN_TSR_RQCP1: Request MailBox1 Flag
emilmont 77:869cf507173a 648 * @arg CAN_TSR_RQCP2: Request MailBox2 Flag
emilmont 77:869cf507173a 649 * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
emilmont 77:869cf507173a 650 * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
emilmont 77:869cf507173a 651 * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
emilmont 77:869cf507173a 652 * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
emilmont 77:869cf507173a 653 * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
emilmont 77:869cf507173a 654 * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
emilmont 77:869cf507173a 655 * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
emilmont 77:869cf507173a 656 * @arg CAN_FLAG_FF0: FIFO 0 Full Flag
emilmont 77:869cf507173a 657 * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
emilmont 77:869cf507173a 658 * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
emilmont 77:869cf507173a 659 * @arg CAN_FLAG_FF1: FIFO 1 Full Flag
emilmont 77:869cf507173a 660 * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
emilmont 77:869cf507173a 661 * @arg CAN_FLAG_WKU: Wake up Flag
emilmont 77:869cf507173a 662 * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
emilmont 77:869cf507173a 663 * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
emilmont 77:869cf507173a 664 * @arg CAN_FLAG_EWG: Error Warning Flag
emilmont 77:869cf507173a 665 * @arg CAN_FLAG_EPV: Error Passive Flag
emilmont 77:869cf507173a 666 * @arg CAN_FLAG_BOF: Bus-Off Flag
emilmont 77:869cf507173a 667 * @retval The new state of __FLAG__ (TRUE or FALSE).
emilmont 77:869cf507173a 668 */
emilmont 77:869cf507173a 669 #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
emilmont 77:869cf507173a 670 ((((__FLAG__) >> 8) == 5)? (((__HANDLE__)->Instance->TSR) &= ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
emilmont 77:869cf507173a 671 (((__FLAG__) >> 8) == 2)? (((__HANDLE__)->Instance->RF0R) &= ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
emilmont 77:869cf507173a 672 (((__FLAG__) >> 8) == 4)? (((__HANDLE__)->Instance->RF1R) &= ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
emilmont 77:869cf507173a 673 (((__FLAG__) >> 8) == 1)? (((__HANDLE__)->Instance->MSR) &= ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
emilmont 77:869cf507173a 674 (((__HANDLE__)->Instance->ESR) &= ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))))
emilmont 77:869cf507173a 675
emilmont 77:869cf507173a 676 /** @brief Check if the specified CAN interrupt source is enabled or disabled.
emilmont 77:869cf507173a 677 * @param __HANDLE__: CAN Handle
emilmont 77:869cf507173a 678 * @param __INTERRUPT__: specifies the CAN interrupt source to check.
emilmont 77:869cf507173a 679 * This parameter can be one of the following values:
emilmont 77:869cf507173a 680 * @arg CAN_IT_TME: Transmit mailbox empty interrupt enable
emilmont 77:869cf507173a 681 * @arg CAN_IT_FMP0: FIFO0 message pending interrupt enablev
emilmont 77:869cf507173a 682 * @arg CAN_IT_FMP1: FIFO1 message pending interrupt enable
emilmont 77:869cf507173a 683 * @retval The new state of __IT__ (TRUE or FALSE).
emilmont 77:869cf507173a 684 */
emilmont 77:869cf507173a 685 #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
emilmont 77:869cf507173a 686
emilmont 77:869cf507173a 687 /**
emilmont 77:869cf507173a 688 * @brief Check the transmission status of a CAN Frame.
emilmont 77:869cf507173a 689 * @param __HANDLE__: CAN Handle
emilmont 77:869cf507173a 690 * @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
emilmont 77:869cf507173a 691 * @retval The new status of transmission (TRUE or FALSE).
emilmont 77:869cf507173a 692 */
emilmont 77:869cf507173a 693 #define __HAL_CAN_TRANSMIT_STATUS(__HANDLE__, __TRANSMITMAILBOX__)\
emilmont 77:869cf507173a 694 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) == (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) :\
emilmont 77:869cf507173a 695 ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) == (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) :\
emilmont 77:869cf507173a 696 ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)) == (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)))
emilmont 77:869cf507173a 697
emilmont 77:869cf507173a 698
emilmont 77:869cf507173a 699
emilmont 77:869cf507173a 700 /**
emilmont 77:869cf507173a 701 * @brief Release the specified receive FIFO.
emilmont 77:869cf507173a 702 * @param __HANDLE__: CAN handle
emilmont 77:869cf507173a 703 * @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
emilmont 77:869cf507173a 704 * @retval None
emilmont 77:869cf507173a 705 */
emilmont 77:869cf507173a 706 #define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
emilmont 77:869cf507173a 707 ((__HANDLE__)->Instance->RF0R |= CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R |= CAN_RF1R_RFOM1))
emilmont 77:869cf507173a 708
emilmont 77:869cf507173a 709 /**
emilmont 77:869cf507173a 710 * @brief Cancel a transmit request.
emilmont 77:869cf507173a 711 * @param __HANDLE__: CAN Handle
emilmont 77:869cf507173a 712 * @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
emilmont 77:869cf507173a 713 * @retval None
emilmont 77:869cf507173a 714 */
emilmont 77:869cf507173a 715 #define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\
emilmont 77:869cf507173a 716 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ0) :\
emilmont 77:869cf507173a 717 ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ1) :\
emilmont 77:869cf507173a 718 ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ2))
emilmont 77:869cf507173a 719
emilmont 77:869cf507173a 720 /**
emilmont 77:869cf507173a 721 * @brief Enable or disable the DBG Freeze for CAN.
emilmont 77:869cf507173a 722 * @param __HANDLE__: CAN Handle
emilmont 77:869cf507173a 723 * @param __NEWSTATE__: new state of the CAN peripheral.
emilmont 77:869cf507173a 724 * This parameter can be: ENABLE (CAN reception/transmission is frozen
emilmont 77:869cf507173a 725 * during debug. Reception FIFOs can still be accessed/controlled normally)
emilmont 77:869cf507173a 726 * or DISABLE (CAN is working during debug).
emilmont 77:869cf507173a 727 * @retval None
emilmont 77:869cf507173a 728 */
emilmont 77:869cf507173a 729 #define __HAL_CAN_DBG_FREEZE(__HANDLE__, __NEWSTATE__) (((__NEWSTATE__) == ENABLE)? \
emilmont 77:869cf507173a 730 ((__HANDLE__)->Instance->MCR |= CAN_MCR_DBF) : ((__HANDLE__)->Instance->MCR &= ~CAN_MCR_DBF))
emilmont 77:869cf507173a 731
emilmont 77:869cf507173a 732 /* Exported functions --------------------------------------------------------*/
emilmont 77:869cf507173a 733
emilmont 77:869cf507173a 734 /* Initialization/de-initialization functions ***********************************/
emilmont 77:869cf507173a 735 HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan);
emilmont 77:869cf507173a 736 HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig);
emilmont 77:869cf507173a 737 HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan);
emilmont 77:869cf507173a 738 __weak void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan);
emilmont 77:869cf507173a 739 __weak void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan);
emilmont 77:869cf507173a 740
emilmont 77:869cf507173a 741 /* I/O operation functions ******************************************************/
emilmont 77:869cf507173a 742 HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout);
emilmont 77:869cf507173a 743 HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef *hcan);
emilmont 77:869cf507173a 744 HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef *hcan, uint8_t FIFONumber, uint32_t Timeout);
emilmont 77:869cf507173a 745 HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef *hcan, uint8_t FIFONumber);
emilmont 77:869cf507173a 746 HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef *hcan);
emilmont 77:869cf507173a 747 HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan);
emilmont 77:869cf507173a 748
emilmont 77:869cf507173a 749 /* Peripheral State functions ***************************************************/
emilmont 77:869cf507173a 750 void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan);
emilmont 77:869cf507173a 751 uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan);
emilmont 77:869cf507173a 752 HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan);
emilmont 77:869cf507173a 753
emilmont 77:869cf507173a 754 __weak void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan);
emilmont 77:869cf507173a 755 __weak void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan);
emilmont 77:869cf507173a 756 __weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan);
emilmont 77:869cf507173a 757
emilmont 77:869cf507173a 758 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
emilmont 77:869cf507173a 759
emilmont 77:869cf507173a 760 /**
emilmont 77:869cf507173a 761 * @}
emilmont 77:869cf507173a 762 */
emilmont 77:869cf507173a 763
emilmont 77:869cf507173a 764 /**
emilmont 77:869cf507173a 765 * @}
emilmont 77:869cf507173a 766 */
emilmont 77:869cf507173a 767
emilmont 77:869cf507173a 768 #ifdef __cplusplus
emilmont 77:869cf507173a 769 }
emilmont 77:869cf507173a 770 #endif
emilmont 77:869cf507173a 771
emilmont 77:869cf507173a 772 #endif /* __STM32F4xx_CAN_H */
emilmont 77:869cf507173a 773
emilmont 77:869cf507173a 774
emilmont 77:869cf507173a 775 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/