Ricardo Benitez
meh
Fork of
mbed
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mbed official
TARGET_NUCLEO_F401RE/stm32f4xx_hal_sd.h@81:7d30d6019079, 2014-03-19 (annotated)
- Committer:
- bogdanm
- Date:
- Wed Mar 19 18:28:32 2014 +0000
- Revision:
- 81:7d30d6019079
- Parent:
- 77:869cf507173a
- Child:
- 85:024bf7f99721
Release 81 of the mbed library
Main changes:
- Updates and fixes for many targets
- LPC1768: serial interface code fixes
- nRF51822 targets now output a .hex file
- More exporters
- More flexible GPIO API
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| emilmont | 77:869cf507173a | 1 | /** |
| emilmont | 77:869cf507173a | 2 | ****************************************************************************** |
| emilmont | 77:869cf507173a | 3 | * @file stm32f4xx_hal_sd.h |
| emilmont | 77:869cf507173a | 4 | * @author MCD Application Team |
| bogdanm | 81:7d30d6019079 | 5 | * @version V1.0.0 |
| bogdanm | 81:7d30d6019079 | 6 | * @date 18-February-2014 |
| emilmont | 77:869cf507173a | 7 | * @brief Header file of SD HAL module. |
| emilmont | 77:869cf507173a | 8 | ****************************************************************************** |
| emilmont | 77:869cf507173a | 9 | * @attention |
| emilmont | 77:869cf507173a | 10 | * |
| emilmont | 77:869cf507173a | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| emilmont | 77:869cf507173a | 12 | * |
| emilmont | 77:869cf507173a | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| emilmont | 77:869cf507173a | 14 | * are permitted provided that the following conditions are met: |
| emilmont | 77:869cf507173a | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| emilmont | 77:869cf507173a | 16 | * this list of conditions and the following disclaimer. |
| emilmont | 77:869cf507173a | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| emilmont | 77:869cf507173a | 18 | * this list of conditions and the following disclaimer in the documentation |
| emilmont | 77:869cf507173a | 19 | * and/or other materials provided with the distribution. |
| emilmont | 77:869cf507173a | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| emilmont | 77:869cf507173a | 21 | * may be used to endorse or promote products derived from this software |
| emilmont | 77:869cf507173a | 22 | * without specific prior written permission. |
| emilmont | 77:869cf507173a | 23 | * |
| emilmont | 77:869cf507173a | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| emilmont | 77:869cf507173a | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| emilmont | 77:869cf507173a | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| emilmont | 77:869cf507173a | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| emilmont | 77:869cf507173a | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| emilmont | 77:869cf507173a | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| emilmont | 77:869cf507173a | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| emilmont | 77:869cf507173a | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| emilmont | 77:869cf507173a | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| emilmont | 77:869cf507173a | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| emilmont | 77:869cf507173a | 34 | * |
| emilmont | 77:869cf507173a | 35 | ****************************************************************************** |
| emilmont | 77:869cf507173a | 36 | */ |
| emilmont | 77:869cf507173a | 37 | |
| emilmont | 77:869cf507173a | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| emilmont | 77:869cf507173a | 39 | #ifndef __STM32F4xx_HAL_SD_H |
| emilmont | 77:869cf507173a | 40 | #define __STM32F4xx_HAL_SD_H |
| emilmont | 77:869cf507173a | 41 | |
| emilmont | 77:869cf507173a | 42 | #ifdef __cplusplus |
| emilmont | 77:869cf507173a | 43 | extern "C" { |
| emilmont | 77:869cf507173a | 44 | #endif |
| emilmont | 77:869cf507173a | 45 | |
| emilmont | 77:869cf507173a | 46 | /* Includes ------------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 47 | #include "stm32f4xx_ll_sdmmc.h" |
| emilmont | 77:869cf507173a | 48 | |
| emilmont | 77:869cf507173a | 49 | /** @addtogroup STM32F4xx_HAL_Driver |
| emilmont | 77:869cf507173a | 50 | * @{ |
| emilmont | 77:869cf507173a | 51 | */ |
| emilmont | 77:869cf507173a | 52 | |
| emilmont | 77:869cf507173a | 53 | /** @addtogroup SD |
| emilmont | 77:869cf507173a | 54 | * @{ |
| emilmont | 77:869cf507173a | 55 | */ |
| emilmont | 77:869cf507173a | 56 | |
| emilmont | 77:869cf507173a | 57 | /* Exported types ------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 58 | #define SD_InitTypeDef SDIO_InitTypeDef |
| emilmont | 77:869cf507173a | 59 | #define SD_TypeDef SDIO_TypeDef |
| emilmont | 77:869cf507173a | 60 | |
| emilmont | 77:869cf507173a | 61 | /** |
| emilmont | 77:869cf507173a | 62 | * @brief SDIO Handle Structure definition |
| emilmont | 77:869cf507173a | 63 | */ |
| emilmont | 77:869cf507173a | 64 | typedef struct |
| emilmont | 77:869cf507173a | 65 | { |
| emilmont | 77:869cf507173a | 66 | SD_TypeDef *Instance; /*!< SDIO register base address */ |
| emilmont | 77:869cf507173a | 67 | |
| emilmont | 77:869cf507173a | 68 | SD_InitTypeDef Init; /*!< SD required parameters */ |
| emilmont | 77:869cf507173a | 69 | |
| emilmont | 77:869cf507173a | 70 | HAL_LockTypeDef Lock; /*!< SD locking object */ |
| emilmont | 77:869cf507173a | 71 | |
| emilmont | 77:869cf507173a | 72 | uint32_t CardType; /*!< SD card type */ |
| emilmont | 77:869cf507173a | 73 | |
| emilmont | 77:869cf507173a | 74 | uint32_t RCA; /*!< SD relative card address */ |
| emilmont | 77:869cf507173a | 75 | |
| emilmont | 77:869cf507173a | 76 | uint32_t CSD[4]; /*!< SD card specific data table */ |
| emilmont | 77:869cf507173a | 77 | |
| emilmont | 77:869cf507173a | 78 | uint32_t CID[4]; /*!< SD card identification number table */ |
| emilmont | 77:869cf507173a | 79 | |
| emilmont | 77:869cf507173a | 80 | __IO uint32_t SdTransferCplt; /*!< SD transfer complete flag in non blocking mode */ |
| emilmont | 77:869cf507173a | 81 | |
| emilmont | 77:869cf507173a | 82 | __IO uint32_t SdTransferErr; /*!< SD transfer error flag in non blocking mode */ |
| emilmont | 77:869cf507173a | 83 | |
| emilmont | 77:869cf507173a | 84 | __IO uint32_t DmaTransferCplt; /*!< SD DMA transfer complete flag */ |
| emilmont | 77:869cf507173a | 85 | |
| emilmont | 77:869cf507173a | 86 | __IO uint32_t SdOperation; /*!< SD transfer operation (read/write) */ |
| emilmont | 77:869cf507173a | 87 | |
| emilmont | 77:869cf507173a | 88 | DMA_HandleTypeDef *hdmarx; /*!< SD Rx DMA handle parameters */ |
| emilmont | 77:869cf507173a | 89 | |
| emilmont | 77:869cf507173a | 90 | DMA_HandleTypeDef *hdmatx; /*!< SD Tx DMA handle parameters */ |
| emilmont | 77:869cf507173a | 91 | |
| emilmont | 77:869cf507173a | 92 | }SD_HandleTypeDef; |
| emilmont | 77:869cf507173a | 93 | |
| emilmont | 77:869cf507173a | 94 | /** |
| emilmont | 77:869cf507173a | 95 | * @brief Card Specific Data: CSD Register |
| emilmont | 77:869cf507173a | 96 | */ |
| emilmont | 77:869cf507173a | 97 | typedef struct |
| emilmont | 77:869cf507173a | 98 | { |
| emilmont | 77:869cf507173a | 99 | __IO uint8_t CSDStruct; /*!< CSD structure */ |
| emilmont | 77:869cf507173a | 100 | __IO uint8_t SysSpecVersion; /*!< System specification version */ |
| emilmont | 77:869cf507173a | 101 | __IO uint8_t Reserved1; /*!< Reserved */ |
| emilmont | 77:869cf507173a | 102 | __IO uint8_t TAAC; /*!< Data read access time 1 */ |
| emilmont | 77:869cf507173a | 103 | __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */ |
| emilmont | 77:869cf507173a | 104 | __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */ |
| emilmont | 77:869cf507173a | 105 | __IO uint16_t CardComdClasses; /*!< Card command classes */ |
| emilmont | 77:869cf507173a | 106 | __IO uint8_t RdBlockLen; /*!< Max. read data block length */ |
| emilmont | 77:869cf507173a | 107 | __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */ |
| emilmont | 77:869cf507173a | 108 | __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */ |
| emilmont | 77:869cf507173a | 109 | __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */ |
| emilmont | 77:869cf507173a | 110 | __IO uint8_t DSRImpl; /*!< DSR implemented */ |
| emilmont | 77:869cf507173a | 111 | __IO uint8_t Reserved2; /*!< Reserved */ |
| emilmont | 77:869cf507173a | 112 | __IO uint32_t DeviceSize; /*!< Device Size */ |
| emilmont | 77:869cf507173a | 113 | __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */ |
| emilmont | 77:869cf507173a | 114 | __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */ |
| emilmont | 77:869cf507173a | 115 | __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */ |
| emilmont | 77:869cf507173a | 116 | __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */ |
| emilmont | 77:869cf507173a | 117 | __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */ |
| emilmont | 77:869cf507173a | 118 | __IO uint8_t EraseGrSize; /*!< Erase group size */ |
| emilmont | 77:869cf507173a | 119 | __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */ |
| emilmont | 77:869cf507173a | 120 | __IO uint8_t WrProtectGrSize; /*!< Write protect group size */ |
| emilmont | 77:869cf507173a | 121 | __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */ |
| emilmont | 77:869cf507173a | 122 | __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */ |
| emilmont | 77:869cf507173a | 123 | __IO uint8_t WrSpeedFact; /*!< Write speed factor */ |
| emilmont | 77:869cf507173a | 124 | __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ |
| emilmont | 77:869cf507173a | 125 | __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ |
| emilmont | 77:869cf507173a | 126 | __IO uint8_t Reserved3; /*!< Reserved */ |
| emilmont | 77:869cf507173a | 127 | __IO uint8_t ContentProtectAppli; /*!< Content protection application */ |
| emilmont | 77:869cf507173a | 128 | __IO uint8_t FileFormatGrouop; /*!< File format group */ |
| emilmont | 77:869cf507173a | 129 | __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ |
| emilmont | 77:869cf507173a | 130 | __IO uint8_t PermWrProtect; /*!< Permanent write protection */ |
| emilmont | 77:869cf507173a | 131 | __IO uint8_t TempWrProtect; /*!< Temporary write protection */ |
| emilmont | 77:869cf507173a | 132 | __IO uint8_t FileFormat; /*!< File format */ |
| emilmont | 77:869cf507173a | 133 | __IO uint8_t ECC; /*!< ECC code */ |
| emilmont | 77:869cf507173a | 134 | __IO uint8_t CSD_CRC; /*!< CSD CRC */ |
| emilmont | 77:869cf507173a | 135 | __IO uint8_t Reserved4; /*!< Always 1 */ |
| emilmont | 77:869cf507173a | 136 | |
| emilmont | 77:869cf507173a | 137 | }HAL_SD_CSDTypedef; |
| emilmont | 77:869cf507173a | 138 | |
| emilmont | 77:869cf507173a | 139 | /** |
| emilmont | 77:869cf507173a | 140 | * @brief Card Identification Data: CID Register |
| emilmont | 77:869cf507173a | 141 | */ |
| emilmont | 77:869cf507173a | 142 | typedef struct |
| emilmont | 77:869cf507173a | 143 | { |
| emilmont | 77:869cf507173a | 144 | __IO uint8_t ManufacturerID; /*!< Manufacturer ID */ |
| emilmont | 77:869cf507173a | 145 | __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */ |
| emilmont | 77:869cf507173a | 146 | __IO uint32_t ProdName1; /*!< Product Name part1 */ |
| emilmont | 77:869cf507173a | 147 | __IO uint8_t ProdName2; /*!< Product Name part2 */ |
| emilmont | 77:869cf507173a | 148 | __IO uint8_t ProdRev; /*!< Product Revision */ |
| emilmont | 77:869cf507173a | 149 | __IO uint32_t ProdSN; /*!< Product Serial Number */ |
| emilmont | 77:869cf507173a | 150 | __IO uint8_t Reserved1; /*!< Reserved1 */ |
| emilmont | 77:869cf507173a | 151 | __IO uint16_t ManufactDate; /*!< Manufacturing Date */ |
| emilmont | 77:869cf507173a | 152 | __IO uint8_t CID_CRC; /*!< CID CRC */ |
| emilmont | 77:869cf507173a | 153 | __IO uint8_t Reserved2; /*!< Always 1 */ |
| emilmont | 77:869cf507173a | 154 | |
| emilmont | 77:869cf507173a | 155 | }HAL_SD_CIDTypedef; |
| emilmont | 77:869cf507173a | 156 | |
| emilmont | 77:869cf507173a | 157 | /** |
| emilmont | 77:869cf507173a | 158 | * @brief SD Card Status returned by ACMD13 |
| emilmont | 77:869cf507173a | 159 | */ |
| emilmont | 77:869cf507173a | 160 | typedef struct |
| emilmont | 77:869cf507173a | 161 | { |
| emilmont | 77:869cf507173a | 162 | __IO uint8_t DAT_BUS_WIDTH; /*!< Shows the currently defined data bus width */ |
| emilmont | 77:869cf507173a | 163 | __IO uint8_t SECURED_MODE; /*!< Card is in secured mode of operation */ |
| emilmont | 77:869cf507173a | 164 | __IO uint16_t SD_CARD_TYPE; /*!< Carries information about card type */ |
| emilmont | 77:869cf507173a | 165 | __IO uint32_t SIZE_OF_PROTECTED_AREA; /*!< Carries information about the capacity of protected area */ |
| emilmont | 77:869cf507173a | 166 | __IO uint8_t SPEED_CLASS; /*!< Carries information about the speed class of the card */ |
| emilmont | 77:869cf507173a | 167 | __IO uint8_t PERFORMANCE_MOVE; /*!< Carries information about the card's performance move */ |
| emilmont | 77:869cf507173a | 168 | __IO uint8_t AU_SIZE; /*!< Carries information about the card's allocation unit size */ |
| emilmont | 77:869cf507173a | 169 | __IO uint16_t ERASE_SIZE; /*!< Determines the number of AUs to be erased in one operation */ |
| emilmont | 77:869cf507173a | 170 | __IO uint8_t ERASE_TIMEOUT; /*!< Determines the timeout for any number of AU erase */ |
| emilmont | 77:869cf507173a | 171 | __IO uint8_t ERASE_OFFSET; /*!< Carries information about the erase offset */ |
| emilmont | 77:869cf507173a | 172 | |
| emilmont | 77:869cf507173a | 173 | }HAL_SD_CardStatusTypedef; |
| emilmont | 77:869cf507173a | 174 | |
| emilmont | 77:869cf507173a | 175 | /** |
| emilmont | 77:869cf507173a | 176 | * @brief SD Card information structure |
| emilmont | 77:869cf507173a | 177 | */ |
| emilmont | 77:869cf507173a | 178 | typedef struct |
| emilmont | 77:869cf507173a | 179 | { |
| emilmont | 77:869cf507173a | 180 | HAL_SD_CSDTypedef SD_csd; /*!< SD card specific data register */ |
| emilmont | 77:869cf507173a | 181 | HAL_SD_CIDTypedef SD_cid; /*!< SD card identification number register */ |
| emilmont | 77:869cf507173a | 182 | uint64_t CardCapacity; /*!< Card capacity */ |
| emilmont | 77:869cf507173a | 183 | uint32_t CardBlockSize; /*!< Card block size */ |
| emilmont | 77:869cf507173a | 184 | uint16_t RCA; /*!< SD relative card address */ |
| emilmont | 77:869cf507173a | 185 | uint8_t CardType; /*!< SD card type */ |
| emilmont | 77:869cf507173a | 186 | |
| emilmont | 77:869cf507173a | 187 | }HAL_SD_CardInfoTypedef; |
| emilmont | 77:869cf507173a | 188 | |
| emilmont | 77:869cf507173a | 189 | /** |
| emilmont | 77:869cf507173a | 190 | * @brief SD Error status enumeration Structure definition |
| emilmont | 77:869cf507173a | 191 | */ |
| emilmont | 77:869cf507173a | 192 | typedef enum |
| emilmont | 77:869cf507173a | 193 | { |
| emilmont | 77:869cf507173a | 194 | /** |
| emilmont | 77:869cf507173a | 195 | * @brief SD specific error defines |
| emilmont | 77:869cf507173a | 196 | */ |
| emilmont | 77:869cf507173a | 197 | SD_CMD_CRC_FAIL = (1), /*!< Command response received (but CRC check failed) */ |
| emilmont | 77:869cf507173a | 198 | SD_DATA_CRC_FAIL = (2), /*!< Data block sent/received (CRC check failed) */ |
| emilmont | 77:869cf507173a | 199 | SD_CMD_RSP_TIMEOUT = (3), /*!< Command response timeout */ |
| emilmont | 77:869cf507173a | 200 | SD_DATA_TIMEOUT = (4), /*!< Data timeout */ |
| emilmont | 77:869cf507173a | 201 | SD_TX_UNDERRUN = (5), /*!< Transmit FIFO underrun */ |
| emilmont | 77:869cf507173a | 202 | SD_RX_OVERRUN = (6), /*!< Receive FIFO overrun */ |
| emilmont | 77:869cf507173a | 203 | SD_START_BIT_ERR = (7), /*!< Start bit not detected on all data signals in wide bus mode */ |
| emilmont | 77:869cf507173a | 204 | SD_CMD_OUT_OF_RANGE = (8), /*!< Command's argument was out of range. */ |
| emilmont | 77:869cf507173a | 205 | SD_ADDR_MISALIGNED = (9), /*!< Misaligned address */ |
| emilmont | 77:869cf507173a | 206 | SD_BLOCK_LEN_ERR = (10), /*!< Transferred block length is not allowed for the card or the number of transferred bytes does not match the block length */ |
| emilmont | 77:869cf507173a | 207 | SD_ERASE_SEQ_ERR = (11), /*!< An error in the sequence of erase command occurs. */ |
| emilmont | 77:869cf507173a | 208 | SD_BAD_ERASE_PARAM = (12), /*!< An invalid selection for erase groups */ |
| emilmont | 77:869cf507173a | 209 | SD_WRITE_PROT_VIOLATION = (13), /*!< Attempt to program a write protect block */ |
| emilmont | 77:869cf507173a | 210 | SD_LOCK_UNLOCK_FAILED = (14), /*!< Sequence or password error has been detected in unlock command or if there was an attempt to access a locked card */ |
| emilmont | 77:869cf507173a | 211 | SD_COM_CRC_FAILED = (15), /*!< CRC check of the previous command failed */ |
| emilmont | 77:869cf507173a | 212 | SD_ILLEGAL_CMD = (16), /*!< Command is not legal for the card state */ |
| emilmont | 77:869cf507173a | 213 | SD_CARD_ECC_FAILED = (17), /*!< Card internal ECC was applied but failed to correct the data */ |
| emilmont | 77:869cf507173a | 214 | SD_CC_ERROR = (18), /*!< Internal card controller error */ |
| emilmont | 77:869cf507173a | 215 | SD_GENERAL_UNKNOWN_ERROR = (19), /*!< General or unknown error */ |
| emilmont | 77:869cf507173a | 216 | SD_STREAM_READ_UNDERRUN = (20), /*!< The card could not sustain data transfer in stream read operation. */ |
| emilmont | 77:869cf507173a | 217 | SD_STREAM_WRITE_OVERRUN = (21), /*!< The card could not sustain data programming in stream mode */ |
| emilmont | 77:869cf507173a | 218 | SD_CID_CSD_OVERWRITE = (22), /*!< CID/CSD overwrite error */ |
| emilmont | 77:869cf507173a | 219 | SD_WP_ERASE_SKIP = (23), /*!< Only partial address space was erased */ |
| emilmont | 77:869cf507173a | 220 | SD_CARD_ECC_DISABLED = (24), /*!< Command has been executed without using internal ECC */ |
| emilmont | 77:869cf507173a | 221 | SD_ERASE_RESET = (25), /*!< Erase sequence was cleared before executing because an out of erase sequence command was received */ |
| emilmont | 77:869cf507173a | 222 | SD_AKE_SEQ_ERROR = (26), /*!< Error in sequence of authentication. */ |
| emilmont | 77:869cf507173a | 223 | SD_INVALID_VOLTRANGE = (27), |
| emilmont | 77:869cf507173a | 224 | SD_ADDR_OUT_OF_RANGE = (28), |
| emilmont | 77:869cf507173a | 225 | SD_SWITCH_ERROR = (29), |
| emilmont | 77:869cf507173a | 226 | SD_SDIO_DISABLED = (30), |
| emilmont | 77:869cf507173a | 227 | SD_SDIO_FUNCTION_BUSY = (31), |
| emilmont | 77:869cf507173a | 228 | SD_SDIO_FUNCTION_FAILED = (32), |
| emilmont | 77:869cf507173a | 229 | SD_SDIO_UNKNOWN_FUNCTION = (33), |
| emilmont | 77:869cf507173a | 230 | |
| emilmont | 77:869cf507173a | 231 | /** |
| emilmont | 77:869cf507173a | 232 | * @brief Standard error defines |
| emilmont | 77:869cf507173a | 233 | */ |
| emilmont | 77:869cf507173a | 234 | SD_INTERNAL_ERROR = (34), |
| emilmont | 77:869cf507173a | 235 | SD_NOT_CONFIGURED = (35), |
| emilmont | 77:869cf507173a | 236 | SD_REQUEST_PENDING = (36), |
| emilmont | 77:869cf507173a | 237 | SD_REQUEST_NOT_APPLICABLE = (37), |
| emilmont | 77:869cf507173a | 238 | SD_INVALID_PARAMETER = (38), |
| emilmont | 77:869cf507173a | 239 | SD_UNSUPPORTED_FEATURE = (39), |
| emilmont | 77:869cf507173a | 240 | SD_UNSUPPORTED_HW = (40), |
| emilmont | 77:869cf507173a | 241 | SD_ERROR = (41), |
| emilmont | 77:869cf507173a | 242 | SD_OK = (0) |
| emilmont | 77:869cf507173a | 243 | |
| emilmont | 77:869cf507173a | 244 | }HAL_SD_ErrorTypedef; |
| emilmont | 77:869cf507173a | 245 | |
| emilmont | 77:869cf507173a | 246 | /** |
| emilmont | 77:869cf507173a | 247 | * @brief SD Transfer state enumeration structure |
| emilmont | 77:869cf507173a | 248 | */ |
| emilmont | 77:869cf507173a | 249 | typedef enum |
| emilmont | 77:869cf507173a | 250 | { |
| emilmont | 77:869cf507173a | 251 | SD_TRANSFER_OK = 0, /*!< Transfer success */ |
| emilmont | 77:869cf507173a | 252 | SD_TRANSFER_BUSY = 1, /*!< Transfer is occurring */ |
| emilmont | 77:869cf507173a | 253 | SD_TRANSFER_ERROR = 2 /*!< Transfer failed */ |
| emilmont | 77:869cf507173a | 254 | |
| emilmont | 77:869cf507173a | 255 | }HAL_SD_TransferStateTypedef; |
| emilmont | 77:869cf507173a | 256 | |
| emilmont | 77:869cf507173a | 257 | /** |
| emilmont | 77:869cf507173a | 258 | * @brief SD Card State enumeration structure |
| emilmont | 77:869cf507173a | 259 | */ |
| emilmont | 77:869cf507173a | 260 | typedef enum |
| emilmont | 77:869cf507173a | 261 | { |
| emilmont | 77:869cf507173a | 262 | SD_CARD_READY = ((uint32_t)0x00000001), /*!< Card state is ready */ |
| emilmont | 77:869cf507173a | 263 | SD_CARD_IDENTIFICATION = ((uint32_t)0x00000002), /*!< Card is in identification state */ |
| emilmont | 77:869cf507173a | 264 | SD_CARD_STANDBY = ((uint32_t)0x00000003), /*!< Card is in standby state */ |
| emilmont | 77:869cf507173a | 265 | SD_CARD_TRANSFER = ((uint32_t)0x00000004), /*!< Card is in transfer state */ |
| emilmont | 77:869cf507173a | 266 | SD_CARD_SENDING = ((uint32_t)0x00000005), /*!< Card is sending an operation */ |
| emilmont | 77:869cf507173a | 267 | SD_CARD_RECEIVING = ((uint32_t)0x00000006), /*!< Card is receiving operation information */ |
| emilmont | 77:869cf507173a | 268 | SD_CARD_PROGRAMMING = ((uint32_t)0x00000007), /*!< Card is in programming state */ |
| emilmont | 77:869cf507173a | 269 | SD_CARD_DISCONNECTED = ((uint32_t)0x00000008), /*!< Card is disconnected */ |
| emilmont | 77:869cf507173a | 270 | SD_CARD_ERROR = ((uint32_t)0x000000FF) /*!< Card is in error state */ |
| emilmont | 77:869cf507173a | 271 | |
| emilmont | 77:869cf507173a | 272 | }HAL_SD_CardStateTypedef; |
| emilmont | 77:869cf507173a | 273 | |
| emilmont | 77:869cf507173a | 274 | /** |
| emilmont | 77:869cf507173a | 275 | * @brief SD Operation enumeration structure |
| emilmont | 77:869cf507173a | 276 | */ |
| emilmont | 77:869cf507173a | 277 | typedef enum |
| emilmont | 77:869cf507173a | 278 | { |
| emilmont | 77:869cf507173a | 279 | SD_READ_SINGLE_BLOCK = 0, /*!< Read single block operation */ |
| emilmont | 77:869cf507173a | 280 | SD_READ_MULTIPLE_BLOCK = 1, /*!< Read multiple blocks operation */ |
| emilmont | 77:869cf507173a | 281 | SD_WRITE_SINGLE_BLOCK = 2, /*!< Write single block operation */ |
| emilmont | 77:869cf507173a | 282 | SD_WRITE_MULTIPLE_BLOCK = 3 /*!< Write multiple blocks operation */ |
| emilmont | 77:869cf507173a | 283 | |
| emilmont | 77:869cf507173a | 284 | }HAL_SD_OperationTypedef; |
| emilmont | 77:869cf507173a | 285 | |
| emilmont | 77:869cf507173a | 286 | |
| emilmont | 77:869cf507173a | 287 | /* Exported constants --------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 288 | /** @defgroup SD_Exported_Constants |
| emilmont | 77:869cf507173a | 289 | * @{ |
| emilmont | 77:869cf507173a | 290 | */ |
| emilmont | 77:869cf507173a | 291 | |
| emilmont | 77:869cf507173a | 292 | /** |
| emilmont | 77:869cf507173a | 293 | * @brief SD Commands Index |
| emilmont | 77:869cf507173a | 294 | */ |
| emilmont | 77:869cf507173a | 295 | #define SD_CMD_GO_IDLE_STATE ((uint8_t)0) /*!< Resets the SD memory card. */ |
| emilmont | 77:869cf507173a | 296 | #define SD_CMD_SEND_OP_COND ((uint8_t)1) /*!< Sends host capacity support information and activates the card's initialization process. */ |
| emilmont | 77:869cf507173a | 297 | #define SD_CMD_ALL_SEND_CID ((uint8_t)2) /*!< Asks any card connected to the host to send the CID numbers on the CMD line. */ |
| emilmont | 77:869cf507173a | 298 | #define SD_CMD_SET_REL_ADDR ((uint8_t)3) /*!< Asks the card to publish a new relative address (RCA). */ |
| emilmont | 77:869cf507173a | 299 | #define SD_CMD_SET_DSR ((uint8_t)4) /*!< Programs the DSR of all cards. */ |
| emilmont | 77:869cf507173a | 300 | #define SD_CMD_SDIO_SEN_OP_COND ((uint8_t)5) /*!< Sends host capacity support information (HCS) and asks the accessed card to send its |
| emilmont | 77:869cf507173a | 301 | operating condition register (OCR) content in the response on the CMD line. */ |
| emilmont | 77:869cf507173a | 302 | #define SD_CMD_HS_SWITCH ((uint8_t)6) /*!< Checks switchable function (mode 0) and switch card function (mode 1). */ |
| emilmont | 77:869cf507173a | 303 | #define SD_CMD_SEL_DESEL_CARD ((uint8_t)7) /*!< Selects the card by its own relative address and gets deselected by any other address */ |
| emilmont | 77:869cf507173a | 304 | #define SD_CMD_HS_SEND_EXT_CSD ((uint8_t)8) /*!< Sends SD Memory Card interface condition, which includes host supply voltage information |
| emilmont | 77:869cf507173a | 305 | and asks the card whether card supports voltage. */ |
| emilmont | 77:869cf507173a | 306 | #define SD_CMD_SEND_CSD ((uint8_t)9) /*!< Addressed card sends its card specific data (CSD) on the CMD line. */ |
| emilmont | 77:869cf507173a | 307 | #define SD_CMD_SEND_CID ((uint8_t)10) /*!< Addressed card sends its card identification (CID) on the CMD line. */ |
| emilmont | 77:869cf507173a | 308 | #define SD_CMD_READ_DAT_UNTIL_STOP ((uint8_t)11) /*!< SD card doesn't support it. */ |
| emilmont | 77:869cf507173a | 309 | #define SD_CMD_STOP_TRANSMISSION ((uint8_t)12) /*!< Forces the card to stop transmission. */ |
| emilmont | 77:869cf507173a | 310 | #define SD_CMD_SEND_STATUS ((uint8_t)13) /*!< Addressed card sends its status register. */ |
| emilmont | 77:869cf507173a | 311 | #define SD_CMD_HS_BUSTEST_READ ((uint8_t)14) |
| emilmont | 77:869cf507173a | 312 | #define SD_CMD_GO_INACTIVE_STATE ((uint8_t)15) /*!< Sends an addressed card into the inactive state. */ |
| emilmont | 77:869cf507173a | 313 | #define SD_CMD_SET_BLOCKLEN ((uint8_t)16) /*!< Sets the block length (in bytes for SDSC) for all following block commands |
| emilmont | 77:869cf507173a | 314 | (read, write, lock). Default block length is fixed to 512 Bytes. Not effective |
| emilmont | 77:869cf507173a | 315 | for SDHS and SDXC. */ |
| emilmont | 77:869cf507173a | 316 | #define SD_CMD_READ_SINGLE_BLOCK ((uint8_t)17) /*!< Reads single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of |
| emilmont | 77:869cf507173a | 317 | fixed 512 bytes in case of SDHC and SDXC. */ |
| emilmont | 77:869cf507173a | 318 | #define SD_CMD_READ_MULT_BLOCK ((uint8_t)18) /*!< Continuously transfers data blocks from card to host until interrupted by |
| emilmont | 77:869cf507173a | 319 | STOP_TRANSMISSION command. */ |
| emilmont | 77:869cf507173a | 320 | #define SD_CMD_HS_BUSTEST_WRITE ((uint8_t)19) /*!< 64 bytes tuning pattern is sent for SDR50 and SDR104. */ |
| emilmont | 77:869cf507173a | 321 | #define SD_CMD_WRITE_DAT_UNTIL_STOP ((uint8_t)20) /*!< Speed class control command. */ |
| emilmont | 77:869cf507173a | 322 | #define SD_CMD_SET_BLOCK_COUNT ((uint8_t)23) /*!< Specify block count for CMD18 and CMD25. */ |
| emilmont | 77:869cf507173a | 323 | #define SD_CMD_WRITE_SINGLE_BLOCK ((uint8_t)24) /*!< Writes single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of |
| emilmont | 77:869cf507173a | 324 | fixed 512 bytes in case of SDHC and SDXC. */ |
| emilmont | 77:869cf507173a | 325 | #define SD_CMD_WRITE_MULT_BLOCK ((uint8_t)25) /*!< Continuously writes blocks of data until a STOP_TRANSMISSION follows. */ |
| emilmont | 77:869cf507173a | 326 | #define SD_CMD_PROG_CID ((uint8_t)26) /*!< Reserved for manufacturers. */ |
| emilmont | 77:869cf507173a | 327 | #define SD_CMD_PROG_CSD ((uint8_t)27) /*!< Programming of the programmable bits of the CSD. */ |
| emilmont | 77:869cf507173a | 328 | #define SD_CMD_SET_WRITE_PROT ((uint8_t)28) /*!< Sets the write protection bit of the addressed group. */ |
| emilmont | 77:869cf507173a | 329 | #define SD_CMD_CLR_WRITE_PROT ((uint8_t)29) /*!< Clears the write protection bit of the addressed group. */ |
| emilmont | 77:869cf507173a | 330 | #define SD_CMD_SEND_WRITE_PROT ((uint8_t)30) /*!< Asks the card to send the status of the write protection bits. */ |
| emilmont | 77:869cf507173a | 331 | #define SD_CMD_SD_ERASE_GRP_START ((uint8_t)32) /*!< Sets the address of the first write block to be erased. (For SD card only). */ |
| emilmont | 77:869cf507173a | 332 | #define SD_CMD_SD_ERASE_GRP_END ((uint8_t)33) /*!< Sets the address of the last write block of the continuous range to be erased. */ |
| emilmont | 77:869cf507173a | 333 | #define SD_CMD_ERASE_GRP_START ((uint8_t)35) /*!< Sets the address of the first write block to be erased. Reserved for each command |
| emilmont | 77:869cf507173a | 334 | system set by switch function command (CMD6). */ |
| emilmont | 77:869cf507173a | 335 | #define SD_CMD_ERASE_GRP_END ((uint8_t)36) /*!< Sets the address of the last write block of the continuous range to be erased. |
| emilmont | 77:869cf507173a | 336 | Reserved for each command system set by switch function command (CMD6). */ |
| emilmont | 77:869cf507173a | 337 | #define SD_CMD_ERASE ((uint8_t)38) /*!< Reserved for SD security applications. */ |
| emilmont | 77:869cf507173a | 338 | #define SD_CMD_FAST_IO ((uint8_t)39) /*!< SD card doesn't support it (Reserved). */ |
| emilmont | 77:869cf507173a | 339 | #define SD_CMD_GO_IRQ_STATE ((uint8_t)40) /*!< SD card doesn't support it (Reserved). */ |
| emilmont | 77:869cf507173a | 340 | #define SD_CMD_LOCK_UNLOCK ((uint8_t)42) /*!< Sets/resets the password or lock/unlock the card. The size of the data block is set by |
| emilmont | 77:869cf507173a | 341 | the SET_BLOCK_LEN command. */ |
| emilmont | 77:869cf507173a | 342 | #define SD_CMD_APP_CMD ((uint8_t)55) /*!< Indicates to the card that the next command is an application specific command rather |
| emilmont | 77:869cf507173a | 343 | than a standard command. */ |
| emilmont | 77:869cf507173a | 344 | #define SD_CMD_GEN_CMD ((uint8_t)56) /*!< Used either to transfer a data block to the card or to get a data block from the card |
| emilmont | 77:869cf507173a | 345 | for general purpose/application specific commands. */ |
| emilmont | 77:869cf507173a | 346 | #define SD_CMD_NO_CMD ((uint8_t)64) |
| emilmont | 77:869cf507173a | 347 | |
| emilmont | 77:869cf507173a | 348 | /** |
| emilmont | 77:869cf507173a | 349 | * @brief Following commands are SD Card Specific commands. |
| emilmont | 77:869cf507173a | 350 | * SDIO_APP_CMD should be sent before sending these commands. |
| emilmont | 77:869cf507173a | 351 | */ |
| emilmont | 77:869cf507173a | 352 | #define SD_CMD_APP_SD_SET_BUSWIDTH ((uint8_t)6) /*!< (ACMD6) Defines the data bus width to be used for data transfer. The allowed data bus |
| emilmont | 77:869cf507173a | 353 | widths are given in SCR register. */ |
| emilmont | 77:869cf507173a | 354 | #define SD_CMD_SD_APP_STAUS ((uint8_t)13) /*!< (ACMD13) Sends the SD status. */ |
| emilmont | 77:869cf507173a | 355 | #define SD_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS ((uint8_t)22) /*!< (ACMD22) Sends the number of the written (without errors) write blocks. Responds with |
| emilmont | 77:869cf507173a | 356 | 32bit+CRC data block. */ |
| emilmont | 77:869cf507173a | 357 | #define SD_CMD_SD_APP_OP_COND ((uint8_t)41) /*!< (ACMD41) Sends host capacity support information (HCS) and asks the accessed card to |
| emilmont | 77:869cf507173a | 358 | send its operating condition register (OCR) content in the response on the CMD line. */ |
| emilmont | 77:869cf507173a | 359 | #define SD_CMD_SD_APP_SET_CLR_CARD_DETECT ((uint8_t)42) /*!< (ACMD42) Connects/Disconnects the 50 KOhm pull-up resistor on CD/DAT3 (pin 1) of the card. */ |
| emilmont | 77:869cf507173a | 360 | #define SD_CMD_SD_APP_SEND_SCR ((uint8_t)51) /*!< Reads the SD Configuration Register (SCR). */ |
| emilmont | 77:869cf507173a | 361 | #define SD_CMD_SDIO_RW_DIRECT ((uint8_t)52) /*!< For SD I/O card only, reserved for security specification. */ |
| emilmont | 77:869cf507173a | 362 | #define SD_CMD_SDIO_RW_EXTENDED ((uint8_t)53) /*!< For SD I/O card only, reserved for security specification. */ |
| emilmont | 77:869cf507173a | 363 | |
| emilmont | 77:869cf507173a | 364 | /** |
| emilmont | 77:869cf507173a | 365 | * @brief Following commands are SD Card Specific security commands. |
| emilmont | 77:869cf507173a | 366 | * SD_CMD_APP_CMD should be sent before sending these commands. |
| emilmont | 77:869cf507173a | 367 | */ |
| emilmont | 77:869cf507173a | 368 | #define SD_CMD_SD_APP_GET_MKB ((uint8_t)43) /*!< For SD card only */ |
| emilmont | 77:869cf507173a | 369 | #define SD_CMD_SD_APP_GET_MID ((uint8_t)44) /*!< For SD card only */ |
| emilmont | 77:869cf507173a | 370 | #define SD_CMD_SD_APP_SET_CER_RN1 ((uint8_t)45) /*!< For SD card only */ |
| emilmont | 77:869cf507173a | 371 | #define SD_CMD_SD_APP_GET_CER_RN2 ((uint8_t)46) /*!< For SD card only */ |
| emilmont | 77:869cf507173a | 372 | #define SD_CMD_SD_APP_SET_CER_RES2 ((uint8_t)47) /*!< For SD card only */ |
| emilmont | 77:869cf507173a | 373 | #define SD_CMD_SD_APP_GET_CER_RES1 ((uint8_t)48) /*!< For SD card only */ |
| emilmont | 77:869cf507173a | 374 | #define SD_CMD_SD_APP_SECURE_READ_MULTIPLE_BLOCK ((uint8_t)18) /*!< For SD card only */ |
| emilmont | 77:869cf507173a | 375 | #define SD_CMD_SD_APP_SECURE_WRITE_MULTIPLE_BLOCK ((uint8_t)25) /*!< For SD card only */ |
| emilmont | 77:869cf507173a | 376 | #define SD_CMD_SD_APP_SECURE_ERASE ((uint8_t)38) /*!< For SD card only */ |
| emilmont | 77:869cf507173a | 377 | #define SD_CMD_SD_APP_CHANGE_SECURE_AREA ((uint8_t)49) /*!< For SD card only */ |
| emilmont | 77:869cf507173a | 378 | #define SD_CMD_SD_APP_SECURE_WRITE_MKB ((uint8_t)48) /*!< For SD card only */ |
| emilmont | 77:869cf507173a | 379 | |
| emilmont | 77:869cf507173a | 380 | /** |
| emilmont | 77:869cf507173a | 381 | * @brief Supported SD Memory Cards |
| emilmont | 77:869cf507173a | 382 | */ |
| emilmont | 77:869cf507173a | 383 | #define STD_CAPACITY_SD_CARD_V1_1 ((uint32_t)0x00000000) |
| emilmont | 77:869cf507173a | 384 | #define STD_CAPACITY_SD_CARD_V2_0 ((uint32_t)0x00000001) |
| emilmont | 77:869cf507173a | 385 | #define HIGH_CAPACITY_SD_CARD ((uint32_t)0x00000002) |
| emilmont | 77:869cf507173a | 386 | #define MULTIMEDIA_CARD ((uint32_t)0x00000003) |
| emilmont | 77:869cf507173a | 387 | #define SECURE_DIGITAL_IO_CARD ((uint32_t)0x00000004) |
| emilmont | 77:869cf507173a | 388 | #define HIGH_SPEED_MULTIMEDIA_CARD ((uint32_t)0x00000005) |
| emilmont | 77:869cf507173a | 389 | #define SECURE_DIGITAL_IO_COMBO_CARD ((uint32_t)0x00000006) |
| emilmont | 77:869cf507173a | 390 | #define HIGH_CAPACITY_MMC_CARD ((uint32_t)0x00000007) |
| emilmont | 77:869cf507173a | 391 | /** |
| emilmont | 77:869cf507173a | 392 | * @} |
| emilmont | 77:869cf507173a | 393 | */ |
| emilmont | 77:869cf507173a | 394 | |
| emilmont | 77:869cf507173a | 395 | /* Exported macro ------------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 396 | |
| emilmont | 77:869cf507173a | 397 | /** @defgroup SD_Interrupt_Clock |
| emilmont | 77:869cf507173a | 398 | * @brief macros to handle interrupts and specific clock configurations |
| emilmont | 77:869cf507173a | 399 | * @{ |
| emilmont | 77:869cf507173a | 400 | */ |
| emilmont | 77:869cf507173a | 401 | |
| emilmont | 77:869cf507173a | 402 | /** |
| emilmont | 77:869cf507173a | 403 | * @brief Enable the SD device. |
| emilmont | 77:869cf507173a | 404 | * @retval None |
| emilmont | 77:869cf507173a | 405 | */ |
| emilmont | 77:869cf507173a | 406 | #define __HAL_SD_SDIO_ENABLE() __SDIO_ENABLE() |
| emilmont | 77:869cf507173a | 407 | |
| emilmont | 77:869cf507173a | 408 | /** |
| emilmont | 77:869cf507173a | 409 | * @brief Disable the SD device. |
| emilmont | 77:869cf507173a | 410 | * @retval None |
| emilmont | 77:869cf507173a | 411 | */ |
| emilmont | 77:869cf507173a | 412 | #define __HAL_SD_SDIO_DISABLE() __SDIO_DISABLE() |
| emilmont | 77:869cf507173a | 413 | |
| emilmont | 77:869cf507173a | 414 | /** |
| emilmont | 77:869cf507173a | 415 | * @brief Enable the SDIO DMA transfer. |
| emilmont | 77:869cf507173a | 416 | * @retval None |
| emilmont | 77:869cf507173a | 417 | */ |
| emilmont | 77:869cf507173a | 418 | #define __HAL_SD_SDIO_DMA_ENABLE() __SDIO_DMA_ENABLE() |
| emilmont | 77:869cf507173a | 419 | |
| emilmont | 77:869cf507173a | 420 | /** |
| emilmont | 77:869cf507173a | 421 | * @brief Disable the SDIO DMA transfer. |
| emilmont | 77:869cf507173a | 422 | * @retval None |
| emilmont | 77:869cf507173a | 423 | */ |
| emilmont | 77:869cf507173a | 424 | #define __HAL_SD_SDIO_DMA_DISABLE() __SDIO_DMA_DISABLE() |
| emilmont | 77:869cf507173a | 425 | |
| emilmont | 77:869cf507173a | 426 | /** |
| emilmont | 77:869cf507173a | 427 | * @brief Enable the SD device interrupt. |
| emilmont | 77:869cf507173a | 428 | * @param __HANDLE__: SD Handle |
| emilmont | 77:869cf507173a | 429 | * @param __INTERRUPT__: specifies the SDIO interrupt sources to be enabled. |
| emilmont | 77:869cf507173a | 430 | * This parameter can be one or a combination of the following values: |
| emilmont | 77:869cf507173a | 431 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
| emilmont | 77:869cf507173a | 432 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
| emilmont | 77:869cf507173a | 433 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
| emilmont | 77:869cf507173a | 434 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
| emilmont | 77:869cf507173a | 435 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
| emilmont | 77:869cf507173a | 436 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
| emilmont | 77:869cf507173a | 437 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
| emilmont | 77:869cf507173a | 438 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
| emilmont | 77:869cf507173a | 439 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
| emilmont | 77:869cf507173a | 440 | * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide |
| emilmont | 77:869cf507173a | 441 | * bus mode interrupt |
| emilmont | 77:869cf507173a | 442 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
| emilmont | 77:869cf507173a | 443 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
| emilmont | 77:869cf507173a | 444 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
| emilmont | 77:869cf507173a | 445 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
| emilmont | 77:869cf507173a | 446 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
| emilmont | 77:869cf507173a | 447 | * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
| emilmont | 77:869cf507173a | 448 | * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
| emilmont | 77:869cf507173a | 449 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
| emilmont | 77:869cf507173a | 450 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
| emilmont | 77:869cf507173a | 451 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
| emilmont | 77:869cf507173a | 452 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
| emilmont | 77:869cf507173a | 453 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
| emilmont | 77:869cf507173a | 454 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
| emilmont | 77:869cf507173a | 455 | * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt |
| emilmont | 77:869cf507173a | 456 | * @retval None |
| emilmont | 77:869cf507173a | 457 | */ |
| emilmont | 77:869cf507173a | 458 | #define __HAL_SD_SDIO_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
| emilmont | 77:869cf507173a | 459 | |
| emilmont | 77:869cf507173a | 460 | /** |
| emilmont | 77:869cf507173a | 461 | * @brief Disable the SD device interrupt. |
| emilmont | 77:869cf507173a | 462 | * @param __HANDLE__: SD Handle |
| emilmont | 77:869cf507173a | 463 | * @param __INTERRUPT__: specifies the SDIO interrupt sources to be disabled. |
| emilmont | 77:869cf507173a | 464 | * This parameter can be one or a combination of the following values: |
| emilmont | 77:869cf507173a | 465 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
| emilmont | 77:869cf507173a | 466 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
| emilmont | 77:869cf507173a | 467 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
| emilmont | 77:869cf507173a | 468 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
| emilmont | 77:869cf507173a | 469 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
| emilmont | 77:869cf507173a | 470 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
| emilmont | 77:869cf507173a | 471 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
| emilmont | 77:869cf507173a | 472 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
| emilmont | 77:869cf507173a | 473 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
| emilmont | 77:869cf507173a | 474 | * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide |
| emilmont | 77:869cf507173a | 475 | * bus mode interrupt |
| emilmont | 77:869cf507173a | 476 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
| emilmont | 77:869cf507173a | 477 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
| emilmont | 77:869cf507173a | 478 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
| emilmont | 77:869cf507173a | 479 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
| emilmont | 77:869cf507173a | 480 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
| emilmont | 77:869cf507173a | 481 | * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
| emilmont | 77:869cf507173a | 482 | * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
| emilmont | 77:869cf507173a | 483 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
| emilmont | 77:869cf507173a | 484 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
| emilmont | 77:869cf507173a | 485 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
| emilmont | 77:869cf507173a | 486 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
| emilmont | 77:869cf507173a | 487 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
| emilmont | 77:869cf507173a | 488 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
| emilmont | 77:869cf507173a | 489 | * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt |
| emilmont | 77:869cf507173a | 490 | * @retval None |
| emilmont | 77:869cf507173a | 491 | */ |
| emilmont | 77:869cf507173a | 492 | #define __HAL_SD_SDIO_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
| emilmont | 77:869cf507173a | 493 | |
| emilmont | 77:869cf507173a | 494 | /** |
| emilmont | 77:869cf507173a | 495 | * @brief Check whether the specified SD flag is set or not. |
| emilmont | 77:869cf507173a | 496 | * @param __HANDLE__: SD Handle |
| emilmont | 77:869cf507173a | 497 | * @param __FLAG__: specifies the flag to check. |
| emilmont | 77:869cf507173a | 498 | * This parameter can be one of the following values: |
| emilmont | 77:869cf507173a | 499 | * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) |
| emilmont | 77:869cf507173a | 500 | * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) |
| emilmont | 77:869cf507173a | 501 | * @arg SDIO_FLAG_CTIMEOUT: Command response timeout |
| emilmont | 77:869cf507173a | 502 | * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
| emilmont | 77:869cf507173a | 503 | * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
| emilmont | 77:869cf507173a | 504 | * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
| emilmont | 77:869cf507173a | 505 | * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
| emilmont | 77:869cf507173a | 506 | * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
| emilmont | 77:869cf507173a | 507 | * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) |
| emilmont | 77:869cf507173a | 508 | * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode. |
| emilmont | 77:869cf507173a | 509 | * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
| emilmont | 77:869cf507173a | 510 | * @arg SDIO_FLAG_CMDACT: Command transfer in progress |
| emilmont | 77:869cf507173a | 511 | * @arg SDIO_FLAG_TXACT: Data transmit in progress |
| emilmont | 77:869cf507173a | 512 | * @arg SDIO_FLAG_RXACT: Data receive in progress |
| emilmont | 77:869cf507173a | 513 | * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty |
| emilmont | 77:869cf507173a | 514 | * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full |
| emilmont | 77:869cf507173a | 515 | * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full |
| emilmont | 77:869cf507173a | 516 | * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full |
| emilmont | 77:869cf507173a | 517 | * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty |
| emilmont | 77:869cf507173a | 518 | * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty |
| emilmont | 77:869cf507173a | 519 | * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO |
| emilmont | 77:869cf507173a | 520 | * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO |
| emilmont | 77:869cf507173a | 521 | * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received |
| emilmont | 77:869cf507173a | 522 | * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61 |
| emilmont | 77:869cf507173a | 523 | * @retval The new state of SD FLAG (SET or RESET). |
| emilmont | 77:869cf507173a | 524 | */ |
| emilmont | 77:869cf507173a | 525 | #define __HAL_SD_SDIO_GET_FLAG(__HANDLE__, __FLAG__) __SDIO_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) |
| emilmont | 77:869cf507173a | 526 | |
| emilmont | 77:869cf507173a | 527 | /** |
| emilmont | 77:869cf507173a | 528 | * @brief Clear the SD's pending flags. |
| emilmont | 77:869cf507173a | 529 | * @param __HANDLE__: SD Handle |
| emilmont | 77:869cf507173a | 530 | * @param __FLAG__: specifies the flag to clear. |
| emilmont | 77:869cf507173a | 531 | * This parameter can be one or a combination of the following values: |
| emilmont | 77:869cf507173a | 532 | * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed) |
| emilmont | 77:869cf507173a | 533 | * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) |
| emilmont | 77:869cf507173a | 534 | * @arg SDIO_FLAG_CTIMEOUT: Command response timeout |
| emilmont | 77:869cf507173a | 535 | * @arg SDIO_FLAG_DTIMEOUT: Data timeout |
| emilmont | 77:869cf507173a | 536 | * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error |
| emilmont | 77:869cf507173a | 537 | * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error |
| emilmont | 77:869cf507173a | 538 | * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed) |
| emilmont | 77:869cf507173a | 539 | * @arg SDIO_FLAG_CMDSENT: Command sent (no response required) |
| emilmont | 77:869cf507173a | 540 | * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) |
| emilmont | 77:869cf507173a | 541 | * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode |
| emilmont | 77:869cf507173a | 542 | * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
| emilmont | 77:869cf507173a | 543 | * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received |
| emilmont | 77:869cf507173a | 544 | * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61 |
| emilmont | 77:869cf507173a | 545 | * @retval None |
| emilmont | 77:869cf507173a | 546 | */ |
| emilmont | 77:869cf507173a | 547 | #define __HAL_SD_SDIO_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) |
| emilmont | 77:869cf507173a | 548 | |
| emilmont | 77:869cf507173a | 549 | /** |
| emilmont | 77:869cf507173a | 550 | * @brief Check whether the specified SD interrupt has occurred or not. |
| emilmont | 77:869cf507173a | 551 | * @param __HANDLE__: SD Handle |
| emilmont | 77:869cf507173a | 552 | * @param __INTERRUPT__: specifies the SDIO interrupt source to check. |
| emilmont | 77:869cf507173a | 553 | * This parameter can be one of the following values: |
| emilmont | 77:869cf507173a | 554 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
| emilmont | 77:869cf507173a | 555 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
| emilmont | 77:869cf507173a | 556 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
| emilmont | 77:869cf507173a | 557 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
| emilmont | 77:869cf507173a | 558 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
| emilmont | 77:869cf507173a | 559 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
| emilmont | 77:869cf507173a | 560 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
| emilmont | 77:869cf507173a | 561 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
| emilmont | 77:869cf507173a | 562 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt |
| emilmont | 77:869cf507173a | 563 | * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide |
| emilmont | 77:869cf507173a | 564 | * bus mode interrupt |
| emilmont | 77:869cf507173a | 565 | * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
| emilmont | 77:869cf507173a | 566 | * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt |
| emilmont | 77:869cf507173a | 567 | * @arg SDIO_IT_TXACT: Data transmit in progress interrupt |
| emilmont | 77:869cf507173a | 568 | * @arg SDIO_IT_RXACT: Data receive in progress interrupt |
| emilmont | 77:869cf507173a | 569 | * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
| emilmont | 77:869cf507173a | 570 | * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
| emilmont | 77:869cf507173a | 571 | * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt |
| emilmont | 77:869cf507173a | 572 | * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt |
| emilmont | 77:869cf507173a | 573 | * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt |
| emilmont | 77:869cf507173a | 574 | * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt |
| emilmont | 77:869cf507173a | 575 | * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt |
| emilmont | 77:869cf507173a | 576 | * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt |
| emilmont | 77:869cf507173a | 577 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
| emilmont | 77:869cf507173a | 578 | * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt |
| emilmont | 77:869cf507173a | 579 | * @retval The new state of SD IT (SET or RESET). |
| emilmont | 77:869cf507173a | 580 | */ |
| emilmont | 77:869cf507173a | 581 | #define __HAL_SD_SDIO_GET_IT (__HANDLE__, __INTERRUPT__) __SDIO_GET_IT ((__HANDLE__)->Instance, __INTERRUPT__) |
| emilmont | 77:869cf507173a | 582 | |
| emilmont | 77:869cf507173a | 583 | /** |
| emilmont | 77:869cf507173a | 584 | * @brief Clear the SD's interrupt pending bits. |
| emilmont | 77:869cf507173a | 585 | * @param __HANDLE__ : SD Handle |
| emilmont | 77:869cf507173a | 586 | * @param __INTERRUPT__: specifies the interrupt pending bit to clear. |
| emilmont | 77:869cf507173a | 587 | * This parameter can be one or a combination of the following values: |
| emilmont | 77:869cf507173a | 588 | * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
| emilmont | 77:869cf507173a | 589 | * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
| emilmont | 77:869cf507173a | 590 | * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt |
| emilmont | 77:869cf507173a | 591 | * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt |
| emilmont | 77:869cf507173a | 592 | * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
| emilmont | 77:869cf507173a | 593 | * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt |
| emilmont | 77:869cf507173a | 594 | * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt |
| emilmont | 77:869cf507173a | 595 | * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt |
| emilmont | 77:869cf507173a | 596 | * @arg SDIO_IT_DATAEND: Data end (data counter, SDIO_DCOUNT, is zero) interrupt |
| emilmont | 77:869cf507173a | 597 | * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide |
| emilmont | 77:869cf507173a | 598 | * bus mode interrupt |
| emilmont | 77:869cf507173a | 599 | * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt |
| emilmont | 77:869cf507173a | 600 | * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 |
| emilmont | 77:869cf507173a | 601 | * @retval None |
| emilmont | 77:869cf507173a | 602 | */ |
| emilmont | 77:869cf507173a | 603 | #define __HAL_SD_SDIO_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
| emilmont | 77:869cf507173a | 604 | /** |
| emilmont | 77:869cf507173a | 605 | * @} |
| emilmont | 77:869cf507173a | 606 | */ |
| emilmont | 77:869cf507173a | 607 | |
| emilmont | 77:869cf507173a | 608 | /* Exported functions --------------------------------------------------------*/ |
| emilmont | 77:869cf507173a | 609 | |
| emilmont | 77:869cf507173a | 610 | /* Initialization/de-initialization functions **********************************/ |
| emilmont | 77:869cf507173a | 611 | HAL_SD_ErrorTypedef HAL_SD_Init(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *SDCardInfo); |
| emilmont | 77:869cf507173a | 612 | HAL_StatusTypeDef HAL_SD_DeInit (SD_HandleTypeDef *hsd); |
| bogdanm | 81:7d30d6019079 | 613 | void HAL_SD_MspInit(SD_HandleTypeDef *hsd); |
| bogdanm | 81:7d30d6019079 | 614 | void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd); |
| emilmont | 77:869cf507173a | 615 | |
| emilmont | 77:869cf507173a | 616 | /* I/O operation functions *****************************************************/ |
| emilmont | 77:869cf507173a | 617 | /* Blocking mode: Polling */ |
| emilmont | 77:869cf507173a | 618 | HAL_SD_ErrorTypedef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks); |
| emilmont | 77:869cf507173a | 619 | HAL_SD_ErrorTypedef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks); |
| emilmont | 77:869cf507173a | 620 | HAL_SD_ErrorTypedef HAL_SD_Erase(SD_HandleTypeDef *hsd, uint64_t startaddr, uint64_t endaddr); |
| emilmont | 77:869cf507173a | 621 | |
| emilmont | 77:869cf507173a | 622 | /* Non-Blocking mode: Interrupt */ |
| emilmont | 77:869cf507173a | 623 | void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd); |
| emilmont | 77:869cf507173a | 624 | |
| emilmont | 77:869cf507173a | 625 | /* Callback in non blocking modes (DMA) */ |
| bogdanm | 81:7d30d6019079 | 626 | void HAL_SD_DMA_RxCpltCallback(DMA_HandleTypeDef *hdma); |
| bogdanm | 81:7d30d6019079 | 627 | void HAL_SD_DMA_RxErrorCallback(DMA_HandleTypeDef *hdma); |
| bogdanm | 81:7d30d6019079 | 628 | void HAL_SD_DMA_TxCpltCallback(DMA_HandleTypeDef *hdma); |
| bogdanm | 81:7d30d6019079 | 629 | void HAL_SD_DMA_TxErrorCallback(DMA_HandleTypeDef *hdma); |
| bogdanm | 81:7d30d6019079 | 630 | void HAL_SD_XferCpltCallback(SD_HandleTypeDef *hsd); |
| bogdanm | 81:7d30d6019079 | 631 | void HAL_SD_XferErrorCallback(SD_HandleTypeDef *hsd); |
| emilmont | 77:869cf507173a | 632 | |
| emilmont | 77:869cf507173a | 633 | /* Non-Blocking mode: DMA */ |
| emilmont | 77:869cf507173a | 634 | HAL_SD_ErrorTypedef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks); |
| emilmont | 77:869cf507173a | 635 | HAL_SD_ErrorTypedef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks); |
| emilmont | 77:869cf507173a | 636 | HAL_SD_ErrorTypedef HAL_SD_CheckWriteOperation(SD_HandleTypeDef *hsd, uint32_t Timeout); |
| emilmont | 77:869cf507173a | 637 | HAL_SD_ErrorTypedef HAL_SD_CheckReadOperation(SD_HandleTypeDef *hsd, uint32_t Timeout); |
| emilmont | 77:869cf507173a | 638 | |
| emilmont | 77:869cf507173a | 639 | /* Peripheral Control functions ************************************************/ |
| emilmont | 77:869cf507173a | 640 | HAL_SD_ErrorTypedef HAL_SD_Get_CardInfo(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *pCardInfo); |
| emilmont | 77:869cf507173a | 641 | HAL_SD_ErrorTypedef HAL_SD_WideBusOperation_Config(SD_HandleTypeDef *hsd, uint32_t WideMode); |
| emilmont | 77:869cf507173a | 642 | HAL_SD_ErrorTypedef HAL_SD_StopTransfer(SD_HandleTypeDef *hsd); |
| emilmont | 77:869cf507173a | 643 | HAL_SD_ErrorTypedef HAL_SD_HighSpeed (SD_HandleTypeDef *hsd); |
| emilmont | 77:869cf507173a | 644 | |
| emilmont | 77:869cf507173a | 645 | /* Peripheral State functions **************************************************/ |
| emilmont | 77:869cf507173a | 646 | HAL_SD_ErrorTypedef HAL_SD_SendSDStatus(SD_HandleTypeDef *hsd, uint32_t *pSDstatus); |
| emilmont | 77:869cf507173a | 647 | HAL_SD_ErrorTypedef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypedef *pCardStatus); |
| emilmont | 77:869cf507173a | 648 | HAL_SD_TransferStateTypedef HAL_SD_GetStatus(SD_HandleTypeDef *hsd); |
| emilmont | 77:869cf507173a | 649 | |
| emilmont | 77:869cf507173a | 650 | /** |
| emilmont | 77:869cf507173a | 651 | * @} |
| emilmont | 77:869cf507173a | 652 | */ |
| emilmont | 77:869cf507173a | 653 | |
| emilmont | 77:869cf507173a | 654 | /** |
| emilmont | 77:869cf507173a | 655 | * @} |
| emilmont | 77:869cf507173a | 656 | */ |
| emilmont | 77:869cf507173a | 657 | |
| emilmont | 77:869cf507173a | 658 | #ifdef __cplusplus |
| emilmont | 77:869cf507173a | 659 | } |
| emilmont | 77:869cf507173a | 660 | #endif |
| emilmont | 77:869cf507173a | 661 | |
| emilmont | 77:869cf507173a | 662 | |
| emilmont | 77:869cf507173a | 663 | #endif /* __STM32F4xx_HAL_SD_H */ |
| emilmont | 77:869cf507173a | 664 | |
| emilmont | 77:869cf507173a | 665 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |