meh
Fork of mbed by
TARGET_RZ_A1H/mmc_iodefine.h@92:4fc01daae5a5, 2014-11-27 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Nov 27 13:33:22 2014 +0000
- Revision:
- 92:4fc01daae5a5
Release 92 of the mbed libray
Main changes:
- nRF51822: fixed pin assignment issues
- ST targets moving to the STM32Cube driver
- LPC1439: fixed serial interrupt issue
- first Cortex-A platform supported in mbed (RZ_A1H)
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 92:4fc01daae5a5 | 1 | /******************************************************************************* |
bogdanm | 92:4fc01daae5a5 | 2 | * DISCLAIMER |
bogdanm | 92:4fc01daae5a5 | 3 | * This software is supplied by Renesas Electronics Corporation and is only |
bogdanm | 92:4fc01daae5a5 | 4 | * intended for use with Renesas products. No other uses are authorized. This |
bogdanm | 92:4fc01daae5a5 | 5 | * software is owned by Renesas Electronics Corporation and is protected under |
bogdanm | 92:4fc01daae5a5 | 6 | * all applicable laws, including copyright laws. |
bogdanm | 92:4fc01daae5a5 | 7 | * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING |
bogdanm | 92:4fc01daae5a5 | 8 | * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT |
bogdanm | 92:4fc01daae5a5 | 9 | * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE |
bogdanm | 92:4fc01daae5a5 | 10 | * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. |
bogdanm | 92:4fc01daae5a5 | 11 | * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS |
bogdanm | 92:4fc01daae5a5 | 12 | * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE |
bogdanm | 92:4fc01daae5a5 | 13 | * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR |
bogdanm | 92:4fc01daae5a5 | 14 | * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE |
bogdanm | 92:4fc01daae5a5 | 15 | * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
bogdanm | 92:4fc01daae5a5 | 16 | * Renesas reserves the right, without notice, to make changes to this software |
bogdanm | 92:4fc01daae5a5 | 17 | * and to discontinue the availability of this software. By using this software, |
bogdanm | 92:4fc01daae5a5 | 18 | * you agree to the additional terms and conditions found by accessing the |
bogdanm | 92:4fc01daae5a5 | 19 | * following link: |
bogdanm | 92:4fc01daae5a5 | 20 | * http://www.renesas.com/disclaimer* |
bogdanm | 92:4fc01daae5a5 | 21 | * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved. |
bogdanm | 92:4fc01daae5a5 | 22 | *******************************************************************************/ |
bogdanm | 92:4fc01daae5a5 | 23 | /******************************************************************************* |
bogdanm | 92:4fc01daae5a5 | 24 | * File Name : mmc_iodefine.h |
bogdanm | 92:4fc01daae5a5 | 25 | * $Rev: $ |
bogdanm | 92:4fc01daae5a5 | 26 | * $Date:: $ |
bogdanm | 92:4fc01daae5a5 | 27 | * Description : Definition of I/O Register (V1.00a) |
bogdanm | 92:4fc01daae5a5 | 28 | ******************************************************************************/ |
bogdanm | 92:4fc01daae5a5 | 29 | #ifndef MMC_IODEFINE_H |
bogdanm | 92:4fc01daae5a5 | 30 | #define MMC_IODEFINE_H |
bogdanm | 92:4fc01daae5a5 | 31 | /* ->SEC M1.10.1 : Not magic number */ |
bogdanm | 92:4fc01daae5a5 | 32 | |
bogdanm | 92:4fc01daae5a5 | 33 | struct st_mmc |
bogdanm | 92:4fc01daae5a5 | 34 | { /* MMC */ |
bogdanm | 92:4fc01daae5a5 | 35 | volatile uint16_t CE_CMD_SETH; /* CE_CMD_SETH */ |
bogdanm | 92:4fc01daae5a5 | 36 | volatile uint16_t CE_CMD_SETL; /* CE_CMD_SETL */ |
bogdanm | 92:4fc01daae5a5 | 37 | volatile uint8_t dummy182[4]; /* */ |
bogdanm | 92:4fc01daae5a5 | 38 | volatile uint32_t CE_ARG; /* CE_ARG */ |
bogdanm | 92:4fc01daae5a5 | 39 | volatile uint32_t CE_ARG_CMD12; /* CE_ARG_CMD12 */ |
bogdanm | 92:4fc01daae5a5 | 40 | volatile uint32_t CE_CMD_CTRL; /* CE_CMD_CTRL */ |
bogdanm | 92:4fc01daae5a5 | 41 | volatile uint32_t CE_BLOCK_SET; /* CE_BLOCK_SET */ |
bogdanm | 92:4fc01daae5a5 | 42 | volatile uint32_t CE_CLK_CTRL; /* CE_CLK_CTRL */ |
bogdanm | 92:4fc01daae5a5 | 43 | volatile uint32_t CE_BUF_ACC; /* CE_BUF_ACC */ |
bogdanm | 92:4fc01daae5a5 | 44 | #define MMC_CE_RESPn_COUNT 4 |
bogdanm | 92:4fc01daae5a5 | 45 | volatile uint32_t CE_RESP3; /* CE_RESP3 */ |
bogdanm | 92:4fc01daae5a5 | 46 | volatile uint32_t CE_RESP2; /* CE_RESP2 */ |
bogdanm | 92:4fc01daae5a5 | 47 | volatile uint32_t CE_RESP1; /* CE_RESP1 */ |
bogdanm | 92:4fc01daae5a5 | 48 | volatile uint32_t CE_RESP0; /* CE_RESP0 */ |
bogdanm | 92:4fc01daae5a5 | 49 | volatile uint32_t CE_RESP_CMD12; /* CE_RESP_CMD12 */ |
bogdanm | 92:4fc01daae5a5 | 50 | volatile uint32_t CE_DATA; /* CE_DATA */ |
bogdanm | 92:4fc01daae5a5 | 51 | volatile uint8_t dummy183[8]; /* */ |
bogdanm | 92:4fc01daae5a5 | 52 | volatile uint32_t CE_INT; /* CE_INT */ |
bogdanm | 92:4fc01daae5a5 | 53 | volatile uint32_t CE_INT_EN; /* CE_INT_EN */ |
bogdanm | 92:4fc01daae5a5 | 54 | volatile uint32_t CE_HOST_STS1; /* CE_HOST_STS1 */ |
bogdanm | 92:4fc01daae5a5 | 55 | volatile uint32_t CE_HOST_STS2; /* CE_HOST_STS2 */ |
bogdanm | 92:4fc01daae5a5 | 56 | volatile uint8_t dummy184[12]; /* */ |
bogdanm | 92:4fc01daae5a5 | 57 | volatile uint32_t CE_DMA_MODE; /* CE_DMA_MODE */ |
bogdanm | 92:4fc01daae5a5 | 58 | volatile uint8_t dummy185[16]; /* */ |
bogdanm | 92:4fc01daae5a5 | 59 | volatile uint32_t CE_DETECT; /* CE_DETECT */ |
bogdanm | 92:4fc01daae5a5 | 60 | volatile uint32_t CE_ADD_MODE; /* CE_ADD_MODE */ |
bogdanm | 92:4fc01daae5a5 | 61 | volatile uint8_t dummy186[4]; /* */ |
bogdanm | 92:4fc01daae5a5 | 62 | volatile uint32_t CE_VERSION; /* CE_VERSION */ |
bogdanm | 92:4fc01daae5a5 | 63 | }; |
bogdanm | 92:4fc01daae5a5 | 64 | |
bogdanm | 92:4fc01daae5a5 | 65 | |
bogdanm | 92:4fc01daae5a5 | 66 | #define MMC (*(struct st_mmc *)0xE804C800uL) /* MMC */ |
bogdanm | 92:4fc01daae5a5 | 67 | |
bogdanm | 92:4fc01daae5a5 | 68 | |
bogdanm | 92:4fc01daae5a5 | 69 | #define MMCCE_CMD_SETH MMC.CE_CMD_SETH |
bogdanm | 92:4fc01daae5a5 | 70 | #define MMCCE_CMD_SETL MMC.CE_CMD_SETL |
bogdanm | 92:4fc01daae5a5 | 71 | #define MMCCE_ARG MMC.CE_ARG |
bogdanm | 92:4fc01daae5a5 | 72 | #define MMCCE_ARG_CMD12 MMC.CE_ARG_CMD12 |
bogdanm | 92:4fc01daae5a5 | 73 | #define MMCCE_CMD_CTRL MMC.CE_CMD_CTRL |
bogdanm | 92:4fc01daae5a5 | 74 | #define MMCCE_BLOCK_SET MMC.CE_BLOCK_SET |
bogdanm | 92:4fc01daae5a5 | 75 | #define MMCCE_CLK_CTRL MMC.CE_CLK_CTRL |
bogdanm | 92:4fc01daae5a5 | 76 | #define MMCCE_BUF_ACC MMC.CE_BUF_ACC |
bogdanm | 92:4fc01daae5a5 | 77 | #define MMCCE_RESP3 MMC.CE_RESP3 |
bogdanm | 92:4fc01daae5a5 | 78 | #define MMCCE_RESP2 MMC.CE_RESP2 |
bogdanm | 92:4fc01daae5a5 | 79 | #define MMCCE_RESP1 MMC.CE_RESP1 |
bogdanm | 92:4fc01daae5a5 | 80 | #define MMCCE_RESP0 MMC.CE_RESP0 |
bogdanm | 92:4fc01daae5a5 | 81 | #define MMCCE_RESP_CMD12 MMC.CE_RESP_CMD12 |
bogdanm | 92:4fc01daae5a5 | 82 | #define MMCCE_DATA MMC.CE_DATA |
bogdanm | 92:4fc01daae5a5 | 83 | #define MMCCE_INT MMC.CE_INT |
bogdanm | 92:4fc01daae5a5 | 84 | #define MMCCE_INT_EN MMC.CE_INT_EN |
bogdanm | 92:4fc01daae5a5 | 85 | #define MMCCE_HOST_STS1 MMC.CE_HOST_STS1 |
bogdanm | 92:4fc01daae5a5 | 86 | #define MMCCE_HOST_STS2 MMC.CE_HOST_STS2 |
bogdanm | 92:4fc01daae5a5 | 87 | #define MMCCE_DMA_MODE MMC.CE_DMA_MODE |
bogdanm | 92:4fc01daae5a5 | 88 | #define MMCCE_DETECT MMC.CE_DETECT |
bogdanm | 92:4fc01daae5a5 | 89 | #define MMCCE_ADD_MODE MMC.CE_ADD_MODE |
bogdanm | 92:4fc01daae5a5 | 90 | #define MMCCE_VERSION MMC.CE_VERSION |
bogdanm | 92:4fc01daae5a5 | 91 | /* <-SEC M1.10.1 */ |
bogdanm | 92:4fc01daae5a5 | 92 | #endif |